mikroSDK Reference Manual
Macros
APB2 Force Release Reset
STM32F1xx_HAL_Driver | STM32F2xx_HAL_Driver | STM32F4xx_HAL_Driver | STM32F7xx_HAL_Driver | STM32H7xx_HAL_Driver » RCC » RCC Exported Macros

Force or release APB2 peripheral reset. More...

Macros

#define __HAL_RCC_APB2_FORCE_RESET()   (RCC->APB2RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_AFIO_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_AFIORST))
 
#define __HAL_RCC_GPIOA_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_IOPARST))
 
#define __HAL_RCC_GPIOB_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_IOPBRST))
 
#define __HAL_RCC_GPIOC_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_IOPCRST))
 
#define __HAL_RCC_GPIOD_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_IOPDRST))
 
#define __HAL_RCC_ADC1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_ADC1RST))
 
#define __HAL_RCC_TIM1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM1RST))
 
#define __HAL_RCC_SPI1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI1RST))
 
#define __HAL_RCC_USART1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_USART1RST))
 
#define __HAL_RCC_APB2_RELEASE_RESET()   (RCC->APB2RSTR = 0x00)
 
#define __HAL_RCC_AFIO_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_AFIORST))
 
#define __HAL_RCC_GPIOA_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_IOPARST))
 
#define __HAL_RCC_GPIOB_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_IOPBRST))
 
#define __HAL_RCC_GPIOC_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_IOPCRST))
 
#define __HAL_RCC_GPIOD_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_IOPDRST))
 
#define __HAL_RCC_ADC1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_ADC1RST))
 
#define __HAL_RCC_TIM1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM1RST))
 
#define __HAL_RCC_SPI1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI1RST))
 
#define __HAL_RCC_USART1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_USART1RST))
 
#define __HAL_RCC_APB2_FORCE_RESET()   (RCC->APB2RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_TIM1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM1RST))
 
#define __HAL_RCC_TIM8_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM8RST))
 
#define __HAL_RCC_USART1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_USART1RST))
 
#define __HAL_RCC_USART6_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_USART6RST))
 
#define __HAL_RCC_ADC_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_ADCRST))
 
#define __HAL_RCC_SDIO_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_SDIORST))
 
#define __HAL_RCC_SPI1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI1RST))
 
#define __HAL_RCC_SYSCFG_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_SYSCFGRST))
 
#define __HAL_RCC_TIM9_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM9RST))
 
#define __HAL_RCC_TIM10_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM10RST))
 
#define __HAL_RCC_TIM11_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM11RST))
 
#define __HAL_RCC_APB2_RELEASE_RESET()   (RCC->APB2RSTR = 0x00U)
 
#define __HAL_RCC_TIM1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM1RST))
 
#define __HAL_RCC_TIM8_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM8RST))
 
#define __HAL_RCC_USART1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_USART1RST))
 
#define __HAL_RCC_USART6_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_USART6RST))
 
#define __HAL_RCC_ADC_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_ADCRST))
 
#define __HAL_RCC_SDIO_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SDIORST))
 
#define __HAL_RCC_SPI1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI1RST))
 
#define __HAL_RCC_SYSCFG_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SYSCFGRST))
 
#define __HAL_RCC_TIM9_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM9RST))
 
#define __HAL_RCC_TIM10_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM10RST))
 
#define __HAL_RCC_TIM11_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM11RST))
 
#define __HAL_RCC_APB2_FORCE_RESET()   (RCC->APB2RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_TIM1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM1RST))
 
#define __HAL_RCC_USART1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_USART1RST))
 
#define __HAL_RCC_USART6_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_USART6RST))
 
#define __HAL_RCC_ADC_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_ADCRST))
 
#define __HAL_RCC_SPI1_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_SPI1RST))
 
#define __HAL_RCC_SYSCFG_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_SYSCFGRST))
 
#define __HAL_RCC_TIM9_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM9RST))
 
#define __HAL_RCC_TIM11_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_TIM11RST))
 
#define __HAL_RCC_APB2_RELEASE_RESET()   (RCC->APB2RSTR = 0x00U)
 
#define __HAL_RCC_TIM1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM1RST))
 
#define __HAL_RCC_USART1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_USART1RST))
 
#define __HAL_RCC_USART6_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_USART6RST))
 
#define __HAL_RCC_ADC_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_ADCRST))
 
#define __HAL_RCC_SPI1_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SPI1RST))
 
#define __HAL_RCC_SYSCFG_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SYSCFGRST))
 
#define __HAL_RCC_TIM9_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM9RST))
 
#define __HAL_RCC_TIM11_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_TIM11RST))
 
#define __HAL_RCC_APB2_FORCE_RESET()   (RCC->APB2RSTR = 0xFFFFFFFFU)
 
#define __HAL_RCC_SYSCFG_FORCE_RESET()   (RCC->APB2RSTR |= (RCC_APB2RSTR_SYSCFGRST))
 
#define __HAL_RCC_APB2_RELEASE_RESET()   (RCC->APB2RSTR = 0x00U)
 
#define __HAL_RCC_SYSCFG_RELEASE_RESET()   (RCC->APB2RSTR &= ~(RCC_APB2RSTR_SYSCFGRST))