mikroSDK Reference Manual
Macros
APB2 Peripheral Clock Enable Disable Status
STM32F1xx_HAL_Driver | STM32F2xx_HAL_Driver | STM32F4xx_HAL_Driver | STM32F7xx_HAL_Driver | STM32H7xx_HAL_Driver » RCC » RCC Exported Macros

Get the enable or disable status of the APB2 peripheral clock. More...

Macros

#define __HAL_RCC_AFIO_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_AFIOEN)) != RESET)
 
#define __HAL_RCC_AFIO_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_AFIOEN)) == RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPAEN)) != RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPAEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPBEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPBEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPCEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPCEN)) == RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPDEN)) != RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_IOPDEN)) == RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)
 
#define __HAL_RCC_USART1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
 
#define __HAL_RCC_USART1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM1EN))!= RESET)
 
#define __HAL_RCC_TIM8_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM8EN))!= RESET)
 
#define __HAL_RCC_USART1_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_USART1EN))!= RESET)
 
#define __HAL_RCC_USART6_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_USART6EN))!= RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_ADC1EN))!= RESET)
 
#define __HAL_RCC_ADC2_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_ADC2EN))!= RESET)
 
#define __HAL_RCC_ADC3_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_ADC3EN))!= RESET)
 
#define __HAL_RCC_SDIO_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_SDIOEN))!= RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_SPI1EN))!= RESET)
 
#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_SYSCFGEN))!= RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM9EN))!= RESET)
 
#define __HAL_RCC_TIM10_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM10EN))!= RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_ENABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM11EN))!= RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM1EN))== RESET)
 
#define __HAL_RCC_TIM8_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM8EN))== RESET)
 
#define __HAL_RCC_USART1_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_USART1EN))== RESET)
 
#define __HAL_RCC_USART6_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_USART6EN))== RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_ADC1EN))== RESET)
 
#define __HAL_RCC_ADC2_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_ADC2EN))== RESET)
 
#define __HAL_RCC_ADC3_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_ADC3EN))== RESET)
 
#define __HAL_RCC_SDIO_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_SDIOEN))== RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_SPI1EN))== RESET)
 
#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_SYSCFGEN))== RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM9EN))== RESET)
 
#define __HAL_RCC_TIM10_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM10EN))== RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_DISABLED()   ((RCC->APB2ENR &(RCC_APB2ENR_TIM11EN))== RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)
 
#define __HAL_RCC_USART1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
 
#define __HAL_RCC_USART6_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) != RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)
 
#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)
 
#define __HAL_RCC_USART1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
 
#define __HAL_RCC_USART6_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) == RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)
 
#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)