mikroSDK Reference Manual

Macros

#define __HAL_RCC_PLLI2S_ENABLE()   (*(__IO uint32_t *) RCC_CR_PLLI2SON_BB = ENABLE)
 Macros to enable or disable the PLLI2S.
 
#define __HAL_RCC_PLLI2S_DISABLE()   (*(__IO uint32_t *) RCC_CR_PLLI2SON_BB = DISABLE)
 
#define __HAL_RCC_PLLI2S_CONFIG(__PLLI2SN__, __PLLI2SR__)   (RCC->PLLI2SCFGR = ((__PLLI2SN__) << POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SN)) | ((__PLLI2SR__) << POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SR)))
 Macro to configure the PLLI2S clock multiplication and division factors .
 
#define __HAL_RCC_I2S_CONFIG(__SOURCE__)   (*(__IO uint32_t *) RCC_CFGR_I2SSRC_BB = (__SOURCE__))
 Macro to configure the I2S clock source (I2SCLK).
 
#define __HAL_RCC_I2S_CONFIG(__SOURCE__)
 Macro to configure the I2S clock source (I2SCLK).
 
#define __HAL_RCC_PLLI2S_ENABLE()   (RCC->CR |= (RCC_CR_PLLI2SON))
 Macros to enable or disable the PLLI2S.
 
#define __HAL_RCC_PLLI2S_DISABLE()   (RCC->CR &= ~(RCC_CR_PLLI2SON))
 

Macro Definition Documentation

◆ __HAL_RCC_I2S_CONFIG [1/2]

#define __HAL_RCC_I2S_CONFIG ( __SOURCE__)    (*(__IO uint32_t *) RCC_CFGR_I2SSRC_BB = (__SOURCE__))
Note
This function must be called before enabling the I2S APB clock.
Parameters
__SOURCE__specifies the I2S clock source. This parameter can be one of the following values:
  • RCC_I2SCLKSOURCE_PLLI2S: PLLI2S clock used as I2S clock source.
  • RCC_I2SCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as I2S clock source.

◆ __HAL_RCC_I2S_CONFIG [2/2]

#define __HAL_RCC_I2S_CONFIG ( __SOURCE__)
Value:
do {RCC->CFGR &= ~(RCC_CFGR_I2SSRC); \
RCC->CFGR |= (__SOURCE__); \
}while(0)
Note
This function must be called before enabling the I2S APB clock.
Parameters
__SOURCE__specifies the I2S clock source. This parameter can be one of the following values:
  • RCC_I2SCLKSOURCE_PLLI2S: PLLI2S clock used as I2S clock source.
  • RCC_I2SCLKSOURCE_EXT: External clock mapped on the I2S_CKIN pin used as I2S clock source.

◆ __HAL_RCC_PLLI2S_CONFIG

#define __HAL_RCC_PLLI2S_CONFIG ( __PLLI2SN__,
__PLLI2SR__ )   (RCC->PLLI2SCFGR = ((__PLLI2SN__) << POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SN)) | ((__PLLI2SR__) << POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SR)))
Note
This macro must be used only when the PLLI2S is disabled.
PLLI2S clock source is common with the main PLL (configured in HAL_RCC_ClockConfig() API).
Parameters
__PLLI2SN__specifies the multiplication factor for PLLI2S VCO output clock This parameter must be a number between Min_Data = 192 and Max_Data = 432.
Note
You have to set the PLLI2SN parameter correctly to ensure that the VCO output frequency is between Min_Data = 192 and Max_Data = 432 MHz.
Parameters
__PLLI2SR__specifies the division factor for I2S clock This parameter must be a number between Min_Data = 2 and Max_Data = 7.
Note
You have to set the PLLI2SR parameter correctly to not exceed 192 MHz on the I2S clock frequency.

◆ __HAL_RCC_PLLI2S_ENABLE [1/2]

#define __HAL_RCC_PLLI2S_ENABLE ( )    (*(__IO uint32_t *) RCC_CR_PLLI2SON_BB = ENABLE)
Note
The PLLI2S is disabled by hardware when entering STOP and STANDBY modes.

◆ __HAL_RCC_PLLI2S_ENABLE [2/2]

#define __HAL_RCC_PLLI2S_ENABLE ( )    (RCC->CR |= (RCC_CR_PLLI2SON))
Note
The PLLI2S is disabled by hardware when entering STOP and STANDBY modes.