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| #define | RCC_RTCCLKSOURCE_NO_CLK 0x00000000U |
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| #define | RCC_RTCCLKSOURCE_LSE RCC_BDCR_RTCSEL_LSE |
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| #define | RCC_RTCCLKSOURCE_LSI RCC_BDCR_RTCSEL_LSI |
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| #define | RCC_RTCCLKSOURCE_HSE_DIV128 RCC_BDCR_RTCSEL_HSE |
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#define | RCC_RTCCLKSOURCE_NO_CLK 0x00000000U |
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#define | RCC_RTCCLKSOURCE_LSE 0x00000100U |
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#define | RCC_RTCCLKSOURCE_LSI 0x00000200U |
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#define | RCC_RTCCLKSOURCE_HSE_DIVX 0x00000300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV2 0x00020300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV3 0x00030300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV4 0x00040300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV5 0x00050300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV6 0x00060300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV7 0x00070300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV8 0x00080300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV9 0x00090300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV10 0x000A0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV11 0x000B0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV12 0x000C0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV13 0x000D0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV14 0x000E0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV15 0x000F0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV16 0x00100300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV17 0x00110300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV18 0x00120300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV19 0x00130300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV20 0x00140300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV21 0x00150300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV22 0x00160300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV23 0x00170300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV24 0x00180300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV25 0x00190300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV26 0x001A0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV27 0x001B0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV28 0x001C0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV29 0x001D0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV30 0x001E0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV31 0x001F0300U |
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#define | RCC_RTCCLKSOURCE_NO_CLK 0x00000000U |
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#define | RCC_RTCCLKSOURCE_LSE 0x00000100U |
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#define | RCC_RTCCLKSOURCE_LSI 0x00000200U |
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#define | RCC_RTCCLKSOURCE_HSE_DIVX 0x00000300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV2 0x00020300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV3 0x00030300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV4 0x00040300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV5 0x00050300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV6 0x00060300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV7 0x00070300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV8 0x00080300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV9 0x00090300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV10 0x000A0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV11 0x000B0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV12 0x000C0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV13 0x000D0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV14 0x000E0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV15 0x000F0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV16 0x00100300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV17 0x00110300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV18 0x00120300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV19 0x00130300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV20 0x00140300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV21 0x00150300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV22 0x00160300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV23 0x00170300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV24 0x00180300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV25 0x00190300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV26 0x001A0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV27 0x001B0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV28 0x001C0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV29 0x001D0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV30 0x001E0300U |
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#define | RCC_RTCCLKSOURCE_HSE_DIV31 0x001F0300U |
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#define | RCC_RTCCLKSOURCE_NO_CLK ((uint32_t)0x00000000U) |
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#define | RCC_RTCCLKSOURCE_LSE ((uint32_t)0x00000100U) |
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#define | RCC_RTCCLKSOURCE_LSI ((uint32_t)0x00000200U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIVX ((uint32_t)0x00000300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV2 ((uint32_t)0x00020300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV3 ((uint32_t)0x00030300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV4 ((uint32_t)0x00040300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV5 ((uint32_t)0x00050300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV6 ((uint32_t)0x00060300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV7 ((uint32_t)0x00070300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV8 ((uint32_t)0x00080300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV9 ((uint32_t)0x00090300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV10 ((uint32_t)0x000A0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV11 ((uint32_t)0x000B0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV12 ((uint32_t)0x000C0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV13 ((uint32_t)0x000D0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV14 ((uint32_t)0x000E0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV15 ((uint32_t)0x000F0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV16 ((uint32_t)0x00100300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV17 ((uint32_t)0x00110300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV18 ((uint32_t)0x00120300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV19 ((uint32_t)0x00130300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV20 ((uint32_t)0x00140300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV21 ((uint32_t)0x00150300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV22 ((uint32_t)0x00160300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV23 ((uint32_t)0x00170300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV24 ((uint32_t)0x00180300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV25 ((uint32_t)0x00190300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV26 ((uint32_t)0x001A0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV27 ((uint32_t)0x001B0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV28 ((uint32_t)0x001C0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV29 ((uint32_t)0x001D0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV30 ((uint32_t)0x001E0300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV31 ((uint32_t)0x001F0300U) |
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#define | RCC_RTCCLKSOURCE_NO_CLK (0x00000000U) |
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#define | RCC_RTCCLKSOURCE_LSE (0x00000100U) |
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#define | RCC_RTCCLKSOURCE_LSI (0x00000200U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV2 (0x00002300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV3 (0x00003300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV4 (0x00004300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV5 (0x00005300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV6 (0x00006300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV7 (0x00007300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV8 (0x00008300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV9 (0x00009300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV10 (0x0000A300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV11 (0x0000B300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV12 (0x0000C300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV13 (0x0000D300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV14 (0x0000E300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV15 (0x0000F300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV16 (0x00010300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV17 (0x00011300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV18 (0x00012300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV19 (0x00013300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV20 (0x00014300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV21 (0x00015300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV22 (0x00016300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV23 (0x00017300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV24 (0x00018300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV25 (0x00019300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV26 (0x0001A300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV27 (0x0001B300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV28 (0x0001C300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV29 (0x0001D300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV30 (0x0001E300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV31 (0x0001F300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV32 (0x00020300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV33 (0x00021300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV34 (0x00022300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV35 (0x00023300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV36 (0x00024300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV37 (0x00025300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV38 (0x00026300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV39 (0x00027300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV40 (0x00028300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV41 (0x00029300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV42 (0x0002A300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV43 (0x0002B300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV44 (0x0002C300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV45 (0x0002D300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV46 (0x0002E300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV47 (0x0002F300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV48 (0x00030300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV49 (0x00031300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV50 (0x00032300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV51 (0x00033300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV52 (0x00034300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV53 (0x00035300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV54 (0x00036300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV55 (0x00037300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV56 (0x00038300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV57 (0x00039300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV58 (0x0003A300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV59 (0x0003B300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV60 (0x0003C300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV61 (0x0003D300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV62 (0x0003E300U) |
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#define | RCC_RTCCLKSOURCE_HSE_DIV63 (0x0003F300U) |
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