mikroSDK Reference Manual
Macros | Enumerations | Variables
MikroE USB HW implementation.
Middleware | API

MikroE USB HW init library. More...

Macros

#define analog_function_enable(_reg, _pin)   (_reg |= 1U << _pin)
 Enable analog functionality.
 
#define alternate_function_enable(_pin)   (GPIO_PORTB_AHB_AFSEL_R |= 1U << _pin)
 Enable alternate functionality.
 
#define GPIO_PORTB_PIN0   (0)
 Pin numbers.
 
#define GPIO_PORTB_PIN1   (1)
 
#define GPIO_PORTL_PIN6   (6)
 
#define GPIO_PORTL_PIN7   (7)
 
#define USB_DP_PIN   GPIO_PORTL_PIN6
 
#define USB_DN_PIN   GPIO_PORTL_PIN7
 
#define USB_ID_PIN   GPIO_PORTB_PIN0
 
#define USB_VBUS_PIN   GPIO_PORTB_PIN1
 
#define analog_function_enable(_pin)   (GPIO_PORTJ_AMSEL_R |= 1U << _pin)
 Enable analog functionality.
 
#define GPIO_PORTJ_PIN0   (0)
 Pin numbers.
 
#define GPIO_PORTJ_PIN1   (1)
 
#define analog_function_enable(_reg, _pin)   (_reg |= 1U << _pin)
 Enable analog functionality.
 
#define alternate_function_enable(_pin)   (GPIO_PORTB_AHB_AFSEL_R |= 1U << _pin)
 Enable alternate functionality.
 
#define GPIO_PORTB_PIN0   (0)
 Pin numbers.
 
#define GPIO_PORTB_PIN1   (1)
 
#define GPIO_PORTL_PIN6   (6)
 
#define GPIO_PORTL_PIN7   (7)
 
#define USB_DP_PIN   GPIO_PORTL_PIN6
 
#define USB_DN_PIN   GPIO_PORTL_PIN7
 
#define USB_ID_PIN   GPIO_PORTB_PIN0
 
#define USB_VBUS_PIN   GPIO_PORTB_PIN1
 
#define analog_function_enable(_pin)   (GPIO_PORTD_AMSEL_R |= 1U << _pin)
 Enable analog functionality.
 
#define GPIO_PORTD_PIN4   (4)
 Pin numbers.
 
#define GPIO_PORTD_PIN5   (5)
 
#define VBUS_SENSE_OFF   false
 
#define pointer_byte(_reg)   (*(volatile uint8_t *)(uint32_t)(_reg))
 
#define pointer_word(_reg)   (*(volatile uint16_t *)(uint32_t)(_reg))
 
#define pointer_dword(_reg)   (*(volatile uint32_t *)(uint32_t)(_reg))
 
#define HXTAL_STARTUP_TIMEOUT   ((uint16_t)0xFFFF)
 
#define BITS(start, end)   ((0xFFFFFFFFUL << (start)) & (0xFFFFFFFFUL >> (31U - (uint32_t)(end))))
 
#define CFG0_AHBPSC(regval)   (BITS(4,7) & ((uint32_t)(regval) << 4))
 
#define RCU_AHB_CKSYS_DIV1   CFG0_AHBPSC(0)
 
#define RCU_AHB_CKSYS_DIV2   CFG0_AHBPSC(8)
 
#define RCU_AHB_CKSYS_DIV4   CFG0_AHBPSC(9)
 
#define RCU_AHB_CKSYS_DIV8   CFG0_AHBPSC(10)
 
#define RCU_AHB_CKSYS_DIV16   CFG0_AHBPSC(11)
 
#define RCU_AHB_CKSYS_DIV64   CFG0_AHBPSC(12)
 
#define RCU_AHB_CKSYS_DIV128   CFG0_AHBPSC(13)
 
#define RCU_AHB_CKSYS_DIV256   CFG0_AHBPSC(14)
 
#define RCU_AHB_CKSYS_DIV512   CFG0_AHBPSC(15)
 
#define CFG0_APB1PSC(regval)   (BITS(8,10) & ((uint32_t)(regval) << 8))
 
#define RCU_APB1_CKAHB_DIV1   CFG0_APB1PSC(0)
 
#define RCU_APB1_CKAHB_DIV2   CFG0_APB1PSC(4)
 
#define RCU_APB1_CKAHB_DIV4   CFG0_APB1PSC(5)
 
#define RCU_APB1_CKAHB_DIV8   CFG0_APB1PSC(6)
 
#define RCU_APB1_CKAHB_DIV16   CFG0_APB1PSC(7)
 
#define CFG0_APB2PSC(regval)   (BITS(11,13) & ((uint32_t)(regval) << 11))
 
#define RCU_APB2_CKAHB_DIV1   CFG0_APB2PSC(0)
 
#define RCU_APB2_CKAHB_DIV2   CFG0_APB2PSC(4)
 
#define RCU_APB2_CKAHB_DIV4   CFG0_APB2PSC(5)
 
#define RCU_APB2_CKAHB_DIV8   CFG0_APB2PSC(6)
 
#define RCU_APB2_CKAHB_DIV16   CFG0_APB2PSC(7)
 
#define CFG0_SCS(regval)   (BITS(0,1) & ((uint32_t)(regval) << 0))
 
#define RCU_CKSYSSRC_IRC8M   CFG0_SCS(0)
 
#define RCU_CKSYSSRC_HXTAL   CFG0_SCS(1)
 
#define RCU_CKSYSSRC_PLL   CFG0_SCS(2)
 
#define CFG0_SCSS(regval)   (BITS(2,3) & ((uint32_t)(regval) << 2))
 
#define RCU_SCSS_IRC8M   CFG0_SCSS(0)
 
#define RCU_SCSS_HXTAL   CFG0_SCSS(1)
 
#define RCU_SCSS_PLL   CFG0_SCSS(2)
 
#define RCU_PLLSRC_IRC8M_DIV2   ((uint32_t)0x00000000U)
 
#define RCU_PLLSRC_HXTAL   RCU_CFG0_PLLSEL
 
#define PLLMF_4   RCU_CFG0_PLLMF_4
 
#define CFG0_PLLMF(regval)   (BITS(18,21) & ((uint32_t)(regval) << 18))
 
#define RCU_PLL_MUL2   CFG0_PLLMF(0)
 
#define RCU_PLL_MUL3   CFG0_PLLMF(1)
 
#define RCU_PLL_MUL4   CFG0_PLLMF(2)
 
#define RCU_PLL_MUL5   CFG0_PLLMF(3)
 
#define RCU_PLL_MUL6   CFG0_PLLMF(4)
 
#define RCU_PLL_MUL7   CFG0_PLLMF(5)
 
#define RCU_PLL_MUL8   CFG0_PLLMF(6)
 
#define RCU_PLL_MUL9   CFG0_PLLMF(7)
 
#define RCU_PLL_MUL10   CFG0_PLLMF(8)
 
#define RCU_PLL_MUL11   CFG0_PLLMF(9)
 
#define RCU_PLL_MUL12   CFG0_PLLMF(10)
 
#define RCU_PLL_MUL13   CFG0_PLLMF(11)
 
#define RCU_PLL_MUL14   CFG0_PLLMF(12)
 
#define RCU_PLL_MUL6_5   CFG0_PLLMF(13)
 
#define RCU_PLL_MUL16   CFG0_PLLMF(14)
 
#define RCU_PLL_MUL17   (PLLMF_4 | CFG0_PLLMF(0))
 
#define RCU_PLL_MUL18   (PLLMF_4 | CFG0_PLLMF(1))
 
#define RCU_PLL_MUL19   (PLLMF_4 | CFG0_PLLMF(2))
 
#define RCU_PLL_MUL20   (PLLMF_4 | CFG0_PLLMF(3))
 
#define RCU_PLL_MUL21   (PLLMF_4 | CFG0_PLLMF(4))
 
#define RCU_PLL_MUL22   (PLLMF_4 | CFG0_PLLMF(5))
 
#define RCU_PLL_MUL23   (PLLMF_4 | CFG0_PLLMF(6))
 
#define RCU_PLL_MUL24   (PLLMF_4 | CFG0_PLLMF(7))
 
#define RCU_PLL_MUL25   (PLLMF_4 | CFG0_PLLMF(8))
 
#define RCU_PLL_MUL26   (PLLMF_4 | CFG0_PLLMF(9))
 
#define RCU_PLL_MUL27   (PLLMF_4 | CFG0_PLLMF(10))
 
#define RCU_PLL_MUL28   (PLLMF_4 | CFG0_PLLMF(11))
 
#define RCU_PLL_MUL29   (PLLMF_4 | CFG0_PLLMF(12))
 
#define RCU_PLL_MUL30   (PLLMF_4 | CFG0_PLLMF(13))
 
#define RCU_PLL_MUL31   (PLLMF_4 | CFG0_PLLMF(14))
 
#define RCU_PLL_MUL32   (PLLMF_4 | CFG0_PLLMF(15))
 
#define RCU_PREDV0SRC_HXTAL   ((uint32_t)0x00000000U)
 
#define RCU_PREDV0SRC_CKPLL1   RCU_CFG1_PREDV0SEL
 
#define CFG1_PLL1MF(regval)   (BITS(8,11) & ((uint32_t)(regval) << 8))
 
#define RCU_PLL1_MUL8   CFG1_PLL1MF(6)
 
#define RCU_PLL1_MUL9   CFG1_PLL1MF(7)
 
#define RCU_PLL1_MUL10   CFG1_PLL1MF(8)
 
#define RCU_PLL1_MUL11   CFG1_PLL1MF(9)
 
#define RCU_PLL1_MUL12   CFG1_PLL1MF(10)
 
#define RCU_PLL1_MUL13   CFG1_PLL1MF(11)
 
#define RCU_PLL1_MUL14   CFG1_PLL1MF(12)
 
#define RCU_PLL1_MUL15   CFG1_PLL1MF(13)
 
#define RCU_PLL1_MUL16   CFG1_PLL1MF(14)
 
#define RCU_PLL1_MUL20   CFG1_PLL1MF(15)
 
#define CFG1_PREDV0(regval)   (BITS(0,3) & ((uint32_t)(regval) << 0))
 
#define RCU_PREDV0_DIV1   CFG1_PREDV0(0)
 
#define RCU_PREDV0_DIV2   CFG1_PREDV0(1)
 
#define RCU_PREDV0_DIV3   CFG1_PREDV0(2)
 
#define RCU_PREDV0_DIV4   CFG1_PREDV0(3)
 
#define RCU_PREDV0_DIV5   CFG1_PREDV0(4)
 
#define RCU_PREDV0_DIV6   CFG1_PREDV0(5)
 
#define RCU_PREDV0_DIV7   CFG1_PREDV0(6)
 
#define RCU_PREDV0_DIV8   CFG1_PREDV0(7)
 
#define RCU_PREDV0_DIV9   CFG1_PREDV0(8)
 
#define RCU_PREDV0_DIV10   CFG1_PREDV0(9)
 
#define RCU_PREDV0_DIV11   CFG1_PREDV0(10)
 
#define RCU_PREDV0_DIV12   CFG1_PREDV0(11)
 
#define RCU_PREDV0_DIV13   CFG1_PREDV0(12)
 
#define RCU_PREDV0_DIV14   CFG1_PREDV0(13)
 
#define RCU_PREDV0_DIV15   CFG1_PREDV0(14)
 
#define RCU_PREDV0_DIV16   CFG1_PREDV0(15)
 
#define CFG1_PREDV1(regval)   (BITS(4,7) & ((uint32_t)(regval) << 4))
 
#define RCU_PREDV1_DIV1   CFG1_PREDV1(0)
 
#define RCU_PREDV1_DIV2   CFG1_PREDV1(1)
 
#define RCU_PREDV1_DIV3   CFG1_PREDV1(2)
 
#define RCU_PREDV1_DIV4   CFG1_PREDV1(3)
 
#define RCU_PREDV1_DIV5   CFG1_PREDV1(4)
 
#define RCU_PREDV1_DIV6   CFG1_PREDV1(5)
 
#define RCU_PREDV1_DIV7   CFG1_PREDV1(6)
 
#define RCU_PREDV1_DIV8   CFG1_PREDV1(7)
 
#define RCU_PREDV1_DIV9   CFG1_PREDV1(8)
 
#define RCU_PREDV1_DIV10   CFG1_PREDV1(9)
 
#define RCU_PREDV1_DIV11   CFG1_PREDV1(10)
 
#define RCU_PREDV1_DIV12   CFG1_PREDV1(11)
 
#define RCU_PREDV1_DIV13   CFG1_PREDV1(12)
 
#define RCU_PREDV1_DIV14   CFG1_PREDV1(13)
 
#define RCU_PREDV1_DIV15   CFG1_PREDV1(14)
 
#define RCU_PREDV1_DIV16   CFG1_PREDV1(15)
 
#define _RCU_CFG0_PLLMF   BITS(18,21)
 
#define _RCU_CFG1_PLL1MF   BITS(8,11)
 
#define _RCU_CFG1_PREDV0   BITS(0,3)
 
#define _RCU_CFG1_PREDV1   BITS(4,7)
 
#define _RCU_CFG0_SCS   BITS(0,1)
 
#define GPIO_MODE_SET(n, mode)   ((uint32_t)((uint32_t)(mode) << (4U * (n))))
 
#define GPIO_MODE_MASK(n)   (0xFU << (4U * (n)))
 
#define GPIO_MODE_AIN   ((uint8_t)0x00U)
 
#define GPIO_MODE_IN_FLOATING   ((uint8_t)0x04U)
 
#define GPIO_MODE_IPD   ((uint8_t)0x28U)
 
#define GPIO_MODE_IPU   ((uint8_t)0x48U)
 
#define GPIO_MODE_OUT_OD   ((uint8_t)0x14U)
 
#define GPIO_MODE_OUT_PP   ((uint8_t)0x10U)
 
#define GPIO_MODE_AF_OD   ((uint8_t)0x1CU)
 
#define GPIO_MODE_AF_PP   ((uint8_t)0x18U)
 
#define GPIO_OSPEED_10MHZ   ((uint8_t)0x01U)
 
#define GPIO_OSPEED_2MHZ   ((uint8_t)0x02U)
 
#define GPIO_OSPEED_50MHZ   ((uint8_t)0x03U)
 
#define GPIO_PIN_0   BIT(0)
 
#define GPIO_PIN_1   BIT(1)
 
#define GPIO_PIN_2   BIT(2)
 
#define GPIO_PIN_3   BIT(3)
 
#define GPIO_PIN_4   BIT(4)
 
#define GPIO_PIN_5   BIT(5)
 
#define GPIO_PIN_6   BIT(6)
 
#define GPIO_PIN_7   BIT(7)
 
#define GPIO_PIN_8   BIT(8)
 
#define GPIO_PIN_9   BIT(9)
 
#define GPIO_PIN_10   BIT(10)
 
#define GPIO_PIN_11   BIT(11)
 
#define GPIO_PIN_12   BIT(12)
 
#define GPIO_PIN_13   BIT(13)
 
#define GPIO_PIN_14   BIT(14)
 
#define GPIO_PIN_15   BIT(15)
 
#define GPIO_PIN_ALL   BITS(0, 15)
 
#define BIT(x)   ((uint32_t)((uint32_t)0x01U<<(x)))
 
#define GET_BITS(regval, start, end)   (((regval) & BITS((start),(end))) >> (start))
 
#define SEL_IRC8M   ((uint16_t)0U)
 
#define SEL_HXTAL   ((uint16_t)1U)
 
#define SEL_PLL   ((uint16_t)2U)
 
#define CFG0_USBPSC(regval)   (BITS(22,23) & ((uint32_t)(regval) << 22))
 
#define RCU_CKUSB_CKPLL_DIV1_5   CFG0_USBPSC(0)
 
#define RCU_CKUSB_CKPLL_DIV1   CFG0_USBPSC(1)
 
#define RCU_CKUSB_CKPLL_DIV2_5   CFG0_USBPSC(2)
 
#define RCU_CKUSB_CKPLL_DIV2   CFG0_USBPSC(3)
 
#define _RCU_CFG0_USBFSPSC   BITS(22,23)
 
#define IRC8M_VALUE   ((uint32_t)8000000)
 
#define MIKROE_HW_HXTAL   ((uint32_t)25000000)
 
#define HXTAL_VALUE   IRC8M_VALUE
 

Enumerations

enum  rcu_clock_freq_enum { CK_SYS = 0 , CK_AHB , CK_APB1 , CK_APB2 }
 

Variables

volatile uint32_t SystemCoreClock
 
volatile uint32_t SystemCoreClock
 
volatile uint32_t SystemCoreClock
 

Macro Definition Documentation

◆ alternate_function_enable [1/2]

#define alternate_function_enable ( _pin)    (GPIO_PORTB_AHB_AFSEL_R |= 1U << _pin)

Enables alternate functionality for provided _pin. The associated pin functions as a peripheral signal and is controlled by the alternate hardware function.

◆ alternate_function_enable [2/2]

#define alternate_function_enable ( _pin)    (GPIO_PORTB_AHB_AFSEL_R |= 1U << _pin)

Enables alternate functionality for provided _pin. The associated pin functions as a peripheral signal and is controlled by the alternate hardware function.

◆ analog_function_enable [1/4]

#define analog_function_enable ( _pin)    (GPIO_PORTJ_AMSEL_R |= 1U << _pin)

Enables analog functionality for provided _pin. The analog function of the pin is enabled, the isolation is disabled, and the pin is capable of analog functions.

Note
This register(GPIO_PORTJ_AMSEL_R) and bits are only valid for GPIO signals that share analog function through a unified I/O pad.

Enables analog functionality for provided _pin. The analog function of the pin is enabled, the isolation is disabled, and the pin is capable of analog functions.

Note
This register(GPIO_PORTx_AMSEL_R) and bits are only valid for GPIO signals that share analog function through a unified I/O pad.

◆ analog_function_enable [2/4]

#define analog_function_enable ( _pin)    (GPIO_PORTD_AMSEL_R |= 1U << _pin)

Enables analog functionality for provided _pin. The analog function of the pin is enabled, the isolation is disabled, and the pin is capable of analog functions.

Note
This register(GPIO_PORTJ_AMSEL_R) and bits are only valid for GPIO signals that share analog function through a unified I/O pad.

◆ analog_function_enable [3/4]

#define analog_function_enable ( _reg,
_pin )   (_reg |= 1U << _pin)

Enables analog functionality for provided _pin. The analog function of the pin is enabled, the isolation is disabled, and the pin is capable of analog functions.

Note
This register(GPIO_PORTx_AMSEL_R) and bits are only valid for GPIO signals that share analog function through a unified I/O pad.

Enables analog functionality for provided _pin. The analog function of the pin is enabled, the isolation is disabled, and the pin is capable of analog functions.

Note
This register(GPIO_PORTJ_AMSEL_R) and bits are only valid for GPIO signals that share analog function through a unified I/O pad.

◆ analog_function_enable [4/4]

#define analog_function_enable ( _reg,
_pin )   (_reg |= 1U << _pin)

Enables analog functionality for provided _pin. The analog function of the pin is enabled, the isolation is disabled, and the pin is capable of analog functions.

Note
This register(GPIO_PORTx_AMSEL_R) and bits are only valid for GPIO signals that share analog function through a unified I/O pad.

Enables analog functionality for provided _pin. The analog function of the pin is enabled, the isolation is disabled, and the pin is capable of analog functions.

Note
This register(GPIO_PORTJ_AMSEL_R) and bits are only valid for GPIO signals that share analog function through a unified I/O pad.