mikroSDK Reference Manual
ksz9893_driver.h
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1
31#ifndef _KSZ9893_DRIVER_H
32#define _KSZ9893_DRIVER_H
33
34//Dependencies
35#include "core/nic.h"
36
37//Port identifiers
38#define KSZ9893_PORT1 1
39#define KSZ9893_PORT2 2
40#define KSZ9893_PORT3 3
41
42//Port masks
43#define KSZ9893_PORT_MASK 0x07
44#define KSZ9893_PORT1_MASK 0x01
45#define KSZ9893_PORT2_MASK 0x02
46#define KSZ9893_PORT3_MASK 0x04
47
48//SPI command byte
49#define KSZ9893_SPI_CMD_WRITE 0x40000000
50#define KSZ9893_SPI_CMD_READ 0x60000000
51#define KSZ9893_SPI_CMD_ADDR 0x001FFFE0
52
53//Size of static and dynamic MAC tables
54#define KSZ9893_STATIC_MAC_TABLE_SIZE 16
55#define KSZ9893_DYNAMIC_MAC_TABLE_SIZE 4096
56
57//Tail tag rules (host to KSZ9893)
58#define KSZ9893_TAIL_TAG_NORMAL_ADDR_LOOKUP 0x40
59#define KSZ9893_TAIL_TAG_PORT_BLOCKING_OVERRIDE 0x20
60#define KSZ9893_TAIL_TAG_PRIORITY 0x18
61#define KSZ9893_TAIL_TAG_DEST_PORT3 0x04
62#define KSZ9893_TAIL_TAG_DEST_PORT2 0x02
63#define KSZ9893_TAIL_TAG_DEST_PORT1 0x01
64
65//Tail tag rules (KSZ9893 to host)
66#define KSZ9893_TAIL_TAG_SRC_PORT 0x03
67
68//KSZ9893 PHY registers
69#define KSZ9893_BMCR 0x00
70#define KSZ9893_BMSR 0x01
71#define KSZ9893_PHYID1 0x02
72#define KSZ9893_PHYID2 0x03
73#define KSZ9893_ANAR 0x04
74#define KSZ9893_ANLPAR 0x05
75#define KSZ9893_ANER 0x06
76#define KSZ9893_ANNPR 0x07
77#define KSZ9893_ANLPNPR 0x08
78#define KSZ9893_GBCR 0x09
79#define KSZ9893_GBSR 0x0A
80#define KSZ9893_MMDACR 0x0D
81#define KSZ9893_MMDAADR 0x0E
82#define KSZ9893_GBESR 0x0F
83#define KSZ9893_RLB 0x11
84#define KSZ9893_LINKMD 0x12
85#define KSZ9893_DPMAPCSS 0x13
86#define KSZ9893_RXERCTR 0x15
87#define KSZ9893_ICSR 0x1B
88#define KSZ9893_AUTOMDI 0x1C
89#define KSZ9893_PHYCON 0x1F
90
91//KSZ9893 MMD registers
92#define KSZ9893_MMD_LED_MODE 0x02, 0x00
93#define KSZ9893_MMD_1000BT_EEE_WAKE_TX_TIMER 0x03, 0x0E
94#define KSZ9893_MMD_EEE_ADV 0x07, 0x3C
95
96//KSZ9893 Switch registers
97#define KSZ9893_CHIP_ID0 0x0000
98#define KSZ9893_CHIP_ID1 0x0001
99#define KSZ9893_CHIP_ID2 0x0002
100#define KSZ9893_CHIP_ID3 0x0003
101#define KSZ9893_PME_PIN_CTRL 0x0006
102#define KSZ9893_CHIP_ID4 0x000F
103#define KSZ9893_GLOBAL_INT_STAT 0x0010
104#define KSZ9893_GLOBAL_INT_MASK 0x0014
105#define KSZ9893_GLOBAL_PORT_INT_STAT 0x0018
106#define KSZ9893_GLOBAL_PORT_INT_MASK 0x001C
107#define KSZ9893_SERIAL_IO_CTRL 0x0100
108#define KSZ9893_IBA_CTRL 0x0104
109#define KSZ9893_IO_DRIVE_STRENGTH 0x010D
110#define KSZ9893_IBA_OP_STAT1 0x0110
111#define KSZ9893_LED_OVERRIDE 0x0120
112#define KSZ9893_LED_OUTPUT 0x0124
113#define KSZ9893_PWR_DOWN_CTRL0 0x0201
114#define KSZ9893_LED_STRAP_IN 0x0210
115#define KSZ9893_SWITCH_OP 0x0300
116#define KSZ9893_SWITCH_MAC_ADDR0 0x0302
117#define KSZ9893_SWITCH_MAC_ADDR1 0x0303
118#define KSZ9893_SWITCH_MAC_ADDR2 0x0304
119#define KSZ9893_SWITCH_MAC_ADDR3 0x0305
120#define KSZ9893_SWITCH_MAC_ADDR4 0x0306
121#define KSZ9893_SWITCH_MAC_ADDR5 0x0307
122#define KSZ9893_SWITCH_MTU 0x0308
123#define KSZ9893_SWITCH_ISP_TPID 0x030A
124#define KSZ9893_SWITCH_LUE_CTRL0 0x0310
125#define KSZ9893_SWITCH_LUE_CTRL1 0x0311
126#define KSZ9893_SWITCH_LUE_CTRL2 0x0312
127#define KSZ9893_SWITCH_LUE_CTRL3 0x0313
128#define KSZ9893_ALU_TABLE_INT 0x0314
129#define KSZ9893_ALU_TABLE_MASK 0x0315
130#define KSZ9893_ALU_TABLE_ENTRY_INDEX0 0x0316
131#define KSZ9893_ALU_TABLE_ENTRY_INDEX1 0x0318
132#define KSZ9893_ALU_TABLE_ENTRY_INDEX2 0x031A
133#define KSZ9893_UNKNOWN_UNICAST_CTRL 0x0320
134#define KSZ9893_UNKONWN_MULTICAST_CTRL 0x0324
135#define KSZ9893_UNKNOWN_VLAN_ID_CTRL 0x0328
136#define KSZ9893_SWITCH_MAC_CTRL0 0x0330
137#define KSZ9893_SWITCH_MAC_CTRL1 0x0331
138#define KSZ9893_SWITCH_MAC_CTRL2 0x0332
139#define KSZ9893_SWITCH_MAC_CTRL3 0x0333
140#define KSZ9893_SWITCH_MAC_CTRL4 0x0334
141#define KSZ9893_SWITCH_MAC_CTRL5 0x0335
142#define KSZ9893_SWITCH_MIB_CTRL 0x0336
143#define KSZ9893_802_1P_PRIO_MAPPING0 0x0338
144#define KSZ9893_802_1P_PRIO_MAPPING1 0x0339
145#define KSZ9893_802_1P_PRIO_MAPPING2 0x033A
146#define KSZ9893_802_1P_PRIO_MAPPING3 0x033B
147#define KSZ9893_IP_DIFFSERV_PRIO_EN 0x033E
148#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING0 0x0340
149#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING1 0x0341
150#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING2 0x0342
151#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING3 0x0343
152#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING4 0x0344
153#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING5 0x0345
154#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING6 0x0346
155#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING7 0x0347
156#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING8 0x0348
157#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING9 0x0349
158#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING10 0x034A
159#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING11 0x034B
160#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING12 0x034C
161#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING13 0x034D
162#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING14 0x034E
163#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING15 0x034F
164#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING16 0x0350
165#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING17 0x0351
166#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING18 0x0352
167#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING19 0x0353
168#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING20 0x0354
169#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING21 0x0355
170#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING22 0x0356
171#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING23 0x0357
172#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING24 0x0358
173#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING25 0x0359
174#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING26 0x035A
175#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING27 0x035B
176#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING28 0x035C
177#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING29 0x035D
178#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING30 0x035E
179#define KSZ9893_IP_DIFFSERV_PRIO_MAPPING31 0x035F
180#define KSZ9893_GLOBAL_PORT_MIRROR_SNOOP_CTRL 0x0370
181#define KSZ9893_WRED_DIFFSERV_COLOR_MAPPING 0x0378
182#define KSZ9893_QUEUE_MGMT_CTRL0 0x0390
183#define KSZ9893_VLAN_TABLE_ENTRY0 0x0400
184#define KSZ9893_VLAN_TABLE_ENTRY1 0x0404
185#define KSZ9893_VLAN_TABLE_ENTRY2 0x0408
186#define KSZ9893_VLAN_TABLE_INDEX 0x040C
187#define KSZ9893_VLAN_TABLE_ACCESS_CTRL 0x040E
188#define KSZ9893_ALU_TABLE_INDEX0 0x0410
189#define KSZ9893_ALU_TABLE_INDEX1 0x0414
190#define KSZ9893_ALU_TABLE_CTRL 0x0418
191#define KSZ9893_STATIC_RES_MCAST_TABLE_CTRL 0x041C
192#define KSZ9893_ALU_TABLE_ENTRY1 0x0420
193#define KSZ9893_STATIC_TABLE_ENTRY1 0x0420
194#define KSZ9893_ALU_TABLE_ENTRY2 0x0424
195#define KSZ9893_STATIC_TABLE_ENTRY2 0x0424
196#define KSZ9893_RES_MCAST_TABLE_ENTRY2 0x0424
197#define KSZ9893_ALU_TABLE_ENTRY3 0x0428
198#define KSZ9893_STATIC_TABLE_ENTRY3 0x0428
199#define KSZ9893_ALU_TABLE_ENTRY4 0x042C
200#define KSZ9893_STATIC_TABLE_ENTRY4 0x042C
201#define KSZ9893_PORT1_DEFAULT_TAG0 0x1000
202#define KSZ9893_PORT1_DEFAULT_TAG1 0x1001
203#define KSZ9893_PORT1_PME_WOL_EVENT 0x1013
204#define KSZ9893_PORT1_PME_WOL_EN 0x1017
205#define KSZ9893_PORT1_INT_STATUS 0x101B
206#define KSZ9893_PORT1_INT_MASK 0x101F
207#define KSZ9893_PORT1_OP_CTRL0 0x1020
208#define KSZ9893_PORT1_STATUS 0x1030
209#define KSZ9893_PORT1_MAC_CTRL0 0x1400
210#define KSZ9893_PORT1_MAC_CTRL1 0x1401
211#define KSZ9893_PORT1_IG_RATE_LIMIT_CTRL 0x1403
212#define KSZ9893_PORT1_PRIO0_IG_LIMIT_CTRL 0x1410
213#define KSZ9893_PORT1_PRIO1_IG_LIMIT_CTRL 0x1411
214#define KSZ9893_PORT1_PRIO2_IG_LIMIT_CTRL 0x1412
215#define KSZ9893_PORT1_PRIO3_IG_LIMIT_CTRL 0x1413
216#define KSZ9893_PORT1_PRIO4_IG_LIMIT_CTRL 0x1414
217#define KSZ9893_PORT1_PRIO5_IG_LIMIT_CTRL 0x1415
218#define KSZ9893_PORT1_PRIO6_IG_LIMIT_CTRL 0x1416
219#define KSZ9893_PORT1_PRIO7_IG_LIMIT_CTRL 0x1417
220#define KSZ9893_PORT1_QUEUE0_EG_LIMIT_CTRL 0x1420
221#define KSZ9893_PORT1_QUEUE1_EG_LIMIT_CTRL 0x1421
222#define KSZ9893_PORT1_QUEUE2_EG_LIMIT_CTRL 0x1422
223#define KSZ9893_PORT1_QUEUE3_EG_LIMIT_CTRL 0x1423
224#define KSZ9893_PORT1_MIB_CTRL_STAT 0x1500
225#define KSZ9893_PORT1_MIB_DATA 0x1504
226#define KSZ9893_PORT1_ACL_ACCESS0 0x1600
227#define KSZ9893_PORT1_ACL_ACCESS1 0x1601
228#define KSZ9893_PORT1_ACL_ACCESS2 0x1602
229#define KSZ9893_PORT1_ACL_ACCESS3 0x1603
230#define KSZ9893_PORT1_ACL_ACCESS4 0x1604
231#define KSZ9893_PORT1_ACL_ACCESS5 0x1605
232#define KSZ9893_PORT1_ACL_ACCESS6 0x1606
233#define KSZ9893_PORT1_ACL_ACCESS7 0x1607
234#define KSZ9893_PORT1_ACL_ACCESS8 0x1608
235#define KSZ9893_PORT1_ACL_ACCESS9 0x1609
236#define KSZ9893_PORT1_ACL_ACCESS10 0x160A
237#define KSZ9893_PORT1_ACL_ACCESS11 0x160B
238#define KSZ9893_PORT1_ACL_ACCESS12 0x160C
239#define KSZ9893_PORT1_ACL_ACCESS13 0x160D
240#define KSZ9893_PORT1_ACL_ACCESS14 0x160E
241#define KSZ9893_PORT1_ACL_ACCESS15 0x160F
242#define KSZ9893_PORT1_ACL_BYTE_EN_MSB 0x1610
243#define KSZ9893_PORT1_ACL_BYTE_EN_LSB 0x1611
244#define KSZ9893_PORT1_ACL_ACCESS_CTRL0 0x1612
245#define KSZ9893_PORT1_MIRRORING_CTRL 0x1800
246#define KSZ9893_PORT1_PRIO_CTRL 0x1801
247#define KSZ9893_PORT1_IG_MAC_CTRL 0x1802
248#define KSZ9893_PORT1_AUTH_CTRL 0x1803
249#define KSZ9893_PORT1_PTR 0x1804
250#define KSZ9893_PORT1_PRIO_TO_QUEUE_MAPPING 0x1808
251#define KSZ9893_PORT1_POLICE_CTRL 0x180C
252#define KSZ9893_PORT1_TX_QUEUE_INDEX 0x1900
253#define KSZ9893_PORT1_TX_QUEUE_PVID 0x1904
254#define KSZ9893_PORT1_TX_QUEUE_CTRL0 0x1914
255#define KSZ9893_PORT1_TX_QUEUE_CTRL1 0x1915
256#define KSZ9893_PORT1_CTRL0 0x1A00
257#define KSZ9893_PORT1_CTRL1 0x1A04
258#define KSZ9893_PORT1_CTRL2 0x1B00
259#define KSZ9893_PORT1_MSTP_PTR 0x1B01
260#define KSZ9893_PORT1_MSTP_STATE 0x1B04
261#define KSZ9893_PORT2_DEFAULT_TAG0 0x2000
262#define KSZ9893_PORT2_DEFAULT_TAG1 0x2001
263#define KSZ9893_PORT2_PME_WOL_EVENT 0x2013
264#define KSZ9893_PORT2_PME_WOL_EN 0x2017
265#define KSZ9893_PORT2_INT_STATUS 0x201B
266#define KSZ9893_PORT2_INT_MASK 0x201F
267#define KSZ9893_PORT2_OP_CTRL0 0x2020
268#define KSZ9893_PORT2_STATUS 0x2030
269#define KSZ9893_PORT2_MAC_CTRL0 0x2400
270#define KSZ9893_PORT2_MAC_CTRL1 0x2401
271#define KSZ9893_PORT2_IG_RATE_LIMIT_CTRL 0x2403
272#define KSZ9893_PORT2_PRIO0_IG_LIMIT_CTRL 0x2410
273#define KSZ9893_PORT2_PRIO1_IG_LIMIT_CTRL 0x2411
274#define KSZ9893_PORT2_PRIO2_IG_LIMIT_CTRL 0x2412
275#define KSZ9893_PORT2_PRIO3_IG_LIMIT_CTRL 0x2413
276#define KSZ9893_PORT2_PRIO4_IG_LIMIT_CTRL 0x2414
277#define KSZ9893_PORT2_PRIO5_IG_LIMIT_CTRL 0x2415
278#define KSZ9893_PORT2_PRIO6_IG_LIMIT_CTRL 0x2416
279#define KSZ9893_PORT2_PRIO7_IG_LIMIT_CTRL 0x2417
280#define KSZ9893_PORT2_QUEUE0_EG_LIMIT_CTRL 0x2420
281#define KSZ9893_PORT2_QUEUE1_EG_LIMIT_CTRL 0x2421
282#define KSZ9893_PORT2_QUEUE2_EG_LIMIT_CTRL 0x2422
283#define KSZ9893_PORT2_QUEUE3_EG_LIMIT_CTRL 0x2423
284#define KSZ9893_PORT2_MIB_CTRL_STAT 0x2500
285#define KSZ9893_PORT2_MIB_DATA 0x2504
286#define KSZ9893_PORT2_ACL_ACCESS0 0x2600
287#define KSZ9893_PORT2_ACL_ACCESS1 0x2601
288#define KSZ9893_PORT2_ACL_ACCESS2 0x2602
289#define KSZ9893_PORT2_ACL_ACCESS3 0x2603
290#define KSZ9893_PORT2_ACL_ACCESS4 0x2604
291#define KSZ9893_PORT2_ACL_ACCESS5 0x2605
292#define KSZ9893_PORT2_ACL_ACCESS6 0x2606
293#define KSZ9893_PORT2_ACL_ACCESS7 0x2607
294#define KSZ9893_PORT2_ACL_ACCESS8 0x2608
295#define KSZ9893_PORT2_ACL_ACCESS9 0x2609
296#define KSZ9893_PORT2_ACL_ACCESS10 0x260A
297#define KSZ9893_PORT2_ACL_ACCESS11 0x260B
298#define KSZ9893_PORT2_ACL_ACCESS12 0x260C
299#define KSZ9893_PORT2_ACL_ACCESS13 0x260D
300#define KSZ9893_PORT2_ACL_ACCESS14 0x260E
301#define KSZ9893_PORT2_ACL_ACCESS15 0x260F
302#define KSZ9893_PORT2_ACL_BYTE_EN_MSB 0x2610
303#define KSZ9893_PORT2_ACL_BYTE_EN_LSB 0x2611
304#define KSZ9893_PORT2_ACL_ACCESS_CTRL0 0x2612
305#define KSZ9893_PORT2_MIRRORING_CTRL 0x2800
306#define KSZ9893_PORT2_PRIO_CTRL 0x2801
307#define KSZ9893_PORT2_IG_MAC_CTRL 0x2802
308#define KSZ9893_PORT2_AUTH_CTRL 0x2803
309#define KSZ9893_PORT2_PTR 0x2804
310#define KSZ9893_PORT2_PRIO_TO_QUEUE_MAPPING 0x2808
311#define KSZ9893_PORT2_POLICE_CTRL 0x280C
312#define KSZ9893_PORT2_TX_QUEUE_INDEX 0x2900
313#define KSZ9893_PORT2_TX_QUEUE_PVID 0x2904
314#define KSZ9893_PORT2_TX_QUEUE_CTRL0 0x2914
315#define KSZ9893_PORT2_TX_QUEUE_CTRL1 0x2915
316#define KSZ9893_PORT2_CTRL0 0x2A00
317#define KSZ9893_PORT2_CTRL1 0x2A04
318#define KSZ9893_PORT2_CTRL2 0x2B00
319#define KSZ9893_PORT2_MSTP_PTR 0x2B01
320#define KSZ9893_PORT2_MSTP_STATE 0x2B04
321#define KSZ9893_PORT3_DEFAULT_TAG0 0x3000
322#define KSZ9893_PORT3_DEFAULT_TAG1 0x3001
323#define KSZ9893_PORT3_PME_WOL_EVENT 0x3013
324#define KSZ9893_PORT3_PME_WOL_EN 0x3017
325#define KSZ9893_PORT3_INT_STATUS 0x301B
326#define KSZ9893_PORT3_INT_MASK 0x301F
327#define KSZ9893_PORT3_OP_CTRL0 0x3020
328#define KSZ9893_PORT3_STATUS 0x3030
329#define KSZ9893_PORT3_XMII_CTRL0 0x3300
330#define KSZ9893_PORT3_XMII_CTRL1 0x3301
331#define KSZ9893_PORT3_XMII_CTRL3 0x3303
332#define KSZ9893_PORT3_MAC_CTRL0 0x3400
333#define KSZ9893_PORT3_MAC_CTRL1 0x3401
334#define KSZ9893_PORT3_IG_RATE_LIMIT_CTRL 0x3403
335#define KSZ9893_PORT3_PRIO0_IG_LIMIT_CTRL 0x3410
336#define KSZ9893_PORT3_PRIO1_IG_LIMIT_CTRL 0x3411
337#define KSZ9893_PORT3_PRIO2_IG_LIMIT_CTRL 0x3412
338#define KSZ9893_PORT3_PRIO3_IG_LIMIT_CTRL 0x3413
339#define KSZ9893_PORT3_PRIO4_IG_LIMIT_CTRL 0x3414
340#define KSZ9893_PORT3_PRIO5_IG_LIMIT_CTRL 0x3415
341#define KSZ9893_PORT3_PRIO6_IG_LIMIT_CTRL 0x3416
342#define KSZ9893_PORT3_PRIO7_IG_LIMIT_CTRL 0x3417
343#define KSZ9893_PORT3_QUEUE0_EG_LIMIT_CTRL 0x3420
344#define KSZ9893_PORT3_QUEUE1_EG_LIMIT_CTRL 0x3421
345#define KSZ9893_PORT3_QUEUE2_EG_LIMIT_CTRL 0x3422
346#define KSZ9893_PORT3_QUEUE3_EG_LIMIT_CTRL 0x3423
347#define KSZ9893_PORT3_MIB_CTRL_STAT 0x3500
348#define KSZ9893_PORT3_MIB_DATA 0x3504
349#define KSZ9893_PORT3_ACL_ACCESS0 0x3600
350#define KSZ9893_PORT3_ACL_ACCESS1 0x3601
351#define KSZ9893_PORT3_ACL_ACCESS2 0x3602
352#define KSZ9893_PORT3_ACL_ACCESS3 0x3603
353#define KSZ9893_PORT3_ACL_ACCESS4 0x3604
354#define KSZ9893_PORT3_ACL_ACCESS5 0x3605
355#define KSZ9893_PORT3_ACL_ACCESS6 0x3606
356#define KSZ9893_PORT3_ACL_ACCESS7 0x3607
357#define KSZ9893_PORT3_ACL_ACCESS8 0x3608
358#define KSZ9893_PORT3_ACL_ACCESS9 0x3609
359#define KSZ9893_PORT3_ACL_ACCESS10 0x360A
360#define KSZ9893_PORT3_ACL_ACCESS11 0x360B
361#define KSZ9893_PORT3_ACL_ACCESS12 0x360C
362#define KSZ9893_PORT3_ACL_ACCESS13 0x360D
363#define KSZ9893_PORT3_ACL_ACCESS14 0x360E
364#define KSZ9893_PORT3_ACL_ACCESS15 0x360F
365#define KSZ9893_PORT3_ACL_BYTE_EN_MSB 0x3610
366#define KSZ9893_PORT3_ACL_BYTE_EN_LSB 0x3611
367#define KSZ9893_PORT3_ACL_ACCESS_CTRL0 0x3612
368#define KSZ9893_PORT3_MIRRORING_CTRL 0x3800
369#define KSZ9893_PORT3_PRIO_CTRL 0x3801
370#define KSZ9893_PORT3_IG_MAC_CTRL 0x3802
371#define KSZ9893_PORT3_AUTH_CTRL 0x3803
372#define KSZ9893_PORT3_PTR 0x3804
373#define KSZ9893_PORT3_PRIO_TO_QUEUE_MAPPING 0x3808
374#define KSZ9893_PORT3_POLICE_CTRL 0x380C
375#define KSZ9893_PORT3_TX_QUEUE_INDEX 0x3900
376#define KSZ9893_PORT3_TX_QUEUE_PVID 0x3904
377#define KSZ9893_PORT3_TX_QUEUE_CTRL0 0x3914
378#define KSZ9893_PORT3_TX_QUEUE_CTRL1 0x3915
379#define KSZ9893_PORT3_CTRL0 0x3A00
380#define KSZ9893_PORT3_CTRL1 0x3A04
381#define KSZ9893_PORT3_CTRL2 0x3B00
382#define KSZ9893_PORT3_MSTP_PTR 0x3B01
383#define KSZ9893_PORT3_MSTP_STATE 0x3B04
384
385//KSZ9893 Switch register access macros
386#define KSZ9893_PORTn_DEFAULT_TAG0(port) (0x0000 + ((port) * 0x1000))
387#define KSZ9893_PORTn_DEFAULT_TAG1(port) (0x0001 + ((port) * 0x1000))
388#define KSZ9893_PORTn_PME_WOL_EVENT(port) (0x0013 + ((port) * 0x1000))
389#define KSZ9893_PORTn_PME_WOL_EN(port) (0x0017 + ((port) * 0x1000))
390#define KSZ9893_PORTn_INT_STATUS(port) (0x001B + ((port) * 0x1000))
391#define KSZ9893_PORTn_INT_MASK(port) (0x001F + ((port) * 0x1000))
392#define KSZ9893_PORTn_OP_CTRL0(port) (0x0020 + ((port) * 0x1000))
393#define KSZ9893_PORTn_STATUS(port) (0x0030 + ((port) * 0x1000))
394#define KSZ9893_PORTn_XMII_CTRL0(port) (0x0300 + ((port) * 0x1000))
395#define KSZ9893_PORTn_XMII_CTRL1(port) (0x0301 + ((port) * 0x1000))
396#define KSZ9893_PORTn_XMII_CTRL3(port) (0x0303 + ((port) * 0x1000))
397#define KSZ9893_PORTn_MAC_CTRL0(port) (0x0400 + ((port) * 0x1000))
398#define KSZ9893_PORTn_MAC_CTRL1(port) (0x0401 + ((port) * 0x1000))
399#define KSZ9893_PORTn_IG_RATE_LIMIT_CTRL(port) (0x0403 + ((port) * 0x1000))
400#define KSZ9893_PORTn_PRIO0_IG_LIMIT_CTRL(port) (0x0410 + ((port) * 0x1000))
401#define KSZ9893_PORTn_PRIO1_IG_LIMIT_CTRL(port) (0x0411 + ((port) * 0x1000))
402#define KSZ9893_PORTn_PRIO2_IG_LIMIT_CTRL(port) (0x0412 + ((port) * 0x1000))
403#define KSZ9893_PORTn_PRIO3_IG_LIMIT_CTRL(port) (0x0413 + ((port) * 0x1000))
404#define KSZ9893_PORTn_PRIO4_IG_LIMIT_CTRL(port) (0x0414 + ((port) * 0x1000))
405#define KSZ9893_PORTn_PRIO5_IG_LIMIT_CTRL(port) (0x0415 + ((port) * 0x1000))
406#define KSZ9893_PORTn_PRIO6_IG_LIMIT_CTRL(port) (0x0416 + ((port) * 0x1000))
407#define KSZ9893_PORTn_PRIO7_IG_LIMIT_CTRL(port) (0x0417 + ((port) * 0x1000))
408#define KSZ9893_PORTn_QUEUE0_EG_LIMIT_CTRL(port) (0x0420 + ((port) * 0x1000))
409#define KSZ9893_PORTn_QUEUE1_EG_LIMIT_CTRL(port) (0x0421 + ((port) * 0x1000))
410#define KSZ9893_PORTn_QUEUE2_EG_LIMIT_CTRL(port) (0x0422 + ((port) * 0x1000))
411#define KSZ9893_PORTn_QUEUE3_EG_LIMIT_CTRL(port) (0x0423 + ((port) * 0x1000))
412#define KSZ9893_PORTn_MIB_CTRL_STAT(port) (0x0500 + ((port) * 0x1000))
413#define KSZ9893_PORTn_MIB_DATA(port) (0x0504 + ((port) * 0x1000))
414#define KSZ9893_PORTn_ACL_ACCESS0(port) (0x0600 + ((port) * 0x1000))
415#define KSZ9893_PORTn_ACL_ACCESS1(port) (0x0601 + ((port) * 0x1000))
416#define KSZ9893_PORTn_ACL_ACCESS2(port) (0x0602 + ((port) * 0x1000))
417#define KSZ9893_PORTn_ACL_ACCESS3(port) (0x0603 + ((port) * 0x1000))
418#define KSZ9893_PORTn_ACL_ACCESS4(port) (0x0604 + ((port) * 0x1000))
419#define KSZ9893_PORTn_ACL_ACCESS5(port) (0x0605 + ((port) * 0x1000))
420#define KSZ9893_PORTn_ACL_ACCESS6(port) (0x0606 + ((port) * 0x1000))
421#define KSZ9893_PORTn_ACL_ACCESS7(port) (0x0607 + ((port) * 0x1000))
422#define KSZ9893_PORTn_ACL_ACCESS8(port) (0x0608 + ((port) * 0x1000))
423#define KSZ9893_PORTn_ACL_ACCESS9(port) (0x0609 + ((port) * 0x1000))
424#define KSZ9893_PORTn_ACL_ACCESS10(port) (0x060A + ((port) * 0x1000))
425#define KSZ9893_PORTn_ACL_ACCESS11(port) (0x060B + ((port) * 0x1000))
426#define KSZ9893_PORTn_ACL_ACCESS12(port) (0x060C + ((port) * 0x1000))
427#define KSZ9893_PORTn_ACL_ACCESS13(port) (0x060D + ((port) * 0x1000))
428#define KSZ9893_PORTn_ACL_ACCESS14(port) (0x060E + ((port) * 0x1000))
429#define KSZ9893_PORTn_ACL_ACCESS15(port) (0x060F + ((port) * 0x1000))
430#define KSZ9893_PORTn_ACL_BYTE_EN_MSB(port) (0x0610 + ((port) * 0x1000))
431#define KSZ9893_PORTn_ACL_BYTE_EN_LSB(port) (0x0611 + ((port) * 0x1000))
432#define KSZ9893_PORTn_ACL_ACCESS_CTRL0(port) (0x0612 + ((port) * 0x1000))
433#define KSZ9893_PORTn_MIRRORING_CTRL(port) (0x0800 + ((port) * 0x1000))
434#define KSZ9893_PORTn_PRIO_CTRL(port) (0x0801 + ((port) * 0x1000))
435#define KSZ9893_PORTn_IG_MAC_CTRL(port) (0x0802 + ((port) * 0x1000))
436#define KSZ9893_PORTn_AUTH_CTRL(port) (0x0803 + ((port) * 0x1000))
437#define KSZ9893_PORTn_PTR(port) (0x0804 + ((port) * 0x1000))
438#define KSZ9893_PORTn_PRIO_TO_QUEUE_MAPPING(port) (0x0808 + ((port) * 0x1000))
439#define KSZ9893_PORTn_POLICE_CTRL(port) (0x080C + ((port) * 0x1000))
440#define KSZ9893_PORTn_TX_QUEUE_INDEX(port) (0x0900 + ((port) * 0x1000))
441#define KSZ9893_PORTn_TX_QUEUE_PVID(port) (0x0904 + ((port) * 0x1000))
442#define KSZ9893_PORTn_TX_QUEUE_CTRL0(port) (0x0914 + ((port) * 0x1000))
443#define KSZ9893_PORTn_TX_QUEUE_CTRL1(port) (0x0915 + ((port) * 0x1000))
444#define KSZ9893_PORTn_CTRL0(port) (0x0A00 + ((port) * 0x1000))
445#define KSZ9893_PORTn_CTRL1(port) (0x0A04 + ((port) * 0x1000))
446#define KSZ9893_PORTn_CTRL2(port) (0x0B00 + ((port) * 0x1000))
447#define KSZ9893_PORTn_MSTP_PTR(port) (0x0B01 + ((port) * 0x1000))
448#define KSZ9893_PORTn_MSTP_STATE(port) (0x0B04 + ((port) * 0x1000))
449#define KSZ9893_PORTn_ETH_PHY_REG(port, addr) (0x0100 + ((port) * 0x1000) + ((addr) * 2))
450
451//PHY Basic Control register
452#define KSZ9893_BMCR_RESET 0x8000
453#define KSZ9893_BMCR_LOOPBACK 0x4000
454#define KSZ9893_BMCR_SPEED_SEL_LSB 0x2000
455#define KSZ9893_BMCR_AN_EN 0x1000
456#define KSZ9893_BMCR_POWER_DOWN 0x0800
457#define KSZ9893_BMCR_ISOLATE 0x0400
458#define KSZ9893_BMCR_RESTART_AN 0x0200
459#define KSZ9893_BMCR_DUPLEX_MODE 0x0100
460#define KSZ9893_BMCR_COL_TEST 0x0080
461#define KSZ9893_BMCR_SPEED_SEL_MSB 0x0040
462
463//PHY Basic Status register
464#define KSZ9893_BMSR_100BT4 0x8000
465#define KSZ9893_BMSR_100BTX_FD 0x4000
466#define KSZ9893_BMSR_100BTX_HD 0x2000
467#define KSZ9893_BMSR_10BT_FD 0x1000
468#define KSZ9893_BMSR_10BT_HD 0x0800
469#define KSZ9893_BMSR_EXTENDED_STATUS 0x0100
470#define KSZ9893_BMSR_MF_PREAMBLE_SUPPR 0x0040
471#define KSZ9893_BMSR_AN_COMPLETE 0x0020
472#define KSZ9893_BMSR_REMOTE_FAULT 0x0010
473#define KSZ9893_BMSR_AN_CAPABLE 0x0008
474#define KSZ9893_BMSR_LINK_STATUS 0x0004
475#define KSZ9893_BMSR_JABBER_DETECT 0x0002
476#define KSZ9893_BMSR_EXTENDED_CAPABLE 0x0001
477
478//PHY ID High register
479#define KSZ9893_PHYID1_DEFAULT 0x0022
480
481//PHY ID Low register
482#define KSZ9893_PHYID2_DEFAULT 0x1631
483
484//PHY Auto-Negotiation Advertisement register
485#define KSZ9893_ANAR_NEXT_PAGE 0x8000
486#define KSZ9893_ANAR_REMOTE_FAULT 0x2000
487#define KSZ9893_ANAR_PAUSE 0x0C00
488#define KSZ9893_ANAR_100BT4 0x0200
489#define KSZ9893_ANAR_100BTX_FD 0x0100
490#define KSZ9893_ANAR_100BTX_HD 0x0080
491#define KSZ9893_ANAR_10BT_FD 0x0040
492#define KSZ9893_ANAR_10BT_HD 0x0020
493#define KSZ9893_ANAR_SELECTOR 0x001F
494#define KSZ9893_ANAR_SELECTOR_DEFAULT 0x0001
495
496//PHY Auto-Negotiation Link Partner Ability register
497#define KSZ9893_ANLPAR_NEXT_PAGE 0x8000
498#define KSZ9893_ANLPAR_ACK 0x4000
499#define KSZ9893_ANLPAR_REMOTE_FAULT 0x2000
500#define KSZ9893_ANLPAR_PAUSE 0x0C00
501#define KSZ9893_ANLPAR_100BT4 0x0200
502#define KSZ9893_ANLPAR_100BTX_FD 0x0100
503#define KSZ9893_ANLPAR_100BTX_HD 0x0080
504#define KSZ9893_ANLPAR_10BT_FD 0x0040
505#define KSZ9893_ANLPAR_10BT_HD 0x0020
506#define KSZ9893_ANLPAR_SELECTOR 0x001F
507#define KSZ9893_ANLPAR_SELECTOR_DEFAULT 0x0001
508
509//PHY Auto-Negotiation Expansion Status register
510#define KSZ9893_ANER_PAR_DETECT_FAULT 0x0010
511#define KSZ9893_ANER_LP_NEXT_PAGE_ABLE 0x0008
512#define KSZ9893_ANER_NEXT_PAGE_ABLE 0x0004
513#define KSZ9893_ANER_PAGE_RECEIVED 0x0002
514#define KSZ9893_ANER_LP_AN_ABLE 0x0001
515
516//PHY Auto-Negotiation Next Page register
517#define KSZ9893_ANNPR_NEXT_PAGE 0x8000
518#define KSZ9893_ANNPR_MSG_PAGE 0x2000
519#define KSZ9893_ANNPR_ACK2 0x1000
520#define KSZ9893_ANNPR_TOGGLE 0x0800
521#define KSZ9893_ANNPR_MESSAGE 0x07FF
522
523//PHY Auto-Negotiation Link Partner Next Page Ability register
524#define KSZ9893_ANLPNPR_NEXT_PAGE 0x8000
525#define KSZ9893_ANLPNPR_ACK 0x4000
526#define KSZ9893_ANLPNPR_MSG_PAGE 0x2000
527#define KSZ9893_ANLPNPR_ACK2 0x1000
528#define KSZ9893_ANLPNPR_TOGGLE 0x0800
529#define KSZ9893_ANLPNPR_MESSAGE 0x07FF
530
531//PHY 1000BASE-T Control register
532#define KSZ9893_GBCR_TEST_MODE 0xE000
533#define KSZ9893_GBCR_MS_MAN_CONF_EN 0x1000
534#define KSZ9893_GBCR_MS_MAN_CONF_VAL 0x0800
535#define KSZ9893_GBCR_PORT_TYPE 0x0400
536#define KSZ9893_GBCR_1000BT_FD 0x0200
537#define KSZ9893_GBCR_1000BT_HD 0x0100
538
539//PHY 1000BASE-T Status register
540#define KSZ9893_GBSR_MS_CONF_FAULT 0x8000
541#define KSZ9893_GBSR_MS_CONF_RES 0x4000
542#define KSZ9893_GBSR_LOCAL_RECEIVER_STATUS 0x2000
543#define KSZ9893_GBSR_REMOTE_RECEIVER_STATUS 0x1000
544#define KSZ9893_GBSR_LP_1000BT_FD 0x0800
545#define KSZ9893_GBSR_LP_1000BT_HD 0x0400
546#define KSZ9893_GBSR_IDLE_ERR_COUNT 0x00FF
547
548//PHY MMD Setup register
549#define KSZ9893_MMDACR_FUNC 0xC000
550#define KSZ9893_MMDACR_FUNC_ADDR 0x0000
551#define KSZ9893_MMDACR_FUNC_DATA_NO_POST_INC 0x4000
552#define KSZ9893_MMDACR_FUNC_DATA_POST_INC_RW 0x8000
553#define KSZ9893_MMDACR_FUNC_DATA_POST_INC_W 0xC000
554#define KSZ9893_MMDACR_DEVAD 0x001F
555
556//PHY Extended Status register
557#define KSZ9893_GBESR_1000BX_FD 0x8000
558#define KSZ9893_GBESR_1000BX_HD 0x4000
559#define KSZ9893_GBESR_1000BT_FD 0x2000
560#define KSZ9893_GBESR_1000BT_HD 0x1000
561
562//PHY Remote Loopback register
563#define KSZ9893_RLB_REMOTE_LOOPBACK 0x0100
564
565//PHY LinkMD register
566#define KSZ9893_LINKMD_TEST_EN 0x8000
567#define KSZ9893_LINKMD_PAIR 0x3000
568#define KSZ9893_LINKMD_PAIR_A 0x0000
569#define KSZ9893_LINKMD_PAIR_B 0x1000
570#define KSZ9893_LINKMD_PAIR_C 0x2000
571#define KSZ9893_LINKMD_PAIR_D 0x3000
572#define KSZ9893_LINKMD_STATUS 0x0300
573#define KSZ9893_LINKMD_STATUS_NORMAL 0x0000
574#define KSZ9893_LINKMD_STATUS_OPEN 0x0100
575#define KSZ9893_LINKMD_STATUS_SHORT 0x0200
576
577//PHY Digital PMA/PCS Status register
578#define KSZ9893_DPMAPCSS_1000BT_LINK_STATUS 0x0002
579#define KSZ9893_DPMAPCSS_100BTX_LINK_STATUS 0x0001
580
581//Port Interrupt Control/Status register
582#define KSZ9893_ICSR_JABBER_IE 0x8000
583#define KSZ9893_ICSR_RECEIVE_ERROR_IE 0x4000
584#define KSZ9893_ICSR_PAGE_RECEIVED_IE 0x2000
585#define KSZ9893_ICSR_PAR_DETECT_FAULT_IE 0x1000
586#define KSZ9893_ICSR_LP_ACK_IE 0x0800
587#define KSZ9893_ICSR_LINK_DOWN_IE 0x0400
588#define KSZ9893_ICSR_REMOTE_FAULT_IE 0x0200
589#define KSZ9893_ICSR_LINK_UP_IE 0x0100
590#define KSZ9893_ICSR_JABBER_IF 0x0080
591#define KSZ9893_ICSR_RECEIVE_ERROR_IF 0x0040
592#define KSZ9893_ICSR_PAGE_RECEIVED_IF 0x0020
593#define KSZ9893_ICSR_PAR_DETECT_FAULT_IF 0x0010
594#define KSZ9893_ICSR_LP_ACK_IF 0x0008
595#define KSZ9893_ICSR_LINK_DOWN_IF 0x0004
596#define KSZ9893_ICSR_REMOTE_FAULT_IF 0x0002
597#define KSZ9893_ICSR_LINK_UP_IF 0x0001
598
599//PHY Auto MDI/MDI-X register
600#define KSZ9893_AUTOMDI_MDI_SET 0x0080
601#define KSZ9893_AUTOMDI_SWAP_OFF 0x0040
602
603//PHY Control register
604#define KSZ9893_PHYCON_JABBER_EN 0x0200
605#define KSZ9893_PHYCON_SPEED_1000BT 0x0040
606#define KSZ9893_PHYCON_SPEED_100BTX 0x0020
607#define KSZ9893_PHYCON_SPEED_10BT 0x0010
608#define KSZ9893_PHYCON_DUPLEX_STATUS 0x0008
609#define KSZ9893_PHYCON_1000BT_MS_STATUS 0x0004
610
611//MMD LED Mode register
612#define KSZ9893_MMD_LED_MODE_LED_MODE 0x0010
613#define KSZ9893_MMD_LED_MODE_LED_MODE_TRI_COLOR_DUAL 0x0000
614#define KSZ9893_MMD_LED_MODE_LED_MODE_SINGLE 0x0010
615#define KSZ9893_MMD_LED_MODE_RESERVED 0x000F
616#define KSZ9893_MMD_LED_MODE_RESERVED_DEFAULT 0x0001
617
618//MMD EEE Advertisement register
619#define KSZ9893_MMD_EEE_ADV_1000BT_EEE_EN 0x0004
620#define KSZ9893_MMD_EEE_ADV_100BT_EEE_EN 0x0002
621
622//Global Chip ID 0 register
623#define KSZ9893_CHIP_ID0_DEFAULT 0x00
624
625//Global Chip ID 1 register
626#define KSZ9893_CHIP_ID1_DEFAULT 0x98
627
628//Global Chip ID 2 register
629#define KSZ9893_CHIP_ID2_DEFAULT 0x93
630
631//Global Chip ID 3 register
632#define KSZ9893_CHIP_ID3_REVISION_ID 0xF0
633#define KSZ9893_CHIP_ID3_GLOBAL_SOFT_RESET 0x01
634
635//PME Pin Control register
636#define KSZ9893_PME_PIN_CTRL_PME_PIN_OUT_EN 0x02
637#define KSZ9893_PME_PIN_CTRL_PME_PIN_OUT_POL 0x01
638
639//Global Chip ID 4 register
640#define KSZ9893_CHIP_ID4_SKU_ID 0xFF
641
642//Global Interrupt Status register
643#define KSZ9893_GLOBAL_INT_STAT_LUE 0x80000000
644
645//Global Interrupt Mask register
646#define KSZ9893_GLOBAL_INT_MASK_LUE 0x80000000
647
648//Global Port Interrupt Status register
649#define KSZ9893_GLOBAL_PORT_INT_STAT_PORT3 0x00000004
650#define KSZ9893_GLOBAL_PORT_INT_STAT_PORT2 0x00000002
651#define KSZ9893_GLOBAL_PORT_INT_STAT_PORT1 0x00000001
652
653//Global Port Interrupt Mask register
654#define KSZ9893_GLOBAL_PORT_INT_MASK_PORT3 0x00000004
655#define KSZ9893_GLOBAL_PORT_INT_MASK_PORT2 0x00000002
656#define KSZ9893_GLOBAL_PORT_INT_MASK_PORT1 0x00000001
657
658//Serial I/O Control register
659#define KSZ9893_SERIAL_IO_CTRL_MIIM_PREAMBLE_SUPPR 0x04
660#define KSZ9893_SERIAL_IO_CTRL_AUTO_SPI_DATA_OUT_EDGE_SEL 0x02
661#define KSZ9893_SERIAL_IO_CTRL_SPI_DATA_OUT_EDGE_SEL 0x01
662#define KSZ9893_SERIAL_IO_CTRL_SPI_DATA_OUT_EDGE_SEL_FALLING 0x00
663#define KSZ9893_SERIAL_IO_CTRL_SPI_DATA_OUT_EDGE_SEL_RISING 0x01
664
665//In-Band Management Control register
666#define KSZ9893_IBA_CTRL_IBA_EN 0x80000000
667#define KSZ9893_IBA_CTRL_DEST_MAC_ADDR_MATCH_EN 0x40000000
668#define KSZ9893_IBA_CTRL_IBA_RESET 0x20000000
669#define KSZ9893_IBA_CTRL_RESP_PRIO_QUEUE 0x00C00000
670#define KSZ9893_IBA_CTRL_RESP_PRIO_QUEUE_DEFAULT 0x00400000
671#define KSZ9893_IBA_CTRL_IBA_COMM 0x00070000
672#define KSZ9893_IBA_CTRL_IBA_COMM_PORT1 0x00000000
673#define KSZ9893_IBA_CTRL_IBA_COMM_PORT2 0x00010000
674#define KSZ9893_IBA_CTRL_IBA_COMM_PORT3 0x00020000
675#define KSZ9893_IBA_CTRL_TPID 0x0000FFFF
676#define KSZ9893_IBA_CTRL_TPID_DEFAULT 0x000040FE
677
678//I/O Drive Strength register
679#define KSZ9893_IO_DRIVE_STRENGTH_HIGH_SPEED_DRIVE_STRENGTH 0x70
680#define KSZ9893_IO_DRIVE_STRENGTH_LOW_SPEED_DRIVE_STRENGTH 0x07
681
682//In-Band Management Operation Status 1 register
683#define KSZ9893_IBA_OP_STAT1_GOOD_PKT_DETECT 0x80000000
684#define KSZ9893_IBA_OP_STAT1_RESP_PKT_TX_DONE 0x40000000
685#define KSZ9893_IBA_OP_STAT1_EXEC_DONE 0x20000000
686#define KSZ9893_IBA_OP_STAT1_MAC_ADDR_MISMATCH_ERR 0x00004000
687#define KSZ9893_IBA_OP_STAT1_ACCESS_FORMAT_ERR 0x00002000
688#define KSZ9893_IBA_OP_STAT1_ACCESS_CODE_ERR 0x00001000
689#define KSZ9893_IBA_OP_STAT1_ACCESS_CMD_ERR 0x00000800
690#define KSZ9893_IBA_OP_STAT1_OVERSIZE_PKT_ERR 0x00000400
691#define KSZ9893_IBA_OP_STAT1_ACCESS_CODE_ERR_LOC 0x0000007F
692
693//LED Override register
694#define KSZ9893_LED_OVERRIDE_OVERRIDE 0x0000000F
695#define KSZ9893_LED_OVERRIDE_OVERRIDE_LED1_0 0x00000001
696#define KSZ9893_LED_OVERRIDE_OVERRIDE_LED1_1 0x00000002
697#define KSZ9893_LED_OVERRIDE_OVERRIDE_LED2_0 0x00000004
698#define KSZ9893_LED_OVERRIDE_OVERRIDE_LED2_1 0x00000008
699
700//LED Output register
701#define KSZ9893_LED_OUTPUT_GPIO_OUT_CTRL 0x0000000F
702#define KSZ9893_LED_OUTPUT_GPIO_OUT_CTRL_LED1_0 0x00000001
703#define KSZ9893_LED_OUTPUT_GPIO_OUT_CTRL_LED1_1 0x00000002
704#define KSZ9893_LED_OUTPUT_GPIO_OUT_CTRL_LED2_0 0x00000004
705#define KSZ9893_LED_OUTPUT_GPIO_OUT_CTRL_LED2_1 0x00000008
706
707//Power Down Control 0 register
708#define KSZ9893_PWR_DOWN_CTRL0_PLL_PWR_DOWN 0x20
709#define KSZ9893_PWR_DOWN_CTRL0_PWR_MGMT_MODE 0x18
710#define KSZ9893_PWR_DOWN_CTRL0_PWR_MGMT_MODE_NORMAL 0x00
711#define KSZ9893_PWR_DOWN_CTRL0_PWR_MGMT_MODE_EDPD 0x08
712#define KSZ9893_PWR_DOWN_CTRL0_PWR_MGMT_MODE_SOFT_PWR_DOWN 0x10
713
714//LED Strap-In register
715#define KSZ9893_LED_STRAP_IN_STRAP_IN 0x0000000F
716#define KSZ9893_LED_STRAP_IN_STRAP_IN_LED1_0 0x00000001
717#define KSZ9893_LED_STRAP_IN_STRAP_IN_LED1_1 0x00000002
718#define KSZ9893_LED_STRAP_IN_STRAP_IN_RXD2_0 0x00000004
719#define KSZ9893_LED_STRAP_IN_STRAP_IN_RXD2_1 0x00000008
720
721//Switch Operation register
722#define KSZ9893_SWITCH_OP_DOUBLE_TAG_EN 0x80
723#define KSZ9893_SWITCH_OP_SOFT_HARD_RESET 0x02
724#define KSZ9893_SWITCH_OP_START_SWITCH 0x01
725
726//Switch Maximum Transmit Unit register
727#define KSZ9893_SWITCH_MTU_MTU 0x3FFF
728#define KSZ9893_SWITCH_MTU_MTU_DEFAULT 0x07D0
729
730//Switch ISP TPID register
731#define KSZ9893_SWITCH_ISP_TPID_ISP_TAG_TPID 0xFFFF
732
733//Switch Lookup Engine Control 0 register
734#define KSZ9893_SWITCH_LUE_CTRL0_VLAN_EN 0x80
735#define KSZ9893_SWITCH_LUE_CTRL0_DROP_INVALID_VID 0x40
736#define KSZ9893_SWITCH_LUE_CTRL0_AGE_COUNT 0x38
737#define KSZ9893_SWITCH_LUE_CTRL0_AGE_COUNT_DEFAULT 0x20
738#define KSZ9893_SWITCH_LUE_CTRL0_RESERVED_MCAST_LOOKUP_EN 0x04
739#define KSZ9893_SWITCH_LUE_CTRL0_HASH_OPTION 0x03
740#define KSZ9893_SWITCH_LUE_CTRL0_HASH_OPTION_NONE 0x00
741#define KSZ9893_SWITCH_LUE_CTRL0_HASH_OPTION_CRC 0x01
742#define KSZ9893_SWITCH_LUE_CTRL0_HASH_OPTION_XOR 0x02
743
744//Switch Lookup Engine Control 1 register
745#define KSZ9893_SWITCH_LUE_CTRL1_UNICAST_LEARNING_DIS 0x80
746#define KSZ9893_SWITCH_LUE_CTRL1_SELF_ADDR_FILT 0x40
747#define KSZ9893_SWITCH_LUE_CTRL1_FLUSH_ALU_TABLE 0x20
748#define KSZ9893_SWITCH_LUE_CTRL1_FLUSH_MSTP_ENTRIES 0x10
749#define KSZ9893_SWITCH_LUE_CTRL1_MCAST_SRC_ADDR_FILT 0x08
750#define KSZ9893_SWITCH_LUE_CTRL1_AGING_EN 0x04
751#define KSZ9893_SWITCH_LUE_CTRL1_FAST_AGING 0x02
752#define KSZ9893_SWITCH_LUE_CTRL1_LINK_DOWN_FLUSH 0x01
753
754//Switch Lookup Engine Control 2 register
755#define KSZ9893_SWITCH_LUE_CTRL2_DOUBLE_TAG_MCAST_TRAP 0x40
756#define KSZ9893_SWITCH_LUE_CTRL2_DYNAMIC_ENTRY_EG_VLAN_FILT 0x20
757#define KSZ9893_SWITCH_LUE_CTRL2_STATIC_ENTRY_EG_VLAN_FILT 0x10
758#define KSZ9893_SWITCH_LUE_CTRL2_FLUSH_OPTION 0x0C
759#define KSZ9893_SWITCH_LUE_CTRL2_FLUSH_OPTION_NONE 0x00
760#define KSZ9893_SWITCH_LUE_CTRL2_FLUSH_OPTION_DYNAMIC 0x04
761#define KSZ9893_SWITCH_LUE_CTRL2_FLUSH_OPTION_STATIC 0x08
762#define KSZ9893_SWITCH_LUE_CTRL2_FLUSH_OPTION_BOTH 0x0C
763#define KSZ9893_SWITCH_LUE_CTRL2_MAC_ADDR_PRIORITY 0x03
764
765//Switch Lookup Engine Control 3 register
766#define KSZ9893_SWITCH_LUE_CTRL3_AGE_PERIOD 0xFF
767#define KSZ9893_SWITCH_LUE_CTRL3_AGE_PERIOD_DEFAULT 0x4B
768
769//Address Lookup Table Interrupt register
770#define KSZ9893_ALU_TABLE_INT_LEARN_FAIL 0x04
771#define KSZ9893_ALU_TABLE_INT_ALMOST_FULL 0x02
772#define KSZ9893_ALU_TABLE_INT_WRITE_FAIL 0x01
773
774//Address Lookup Table Mask register
775#define KSZ9893_ALU_TABLE_MASK_LEARN_FAIL 0x04
776#define KSZ9893_ALU_TABLE_MASK_ALMOST_FULL 0x02
777#define KSZ9893_ALU_TABLE_MASK_WRITE_FAIL 0x01
778
779//Address Lookup Table Entry Index 0 register
780#define KSZ9893_ALU_TABLE_ENTRY_INDEX0_ALMOST_FULL_ENTRY_INDEX 0x0FFF
781#define KSZ9893_ALU_TABLE_ENTRY_INDEX0_FAIL_WRITE_INDEX 0x03FF
782
783//Address Lookup Table Entry Index 1 register
784#define KSZ9893_ALU_TABLE_ENTRY_INDEX1_FAIL_LEARN_INDEX 0x03FF
785
786//Address Lookup Table Entry Index 2 register
787#define KSZ9893_ALU_TABLE_ENTRY_INDEX2_CPU_ACCESS_INDEX 0x03FF
788
789//Unknown Unicast Control register
790#define KSZ9893_UNKNOWN_UNICAST_CTRL_FWD 0x80000000
791#define KSZ9893_UNKNOWN_UNICAST_CTRL_FWD_MAP 0x00000007
792#define KSZ9893_UNKNOWN_UNICAST_CTRL_FWD_MAP_PORT1 0x00000001
793#define KSZ9893_UNKNOWN_UNICAST_CTRL_FWD_MAP_PORT2 0x00000002
794#define KSZ9893_UNKNOWN_UNICAST_CTRL_FWD_MAP_PORT3 0x00000004
795#define KSZ9893_UNKNOWN_UNICAST_CTRL_FWD_MAP_ALL 0x00000007
796
797//Unknown Multicast Control register
798#define KSZ9893_UNKONWN_MULTICAST_CTRL_FWD 0x80000000
799#define KSZ9893_UNKONWN_MULTICAST_CTRL_FWD_MAP 0x00000007
800#define KSZ9893_UNKONWN_MULTICAST_CTRL_FWD_MAP_PORT1 0x00000001
801#define KSZ9893_UNKONWN_MULTICAST_CTRL_FWD_MAP_PORT2 0x00000002
802#define KSZ9893_UNKONWN_MULTICAST_CTRL_FWD_MAP_PORT3 0x00000004
803#define KSZ9893_UNKONWN_MULTICAST_CTRL_FWD_MAP_ALL 0x00000007
804
805//Unknown VLAN ID Control register
806#define KSZ9893_UNKNOWN_VLAN_ID_CTRL_FWD 0x80000000
807#define KSZ9893_UNKNOWN_VLAN_ID_CTRL_FWD_MAP 0x00000007
808#define KSZ9893_UNKNOWN_VLAN_ID_CTRL_FWD_MAP_PORT1 0x00000001
809#define KSZ9893_UNKNOWN_VLAN_ID_CTRL_FWD_MAP_PORT2 0x00000002
810#define KSZ9893_UNKNOWN_VLAN_ID_CTRL_FWD_MAP_PORT3 0x00000004
811#define KSZ9893_UNKNOWN_VLAN_ID_CTRL_FWD_MAP_ALL 0x00000007
812
813//Switch MAC Control 0 register
814#define KSZ9893_SWITCH_MAC_CTRL0_ALT_BACK_OFF_MODE 0x80
815#define KSZ9893_SWITCH_MAC_CTRL0_FRAME_LEN_CHECK_EN 0x08
816#define KSZ9893_SWITCH_MAC_CTRL0_FLOW_CTRL_PKT_DROP_MODE 0x02
817#define KSZ9893_SWITCH_MAC_CTRL0_AGGRESSIVE_BACK_OFF_EN 0x01
818
819//Switch MAC Control 1 register
820#define KSZ9893_SWITCH_MAC_CTRL1_MCAST_STORM_PROTECT_DIS 0x40
821#define KSZ9893_SWITCH_MAC_CTRL1_BACK_PRESSURE_MODE 0x20
822#define KSZ9893_SWITCH_MAC_CTRL1_FLOW_CTRL_FAIR_MODE 0x10
823#define KSZ9893_SWITCH_MAC_CTRL1_NO_EXCESSIVE_COL_DROP 0x08
824#define KSZ9893_SWITCH_MAC_CTRL1_JUMBO_PKT_SUPPORT 0x04
825#define KSZ9893_SWITCH_MAC_CTRL1_MAX_PKT_SIZE_CHECK_DIS 0x02
826#define KSZ9893_SWITCH_MAC_CTRL1_PASS_SHORT_PKT 0x01
827
828//Switch MAC Control 2 register
829#define KSZ9893_SWITCH_MAC_CTRL2_NULL_VID_REPLACEMENT 0x08
830#define KSZ9893_SWITCH_MAC_CTRL2_BCAST_STORM_PROTECT_RATE_MSB 0x07
831
832//Switch MAC Control 3 register
833#define KSZ9893_SWITCH_MAC_CTRL3_BCAST_STORM_PROTECT_RATE_LSB 0xFF
834
835//Switch MAC Control 4 register
836#define KSZ9893_SWITCH_MAC_CTRL4_PASS_FLOW_CTRL_PKT 0x01
837
838//Switch MAC Control 5 register
839#define KSZ9893_SWITCH_MAC_CTRL5_IG_RATE_LIMIT_PERIOD 0x30
840#define KSZ9893_SWITCH_MAC_CTRL5_IG_RATE_LIMIT_PERIOD_16MS 0x00
841#define KSZ9893_SWITCH_MAC_CTRL5_IG_RATE_LIMIT_PERIOD_64MS 0x10
842#define KSZ9893_SWITCH_MAC_CTRL5_IG_RATE_LIMIT_PERIOD_256MS 0x20
843#define KSZ9893_SWITCH_MAC_CTRL5_QUEUE_BASED_EG_RATE_LIMITE_EN 0x08
844
845//Switch MIB Control register
846#define KSZ9893_SWITCH_MIB_CTRL_FLUSH 0x80
847#define KSZ9893_SWITCH_MIB_CTRL_FREEZE 0x40
848
849//Global Port Mirroring and Snooping Control register
850#define KSZ9893_GLOBAL_PORT_MIRROR_SNOOP_CTRL_IGMP_SNOOP_EN 0x40
851#define KSZ9893_GLOBAL_PORT_MIRROR_SNOOP_CTRL_MLD_SNOOP_OPT 0x08
852#define KSZ9893_GLOBAL_PORT_MIRROR_SNOOP_CTRL_MLD_SNOOP_EN 0x04
853#define KSZ9893_GLOBAL_PORT_MIRROR_SNOOP_CTRL_SNIFF_MODE_SEL 0x01
854
855//WRED DiffServ Color Mapping register
856#define KSZ9893_WRED_DIFFSERV_COLOR_MAPPING_RED 0x30
857#define KSZ9893_WRED_DIFFSERV_COLOR_MAPPING_YELLOW 0x0C
858#define KSZ9893_WRED_DIFFSERV_COLOR_MAPPING_GREEN 0x03
859
860//Queue Management Control 0 register
861#define KSZ9893_QUEUE_MGMT_CTRL0_PRIORITY_2Q 0x000000C0
862#define KSZ9893_QUEUE_MGMT_CTRL0_UNICAST_PORT_VLAN_DISCARD 0x00000002
863
864//VLAN Table Entry 0 register
865#define KSZ9893_VLAN_TABLE_ENTRY0_VALID 0x80000000
866#define KSZ9893_VLAN_TABLE_ENTRY0_FORWARD_OPTION 0x08000000
867#define KSZ9893_VLAN_TABLE_ENTRY0_PRIORITY 0x07000000
868#define KSZ9893_VLAN_TABLE_ENTRY0_MSTP_INDEX 0x00007000
869#define KSZ9893_VLAN_TABLE_ENTRY0_FID 0x0000007F
870
871//VLAN Table Entry 1 register
872#define KSZ9893_VLAN_TABLE_ENTRY1_PORT_UNTAG 0x00000007
873#define KSZ9893_VLAN_TABLE_ENTRY1_PORT3_UNTAG 0x00000004
874#define KSZ9893_VLAN_TABLE_ENTRY1_PORT2_UNTAG 0x00000002
875#define KSZ9893_VLAN_TABLE_ENTRY1_PORT1_UNTAG 0x00000001
876
877//VLAN Table Entry 2 register
878#define KSZ9893_VLAN_TABLE_ENTRY2_PORT_FORWARD 0x00000007
879#define KSZ9893_VLAN_TABLE_ENTRY2_PORT3_FORWARD 0x00000004
880#define KSZ9893_VLAN_TABLE_ENTRY2_PORT2_FORWARD 0x00000002
881#define KSZ9893_VLAN_TABLE_ENTRY2_PORT1_FORWARD 0x00000001
882
883//VLAN Table Index register
884#define KSZ9893_VLAN_TABLE_INDEX_VLAN_INDEX 0x0FFF
885
886//VLAN Table Access Control register
887#define KSZ9893_VLAN_TABLE_ACCESS_CTRL_START_FINISH 0x80
888#define KSZ9893_VLAN_TABLE_ACCESS_CTRL_ACTION 0x03
889#define KSZ9893_VLAN_TABLE_ACCESS_CTRL_ACTION_NOP 0x00
890#define KSZ9893_VLAN_TABLE_ACCESS_CTRL_ACTION_WRITE 0x01
891#define KSZ9893_VLAN_TABLE_ACCESS_CTRL_ACTION_READ 0x02
892#define KSZ9893_VLAN_TABLE_ACCESS_CTRL_ACTION_CLEAR 0x03
893
894//ALU Table Index 0 register
895#define KSZ9893_ALU_TABLE_INDEX0_FID_INDEX 0x007F0000
896#define KSZ9893_ALU_TABLE_INDEX0_MAC_INDEX_MSB 0x0000FFFF
897
898//ALU Table Index 1 register
899#define KSZ9893_ALU_TABLE_INDEX1_MAC_INDEX_LSB 0xFFFFFFFF
900
901//ALU Table Access Control register
902#define KSZ9893_ALU_TABLE_CTRL_VALID_COUNT 0x3FFF0000
903#define KSZ9893_ALU_TABLE_CTRL_START_FINISH 0x00000080
904#define KSZ9893_ALU_TABLE_CTRL_VALID 0x00000040
905#define KSZ9893_ALU_TABLE_CTRL_VALID_ENTRY_OR_SEARCH_END 0x00000020
906#define KSZ9893_ALU_TABLE_CTRL_DIRECT 0x00000004
907#define KSZ9893_ALU_TABLE_CTRL_ACTION 0x00000003
908#define KSZ9893_ALU_TABLE_CTRL_ACTION_NOP 0x00000000
909#define KSZ9893_ALU_TABLE_CTRL_ACTION_WRITE 0x00000001
910#define KSZ9893_ALU_TABLE_CTRL_ACTION_READ 0x00000002
911#define KSZ9893_ALU_TABLE_CTRL_ACTION_SEARCH 0x00000003
912
913//Static Address and Reserved Multicast Table Control register
914#define KSZ9893_STATIC_RES_MCAST_TABLE_CTRL_TABLE_INDEX 0x003F0000
915#define KSZ9893_STATIC_RES_MCAST_TABLE_CTRL_START_FINISH 0x00000080
916#define KSZ9893_STATIC_RES_MCAST_TABLE_CTRL_TABLE_SELECT 0x00000002
917#define KSZ9893_STATIC_RES_MCAST_TABLE_CTRL_ACTION 0x00000001
918#define KSZ9893_STATIC_RES_MCAST_TABLE_CTRL_ACTION_READ 0x00000000
919#define KSZ9893_STATIC_RES_MCAST_TABLE_CTRL_ACTION_WRITE 0x00000001
920
921//ALU Table Entry 1 register
922#define KSZ9893_ALU_TABLE_ENTRY1_STATIC 0x80000000
923#define KSZ9893_ALU_TABLE_ENTRY1_SRC_FILTER 0x40000000
924#define KSZ9893_ALU_TABLE_ENTRY1_DES_FILTER 0x20000000
925#define KSZ9893_ALU_TABLE_ENTRY1_PRIORITY 0x1C000000
926#define KSZ9893_ALU_TABLE_ENTRY1_AGE_COUNT 0x1C000000
927#define KSZ9893_ALU_TABLE_ENTRY1_MSTP 0x00000007
928
929//ALU Table Entry 2 register
930#define KSZ9893_ALU_TABLE_ENTRY2_OVERRIDE 0x80000000
931#define KSZ9893_ALU_TABLE_ENTRY2_PORT_FORWARD 0x00000007
932#define KSZ9893_ALU_TABLE_ENTRY2_PORT3_FORWARD 0x00000004
933#define KSZ9893_ALU_TABLE_ENTRY2_PORT2_FORWARD 0x00000002
934#define KSZ9893_ALU_TABLE_ENTRY2_PORT1_FORWARD 0x00000001
935
936//ALU Table Entry 3 register
937#define KSZ9893_ALU_TABLE_ENTRY3_FID 0x007F0000
938#define KSZ9893_ALU_TABLE_ENTRY3_MAC_ADDR_MSB 0x0000FFFF
939
940//ALU Table Entry 4 register
941#define KSZ9893_ALU_TABLE_ENTRY4_MAC_ADDR_LSB 0xFFFFFFFF
942
943//Static Address Table Entry 1 register
944#define KSZ9893_STATIC_TABLE_ENTRY1_VALID 0x80000000
945#define KSZ9893_STATIC_TABLE_ENTRY1_SRC_FILTER 0x40000000
946#define KSZ9893_STATIC_TABLE_ENTRY1_DES_FILTER 0x20000000
947#define KSZ9893_STATIC_TABLE_ENTRY1_PRIORITY 0x1C000000
948#define KSZ9893_STATIC_TABLE_ENTRY1_MSTP 0x00000007
949
950//Static Address Table Entry 2 register
951#define KSZ9893_STATIC_TABLE_ENTRY2_OVERRIDE 0x80000000
952#define KSZ9893_STATIC_TABLE_ENTRY2_USE_FID 0x40000000
953#define KSZ9893_STATIC_TABLE_ENTRY2_PORT_FORWARD 0x00000007
954#define KSZ9893_STATIC_TABLE_ENTRY2_PORT3_FORWARD 0x00000004
955#define KSZ9893_STATIC_TABLE_ENTRY2_PORT2_FORWARD 0x00000002
956#define KSZ9893_STATIC_TABLE_ENTRY2_PORT1_FORWARD 0x00000001
957
958//Static Address Table Entry 3 register
959#define KSZ9893_STATIC_TABLE_ENTRY3_FID 0x007F0000
960#define KSZ9893_STATIC_TABLE_ENTRY3_MAC_ADDR_MSB 0x0000FFFF
961
962//Static Address Table Entry 4 register
963#define KSZ9893_STATIC_TABLE_ENTRY4_MAC_ADDR_LSB 0xFFFFFFFF
964
965//Reserved Multicast Table Entry 2 register
966#define KSZ9893_RES_MCAST_TABLE_ENTRY2_PORT_FORWARD 0x00000007
967#define KSZ9893_RES_MCAST_TABLE_ENTRY2_PORT3_FORWARD 0x00000004
968#define KSZ9893_RES_MCAST_TABLE_ENTRY2_PORT2_FORWARD 0x00000002
969#define KSZ9893_RES_MCAST_TABLE_ENTRY2_PORT1_FORWARD 0x00000001
970
971//Port N Default Tag 0 register
972#define KSZ9893_PORTn_DEFAULT_TAG0_PCP 0xE0
973#define KSZ9893_PORTn_DEFAULT_TAG0_DEI 0x10
974#define KSZ9893_PORTn_DEFAULT_TAG0_VID_MSB 0x0F
975
976//Port N Default Tag 1 register
977#define KSZ9893_PORTn_DEFAULT_TAG1_VID_LSB 0xFF
978
979//Port N Interrupt Status register
980#define KSZ9893_PORTn_INT_STATUS_PHY 0x02
981#define KSZ9893_PORTn_INT_STATUS_ACL 0x01
982
983//Port N Interrupt Mask register
984#define KSZ9893_PORTn_INT_MASK_PHY 0x02
985#define KSZ9893_PORTn_INT_MASK_ACL 0x01
986
987//Port N Operation Control 0 register
988#define KSZ9893_PORTn_OP_CTRL0_LOCAL_LOOPBACK 0x80
989#define KSZ9893_PORTn_OP_CTRL0_REMOTE_LOOPBACK 0x40
990#define KSZ9893_PORTn_OP_CTRL0_TAIL_TAG_EN 0x04
991#define KSZ9893_PORTn_OP_CTRL0_TX_QUEUE_SPLIT_EN 0x03
992
993//Port N Status register
994#define KSZ9893_PORTn_STATUS_SPEED 0x18
995#define KSZ9893_PORTn_STATUS_SPEED_10MBPS 0x00
996#define KSZ9893_PORTn_STATUS_SPEED_100MBPS 0x08
997#define KSZ9893_PORTn_STATUS_SPEED_1000MBPS 0x10
998#define KSZ9893_PORTn_STATUS_DUPLEX 0x04
999#define KSZ9893_PORTn_STATUS_TX_FLOW_CTRL_EN 0x02
1000#define KSZ9893_PORTn_STATUS_RX_FLOW_CTRL_EN 0x01
1001
1002//XMII Port N Control 0 register
1003#define KSZ9893_PORTn_XMII_CTRL0_DUPLEX 0x40
1004#define KSZ9893_PORTn_XMII_CTRL0_TX_FLOW_CTRL_EN 0x20
1005#define KSZ9893_PORTn_XMII_CTRL0_SPEED_10_100 0x10
1006#define KSZ9893_PORTn_XMII_CTRL0_RX_FLOW_CTRL_EN 0x08
1007
1008//XMII Port N Control 1 register
1009#define KSZ9893_PORTn_XMII_CTRL1_SPEED_1000 0x40
1010#define KSZ9893_PORTn_XMII_CTRL1_RGMII_ID_IG 0x10
1011#define KSZ9893_PORTn_XMII_CTRL1_RGMII_ID_EG 0x08
1012#define KSZ9893_PORTn_XMII_CTRL1_MII_RMII_MODE 0x04
1013#define KSZ9893_PORTn_XMII_CTRL1_IF_TYPE 0x03
1014#define KSZ9893_PORTn_XMII_CTRL1_IF_TYPE_MII 0x00
1015#define KSZ9893_PORTn_XMII_CTRL1_IF_TYPE_RMII 0x01
1016#define KSZ9893_PORTn_XMII_CTRL1_IF_TYPE_RGMII 0x03
1017
1018//XMII Port N Control 3 register
1019#define KSZ9893_PORTn_XMII_CTRL3_RGMII_IBS_DUPLEX_STATUS 0x08
1020#define KSZ9893_PORTn_XMII_CTRL3_RGMII_IBS_RX_CLK_SPEED 0x06
1021#define KSZ9893_PORTn_XMII_CTRL3_RGMII_IBS_LINK_STATUS 0x01
1022
1023//Port N MAC Control 0 register
1024#define KSZ9893_PORTn_MAC_CTRL0_BCAST_STORM_PROTECT_EN 0x02
1025
1026//Port N MAC Control 1 register
1027#define KSZ9893_PORTn_MAC_CTRL1_BACK_PRESSURE_EN 0x08
1028#define KSZ9893_PORTn_MAC_CTRL1_PASS_ALL_FRAMES 0x01
1029
1030//Port N MIB Control and Status register
1031#define KSZ9893_PORTn_MIB_CTRL_STAT_MIB_COUNTER_OVERFLOW 0x80000000
1032#define KSZ9893_PORTn_MIB_CTRL_STAT_MIB_READ 0x02000000
1033#define KSZ9893_PORTn_MIB_CTRL_STAT_MIB_FLUSH_FREEZE 0x01000000
1034#define KSZ9893_PORTn_MIB_CTRL_STAT_MIB_INDEX 0x00FF0000
1035#define KSZ9893_PORTn_MIB_CTRL_STAT_MIB_COUNTER_VALUE_35_32 0x0000000F
1036
1037//Port N MIB Data register
1038#define KSZ9893_PORTn_MIB_DATA_MIB_COUNTER_VALUE_31_0 0xFFFFFFFF
1039
1040//Port N ACL Access Control 0 register
1041#define KSZ9893_PORTn_ACL_ACCESS_CTRL0_WRITE_STATUS 0x40
1042#define KSZ9893_PORTn_ACL_ACCESS_CTRL0_READ_STATUS 0x20
1043#define KSZ9893_PORTn_ACL_ACCESS_CTRL0_READ 0x00
1044#define KSZ9893_PORTn_ACL_ACCESS_CTRL0_WRITE 0x10
1045#define KSZ9893_PORTn_ACL_ACCESS_CTRL0_ACL_INDEX 0x0F
1046
1047//Port N Port Mirroring Control register
1048#define KSZ9893_PORTn_MIRRORING_CTRL_RECEIVE_SNIFF 0x40
1049#define KSZ9893_PORTn_MIRRORING_CTRL_TRANSMIT_SNIFF 0x20
1050#define KSZ9893_PORTn_MIRRORING_CTRL_SNIFFER_PORT 0x02
1051
1052//Port N Authentication Control register
1053#define KSZ9893_PORTn_AUTH_CTRL_ACL_EN 0x04
1054#define KSZ9893_PORTn_AUTH_CTRL_AUTH_MODE 0x03
1055#define KSZ9893_PORTn_AUTH_CTRL_AUTH_MODE_PASS 0x00
1056#define KSZ9893_PORTn_AUTH_CTRL_AUTH_MODE_BLOCK 0x01
1057#define KSZ9893_PORTn_AUTH_CTRL_AUTH_MODE_TRAP 0x02
1058
1059//Port N Pointer register
1060#define KSZ9893_PORTn_PTR_PORT_INDEX 0x00070000
1061#define KSZ9893_PORTn_PTR_QUEUE_PTR 0x00000003
1062
1063//Port N Control 1 register
1064#define KSZ9893_PORTn_CTRL1_PORT_VLAN_MEMBERSHIP 0x00000007
1065#define KSZ9893_PORTn_CTRL1_PORT3_VLAN_MEMBERSHIP 0x00000004
1066#define KSZ9893_PORTn_CTRL1_PORT2_VLAN_MEMBERSHIP 0x00000002
1067#define KSZ9893_PORTn_CTRL1_PORT1_VLAN_MEMBERSHIP 0x00000001
1068
1069//Port N Control 2 register
1070#define KSZ9893_PORTn_CTRL2_NULL_VID_LOOKUP_EN 0x80
1071#define KSZ9893_PORTn_CTRL2_INGRESS_VLAN_FILT 0x40
1072#define KSZ9893_PORTn_CTRL2_DISCARD_NON_PVID_PKT 0x20
1073#define KSZ9893_PORTn_CTRL2_802_1X_EN 0x10
1074#define KSZ9893_PORTn_CTRL2_SELF_ADDR_FILT 0x08
1075
1076//Port N MSTP Pointer register
1077#define KSZ9893_PORTn_MSTP_PTR_MSTP_PTR 0x07
1078
1079//Port N MSTP State register
1080#define KSZ9893_PORTn_MSTP_STATE_TRANSMIT_EN 0x04
1081#define KSZ9893_PORTn_MSTP_STATE_RECEIVE_EN 0x02
1082#define KSZ9893_PORTn_MSTP_STATE_LEARNING_DIS 0x01
1083
1084//C++ guard
1085#ifdef __cplusplus
1086extern "C" {
1087#endif
1088
1089//KSZ9893 Ethernet switch driver
1090extern const SwitchDriver ksz9893SwitchDriver;
1091
1092//KSZ9893 related functions
1093error_t ksz9893Init(NetInterface *interface);
1094void ksz9893InitHook(NetInterface *interface);
1095
1096void ksz9893Tick(NetInterface *interface);
1097
1098void ksz9893EnableIrq(NetInterface *interface);
1099void ksz9893DisableIrq(NetInterface *interface);
1100
1101void ksz9893EventHandler(NetInterface *interface);
1102
1103error_t ksz9893TagFrame(NetInterface *interface, NetBuffer *buffer,
1104 size_t *offset, NetTxAncillary *ancillary);
1105
1106error_t ksz9893UntagFrame(NetInterface *interface, uint8_t **frame,
1107 size_t *length, NetRxAncillary *ancillary);
1108
1109bool_t ksz9893GetLinkState(NetInterface *interface, uint8_t port);
1110uint32_t ksz9893GetLinkSpeed(NetInterface *interface, uint8_t port);
1111NicDuplexMode ksz9893GetDuplexMode(NetInterface *interface, uint8_t port);
1112
1113void ksz9893SetPortState(NetInterface *interface, uint8_t port,
1114 SwitchPortState state);
1115
1116SwitchPortState ksz9893GetPortState(NetInterface *interface, uint8_t port);
1117
1118void ksz9893SetAgingTime(NetInterface *interface, uint32_t agingTime);
1119
1120void ksz9893EnableIgmpSnooping(NetInterface *interface, bool_t enable);
1121void ksz9893EnableMldSnooping(NetInterface *interface, bool_t enable);
1122void ksz9893EnableRsvdMcastTable(NetInterface *interface, bool_t enable);
1123
1124error_t ksz9893AddStaticFdbEntry(NetInterface *interface,
1125 const SwitchFdbEntry *entry);
1126
1127error_t ksz9893DeleteStaticFdbEntry(NetInterface *interface,
1128 const SwitchFdbEntry *entry);
1129
1130error_t ksz9893GetStaticFdbEntry(NetInterface *interface, uint_t index,
1131 SwitchFdbEntry *entry);
1132
1133void ksz9893FlushStaticFdbTable(NetInterface *interface);
1134
1135error_t ksz9893GetDynamicFdbEntry(NetInterface *interface, uint_t index,
1136 SwitchFdbEntry *entry);
1137
1138void ksz9893FlushDynamicFdbTable(NetInterface *interface, uint8_t port);
1139
1140void ksz9893SetUnknownMcastFwdPorts(NetInterface *interface,
1141 bool_t enable, uint32_t forwardPorts);
1142
1143void ksz9893WritePhyReg(NetInterface *interface, uint8_t port,
1144 uint8_t address, uint16_t data);
1145
1146uint16_t ksz9893ReadPhyReg(NetInterface *interface, uint8_t port,
1147 uint8_t address);
1148
1149void ksz9893DumpPhyReg(NetInterface *interface, uint8_t port);
1150
1151void ksz9893WriteMmdReg(NetInterface *interface, uint8_t port,
1152 uint8_t devAddr, uint16_t regAddr, uint16_t data);
1153
1154uint16_t ksz9893ReadMmdReg(NetInterface *interface, uint8_t port,
1155 uint8_t devAddr, uint16_t regAddr);
1156
1157void ksz9893WriteSwitchReg8(NetInterface *interface, uint16_t address,
1158 uint8_t data);
1159
1160uint8_t ksz9893ReadSwitchReg8(NetInterface *interface, uint16_t address);
1161
1162void ksz9893WriteSwitchReg16(NetInterface *interface, uint16_t address,
1163 uint16_t data);
1164
1165uint16_t ksz9893ReadSwitchReg16(NetInterface *interface, uint16_t address);
1166
1167void ksz9893WriteSwitchReg32(NetInterface *interface, uint16_t address,
1168 uint32_t data);
1169
1170uint32_t ksz9893ReadSwitchReg32(NetInterface *interface, uint16_t address);
1171
1172//C++ guard
1173#ifdef __cplusplus
1174}
1175#endif
1176
1177#endif
error_t
Error codes.
Definition error.h:43
Network interface controller abstraction layer.
NicDuplexMode
Duplex mode.
Definition nic.h:122
SwitchPortState
Switch port state.
Definition nic.h:134
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
Ethernet switch driver.
Definition nic.h:322
Forwarding database entry.
Definition nic.h:149