31#ifndef _LPC54XXX_ETH_DRIVER_H
32#define _LPC54XXX_ETH_DRIVER_H
38#ifndef LPC54XXX_ETH_TX_BUFFER_COUNT
39 #define LPC54XXX_ETH_TX_BUFFER_COUNT 3
40#elif (LPC54XXX_ETH_TX_BUFFER_COUNT < 1)
41 #error LPC54XXX_ETH_TX_BUFFER_COUNT parameter is not valid
45#ifndef LPC54XXX_ETH_TX_BUFFER_SIZE
46 #define LPC54XXX_ETH_TX_BUFFER_SIZE 1536
47#elif (LPC54XXX_ETH_TX_BUFFER_SIZE != 1536)
48 #error LPC54XXX_ETH_TX_BUFFER_SIZE parameter is not valid
52#ifndef LPC54XXX_ETH_RX_BUFFER_COUNT
53 #define LPC54XXX_ETH_RX_BUFFER_COUNT 6
54#elif (LPC54XXX_ETH_RX_BUFFER_COUNT < 1)
55 #error LPC54XXX_ETH_RX_BUFFER_COUNT parameter is not valid
59#ifndef LPC54XXX_ETH_RX_BUFFER_SIZE
60 #define LPC54XXX_ETH_RX_BUFFER_SIZE 1536
61#elif (LPC54XXX_ETH_RX_BUFFER_SIZE != 1536)
62 #error LPC54XXX_ETH_RX_BUFFER_SIZE parameter is not valid
66#ifndef LPC54XXX_ETH_IRQ_PRIORITY_GROUPING
67 #define LPC54XXX_ETH_IRQ_PRIORITY_GROUPING 4
68#elif (LPC54XXX_ETH_IRQ_PRIORITY_GROUPING < 0)
69 #error LPC54XXX_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
73#ifndef LPC54XXX_ETH_IRQ_GROUP_PRIORITY
74 #define LPC54XXX_ETH_IRQ_GROUP_PRIORITY 6
75#elif (LPC54XXX_ETH_IRQ_GROUP_PRIORITY < 0)
76 #error LPC54XXX_ETH_IRQ_GROUP_PRIORITY parameter is not valid
80#ifndef LPC54XXX_ETH_IRQ_SUB_PRIORITY
81 #define LPC54XXX_ETH_IRQ_SUB_PRIORITY 0
82#elif (LPC54XXX_ETH_IRQ_SUB_PRIORITY < 0)
83 #error LPC54XXX_ETH_IRQ_SUB_PRIORITY parameter is not valid
87#define ENET_TDES0_BUF1AP 0xFFFFFFFF
88#define ENET_TDES1_BUF2AP 0xFFFFFFFF
89#define ENET_TDES2_IOC 0x80000000
90#define ENET_TDES2_TTSE 0x40000000
91#define ENET_TDES2_B2L 0x3FFF0000
92#define ENET_TDES2_B1L 0x00003FFF
93#define ENET_TDES3_OWN 0x80000000
94#define ENET_TDES3_CTXT 0x40000000
95#define ENET_TDES3_FD 0x20000000
96#define ENET_TDES3_LD 0x10000000
97#define ENET_TDES3_CPC 0x0C000000
98#define ENET_TDES3_SLOTNUM 0x00780000
99#define ENET_TDES3_CIC 0x00030000
100#define ENET_TDES3_FL 0x00007FFF
103#define ENET_TDES0_TTSL 0xFFFFFFFF
104#define ENET_TDES1_TTSH 0xFFFFFFFF
105#define ENET_TDES3_OWN 0x80000000
106#define ENET_TDES3_CTXT 0x40000000
107#define ENET_TDES3_FD 0x20000000
108#define ENET_TDES3_LD 0x10000000
109#define ENET_TDES3_TTSS 0x00020000
110#define ENET_TDES3_ES 0x00008000
111#define ENET_TDES3_JT 0x00004000
112#define ENET_TDES3_FF 0x00002000
113#define ENET_TDES3_PCE 0x00001000
114#define ENET_TDES3_LOC 0x00000800
115#define ENET_TDES3_NC 0x00000400
116#define ENET_TDES3_LC 0x00000200
117#define ENET_TDES3_EC 0x00000100
118#define ENET_TDES3_CC 0x000000F0
119#define ENET_TDES3_ED 0x00000008
120#define ENET_TDES3_UF 0x00000004
121#define ENET_TDES3_DB 0x00000002
122#define ENET_TDES3_IHE 0x00000001
125#define ENET_RDES0_BUF1AP 0xFFFFFFFF
126#define ENET_RDES2_BUF2AP 0xFFFFFFFF
127#define ENET_RDES3_OWN 0x80000000
128#define ENET_RDES3_IOC 0x40000000
129#define ENET_RDES3_BUF2V 0x02000000
130#define ENET_RDES3_BUF1V 0x01000000
133#define ENET_RDES1_OPC 0xFFFF0000
134#define ENET_RDES1_TD 0x00008000
135#define ENET_RDES1_TSA 0x00004000
136#define ENET_RDES1_PV 0x00002000
137#define ENET_RDES1_PFT 0x00001000
138#define ENET_RDES1_PMT 0x00000F00
139#define ENET_RDES1_IPCE 0x00000080
140#define ENET_RDES1_IPCB 0x00000040
141#define ENET_RDES1_IPV6 0x00000020
142#define ENET_RDES1_IPV4 0x00000010
143#define ENET_RDES1_IPHE 0x00000008
144#define ENET_RDES1_PT 0x00000007
145#define ENET_RDES2_MADRM 0x07F80000
146#define ENET_RDES2_DAF 0x00020000
147#define ENET_RDES2_SAF 0x00010000
148#define ENET_RDES3_OWN 0x80000000
149#define ENET_RDES3_CTXT 0x40000000
150#define ENET_RDES3_FD 0x20000000
151#define ENET_RDES3_LD 0x10000000
152#define ENET_RDES3_RS2V 0x08000000
153#define ENET_RDES3_RS1V 0x04000000
154#define ENET_RDES3_RS0V 0x02000000
155#define ENET_RDES3_CE 0x01000000
156#define ENET_RDES3_GP 0x00800000
157#define ENET_RDES3_RWT 0x00400000
158#define ENET_RDES3_OE 0x00200000
159#define ENET_RDES3_RE 0x00100000
160#define ENET_RDES3_DE 0x00080000
161#define ENET_RDES3_LT 0x00070000
162#define ENET_RDES3_ES 0x00008000
163#define ENET_RDES3_PL 0x00007FFF
201error_t lpc54xxxEthInit(NetInterface *interface);
202void lpc54xxxEthInitGpio(NetInterface *interface);
203void lpc54xxxEthInitDmaDesc(NetInterface *interface);
205void lpc54xxxEthTick(NetInterface *interface);
207void lpc54xxxEthEnableIrq(NetInterface *interface);
208void lpc54xxxEthDisableIrq(NetInterface *interface);
209void lpc54xxxEthEventHandler(NetInterface *interface);
211error_t lpc54xxxEthSendPacket(NetInterface *interface,
212 const NetBuffer *buffer,
size_t offset, NetTxAncillary *ancillary);
214error_t lpc54xxxEthReceivePacket(NetInterface *interface);
216error_t lpc54xxxEthUpdateMacAddrFilter(NetInterface *interface);
217error_t lpc54xxxEthUpdateMacConfig(NetInterface *interface);
219void lpc54xxxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
220 uint8_t regAddr, uint16_t data);
222uint16_t lpc54xxxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
error_t
Error codes.
Definition error.h:43
Network interface controller abstraction layer.
Receive descriptor.
Definition lpc54xxx_eth_driver.h:189
Transmit descriptor.
Definition lpc54xxx_eth_driver.h:176
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
NIC driver.
Definition nic.h:283