mikroSDK Reference Manual
m487_eth_driver.h
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1
31#ifndef _M487_ETH_DRIVER_H
32#define _M487_ETH_DRIVER_H
33
34//Dependencies
35#include "core/nic.h"
36
37//Number of TX buffers
38#ifndef M487_ETH_TX_BUFFER_COUNT
39 #define M487_ETH_TX_BUFFER_COUNT 2
40#elif (M487_ETH_TX_BUFFER_COUNT < 1)
41 #error M487_ETH_TX_BUFFER_COUNT parameter is not valid
42#endif
43
44//TX buffer size
45#ifndef M487_ETH_TX_BUFFER_SIZE
46 #define M487_ETH_TX_BUFFER_SIZE 1536
47#elif (M487_ETH_TX_BUFFER_SIZE != 1536)
48 #error M487_ETH_TX_BUFFER_SIZE parameter is not valid
49#endif
50
51//Number of RX buffers
52#ifndef M487_ETH_RX_BUFFER_COUNT
53 #define M487_ETH_RX_BUFFER_COUNT 4
54#elif (M487_ETH_RX_BUFFER_COUNT < 1)
55 #error M487_ETH_RX_BUFFER_COUNT parameter is not valid
56#endif
57
58//RX buffer size
59#ifndef M487_ETH_RX_BUFFER_SIZE
60 #define M487_ETH_RX_BUFFER_SIZE 1536
61#elif (M487_ETH_RX_BUFFER_SIZE != 1536)
62 #error M487_ETH_RX_BUFFER_SIZE parameter is not valid
63#endif
64
65//Interrupt priority grouping
66#ifndef M487_ETH_IRQ_PRIORITY_GROUPING
67 #define M487_ETH_IRQ_PRIORITY_GROUPING 3
68#elif (M487_ETH_IRQ_PRIORITY_GROUPING < 0)
69 #error M487_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
70#endif
71
72//Ethernet interrupt group priority
73#ifndef M487_ETH_IRQ_GROUP_PRIORITY
74 #define M487_ETH_IRQ_GROUP_PRIORITY 12
75#elif (M487_ETH_IRQ_GROUP_PRIORITY < 0)
76 #error M487_ETH_IRQ_GROUP_PRIORITY parameter is not valid
77#endif
78
79//Ethernet interrupt subpriority
80#ifndef M487_ETH_IRQ_SUB_PRIORITY
81 #define M487_ETH_IRQ_SUB_PRIORITY 0
82#elif (M487_ETH_IRQ_SUB_PRIORITY < 0)
83 #error M487_ETH_IRQ_SUB_PRIORITY parameter is not valid
84#endif
85
86//Transmit DMA descriptor flags
87#define EMAC_TXDES0_OWNER 0x80000000
88#define EMAC_TXDES0_TTSEN 0x00000008
89#define EMAC_TXDES0_INTEN 0x00000004
90#define EMAC_TXDES0_CRCAPP 0x00000002
91#define EMAC_TXDES0_PADEN 0x00000001
92#define EMAC_TXDES1_TXBSA 0xFFFFFFFF
93#define EMAC_TXDES2_COLCNT 0xF0000000
94#define EMAC_TXDES2_TTSAS 0x08000000
95#define EMAC_TXDES2_SQE 0x04000000
96#define EMAC_TXDES2_TXPAUSED 0x02000000
97#define EMAC_TXDES2_TXHALT 0x01000000
98#define EMAC_TXDES2_LCIF 0x00800000
99#define EMAC_TXDES2_TXABTIF 0x00400000
100#define EMAC_TXDES2_NCSIF 0x00200000
101#define EMAC_TXDES2_EXDEFIF 0x00100000
102#define EMAC_TXDES2_TXCPIF 0x00080000
103#define EMAC_TXDES2_DEF 0x00020000
104#define EMAC_TXDES2_TXIF 0x00010000
105#define EMAC_TXDES2_TBC 0x0000FFFF
106#define EMAC_TXDES2_NTXDSA 0xFFFFFFFF
107
108//Receive DMA descriptor flags
109#define EMAC_RXDES0_OWNER 0x80000000
110#define EMAC_RXDES0_RTSAS 0x00800000
111#define EMAC_RXDES0_RPIF 0x00400000
112#define EMAC_RXDES0_ALIEIF 0x00200000
113#define EMAC_RXDES0_RXGDIF 0x00100000
114#define EMAC_RXDES0_LPIF 0x00080000
115#define EMAC_RXDES0_CRCEIF 0x00020000
116#define EMAC_RXDES0_RXIF 0x00010000
117#define EMAC_RXDES0_RBC 0x0000FFFF
118#define EMAC_RXDES1_RXBSA 0xFFFFFFFF
119#define EMAC_RXDES3_NRXDSA 0xFFFFFFFF
120
121//C++ guard
122#ifdef __cplusplus
123extern "C" {
124#endif
125
126
131typedef struct
132{
133 uint32_t txdes0;
134 uint32_t txdes1;
135 uint32_t txdes2;
136 uint32_t txdes3;
138
139
144typedef struct
145{
146 uint32_t rxdes0;
147 uint32_t rxdes1;
148 uint32_t rxdes2;
149 uint32_t rxdes3;
151
152
153//M487 Ethernet MAC driver
154extern const NicDriver m487EthDriver;
155
156//M487 Ethernet MAC related functions
157error_t m487EthInit(NetInterface *interface);
158void m487EthInitGpio(NetInterface *interface);
159void m487EthInitDmaDesc(NetInterface *interface);
160
161void m487EthTick(NetInterface *interface);
162
163void m487EthEnableIrq(NetInterface *interface);
164void m487EthDisableIrq(NetInterface *interface);
165void m487EthEventHandler(NetInterface *interface);
166
167error_t m487EthSendPacket(NetInterface *interface,
168 const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
169
170error_t m487EthReceivePacket(NetInterface *interface);
171
172error_t m487EthUpdateMacAddrFilter(NetInterface *interface);
173error_t m487EthUpdateMacConfig(NetInterface *interface);
174
175void m487EthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
176 uint8_t regAddr, uint16_t data);
177
178uint16_t m487EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
179 uint8_t regAddr);
180
181//C++ guard
182#ifdef __cplusplus
183}
184#endif
185
186#endif
error_t
Error codes.
Definition error.h:43
Network interface controller abstraction layer.
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
NIC driver.
Definition nic.h:283
RX DMA descriptor.
Definition m487_eth_driver.h:145
TX DMA descriptor.
Definition m487_eth_driver.h:132