31#ifndef _RX65N_ETH_DRIVER_H
32#define _RX65N_ETH_DRIVER_H
38#ifndef RX65N_ETH_TX_BUFFER_COUNT
39 #define RX65N_ETH_TX_BUFFER_COUNT 3
40#elif (RX65N_ETH_TX_BUFFER_COUNT < 1)
41 #error RX65N_ETH_TX_BUFFER_COUNT parameter is not valid
45#ifndef RX65N_ETH_TX_BUFFER_SIZE
46 #define RX65N_ETH_TX_BUFFER_SIZE 1536
47#elif (RX65N_ETH_TX_BUFFER_SIZE != 1536)
48 #error RX65N_ETH_TX_BUFFER_SIZE parameter is not valid
52#ifndef RX65N_ETH_RX_BUFFER_COUNT
53 #define RX65N_ETH_RX_BUFFER_COUNT 6
54#elif (RX65N_ETH_RX_BUFFER_COUNT < 1)
55 #error RX65N_ETH_RX_BUFFER_COUNT parameter is not valid
59#ifndef RX65N_ETH_RX_BUFFER_SIZE
60 #define RX65N_ETH_RX_BUFFER_SIZE 1536
61#elif (RX65N_ETH_RX_BUFFER_SIZE != 1536)
62 #error RX65N_ETH_RX_BUFFER_SIZE parameter is not valid
66#ifndef RX65N_ETH_IRQ_PRIORITY
67 #define RX65N_ETH_IRQ_PRIORITY 2
68#elif (RX65N_ETH_IRQ_PRIORITY < 0)
69 #error RX65N_ETH_IRQ_PRIORITY parameter is not valid
73#define EDMAC_EESR_TWB 0x40000000
74#define EDMAC_EESR_TABT 0x04000000
75#define EDMAC_EESR_RABT 0x02000000
76#define EDMAC_EESR_RFCOF 0x01000000
77#define EDMAC_EESR_ADE 0x00800000
78#define EDMAC_EESR_ECI 0x00400000
79#define EDMAC_EESR_TC 0x00200000
80#define EDMAC_EESR_TDE 0x00100000
81#define EDMAC_EESR_TFUF 0x00080000
82#define EDMAC_EESR_FR 0x00040000
83#define EDMAC_EESR_RDE 0x00020000
84#define EDMAC_EESR_RFOF 0x00010000
85#define EDMAC_EESR_CND 0x00000800
86#define EDMAC_EESR_DLC 0x00000400
87#define EDMAC_EESR_CD 0x00000200
88#define EDMAC_EESR_TRO 0x00000100
89#define EDMAC_EESR_RMAF 0x00000080
90#define EDMAC_EESR_RRF 0x00000010
91#define EDMAC_EESR_RTLF 0x00000008
92#define EDMAC_EESR_RTSF 0x00000004
93#define EDMAC_EESR_PRE 0x00000002
94#define EDMAC_EESR_CERF 0x00000001
97#define EDMAC_TD0_TACT 0x80000000
98#define EDMAC_TD0_TDLE 0x40000000
99#define EDMAC_TD0_TFP_SOF 0x20000000
100#define EDMAC_TD0_TFP_EOF 0x10000000
101#define EDMAC_TD0_TFE 0x08000000
102#define EDMAC_TD0_TWBI 0x04000000
103#define EDMAC_TD0_TFS_MASK 0x0000010F
104#define EDMAC_TD0_TFS_TABT 0x00000100
105#define EDMAC_TD0_TFS_CND 0x00000008
106#define EDMAC_TD0_TFS_DLC 0x00000004
107#define EDMAC_TD0_TFS_CD 0x00000002
108#define EDMAC_TD0_TFS_TRO 0x00000001
109#define EDMAC_TD1_TBL 0xFFFF0000
110#define EDMAC_TD2_TBA 0xFFFFFFFF
113#define EDMAC_RD0_RACT 0x80000000
114#define EDMAC_RD0_RDLE 0x40000000
115#define EDMAC_RD0_RFP_SOF 0x20000000
116#define EDMAC_RD0_RFP_EOF 0x10000000
117#define EDMAC_RD0_RFE 0x08000000
118#define EDMAC_RD0_RFS_MASK 0x0000039F
119#define EDMAC_RD0_RFS_RFOF 0x00000200
120#define EDMAC_RD0_RFS_RABT 0x00000100
121#define EDMAC_RD0_RFS_RMAF 0x00000080
122#define EDMAC_RD0_RFS_RRF 0x00000010
123#define EDMAC_RD0_RFS_RTLF 0x00000008
124#define EDMAC_RD0_RFS_RTSF 0x00000004
125#define EDMAC_RD0_RFS_PRE 0x00000002
126#define EDMAC_RD0_RFS_CERF 0x00000001
127#define EDMAC_RD1_RBL 0xFFFF0000
128#define EDMAC_RD1_RFL 0x0000FFFF
129#define EDMAC_RD2_RBA 0xFFFFFFFF
167error_t rx65nEthInit(NetInterface *interface);
168void rx65nEthInitGpio(NetInterface *interface);
169void rx65nEthInitDmaDesc(NetInterface *interface);
171void rx65nEthTick(NetInterface *interface);
173void rx65nEthEnableIrq(NetInterface *interface);
174void rx65nEthDisableIrq(NetInterface *interface);
175void rx65nEthIrqHandler(
void);
176void rx65nEthEventHandler(NetInterface *interface);
178error_t rx65nEthSendPacket(NetInterface *interface,
179 const NetBuffer *buffer,
size_t offset, NetTxAncillary *ancillary);
181error_t rx65nEthReceivePacket(NetInterface *interface);
183error_t rx65nEthUpdateMacAddrFilter(NetInterface *interface);
184error_t rx65nEthUpdateMacConfig(NetInterface *interface);
186void rx65nEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
187 uint8_t regAddr, uint16_t data);
189uint16_t rx65nEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
192void rx65nEthWriteSmi(uint32_t data, uint_t length);
193uint32_t rx65nEthReadSmi(uint_t length);
error_t
Error codes.
Definition error.h:43
Network interface controller abstraction layer.
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
NIC driver.
Definition nic.h:283
Receive DMA descriptor.
Definition rx65n_eth_driver.h:155
Transmit DMA descriptor.
Definition rx65n_eth_driver.h:142