mikroSDK Reference Manual
s32k1_eth_driver.h
Go to the documentation of this file.
1
31#ifndef _S32K1_ETH_DRIVER_H
32#define _S32K1_ETH_DRIVER_H
33
34//Number of TX buffers
35#ifndef S32K1_ETH_TX_BUFFER_COUNT
36 #define S32K1_ETH_TX_BUFFER_COUNT 3
37#elif (S32K1_ETH_TX_BUFFER_COUNT < 1)
38 #error S32K1_ETH_TX_BUFFER_COUNT parameter is not valid
39#endif
40
41//TX buffer size
42#ifndef S32K1_ETH_TX_BUFFER_SIZE
43 #define S32K1_ETH_TX_BUFFER_SIZE 1536
44#elif (S32K1_ETH_TX_BUFFER_SIZE != 1536)
45 #error S32K1_ETH_TX_BUFFER_SIZE parameter is not valid
46#endif
47
48//Number of RX buffers
49#ifndef S32K1_ETH_RX_BUFFER_COUNT
50 #define S32K1_ETH_RX_BUFFER_COUNT 6
51#elif (S32K1_ETH_RX_BUFFER_COUNT < 1)
52 #error S32K1_ETH_RX_BUFFER_COUNT parameter is not valid
53#endif
54
55//RX buffer size
56#ifndef S32K1_ETH_RX_BUFFER_SIZE
57 #define S32K1_ETH_RX_BUFFER_SIZE 1536
58#elif (S32K1_ETH_RX_BUFFER_SIZE != 1536)
59 #error S32K1_ETH_RX_BUFFER_SIZE parameter is not valid
60#endif
61
62//Interrupt priority grouping
63#ifndef S32K1_ETH_IRQ_PRIORITY_GROUPING
64 #define S32K1_ETH_IRQ_PRIORITY_GROUPING 3
65#elif (S32K1_ETH_IRQ_PRIORITY_GROUPING < 0)
66 #error S32K1_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
67#endif
68
69//Ethernet interrupt group priority
70#ifndef S32K1_ETH_IRQ_GROUP_PRIORITY
71 #define S32K1_ETH_IRQ_GROUP_PRIORITY 12
72#elif (S32K1_ETH_IRQ_GROUP_PRIORITY < 0)
73 #error S32K1_ETH_IRQ_GROUP_PRIORITY parameter is not valid
74#endif
75
76//Ethernet interrupt subpriority
77#ifndef S32K1_ETH_IRQ_SUB_PRIORITY
78 #define S32K1_ETH_IRQ_SUB_PRIORITY 0
79#elif (S32K1_ETH_IRQ_SUB_PRIORITY < 0)
80 #error S32K1_ETH_IRQ_SUB_PRIORITY parameter is not valid
81#endif
82
83//Enhanced transmit buffer descriptor
84#define ENET_TBD0_R 0x80000000
85#define ENET_TBD0_TO1 0x40000000
86#define ENET_TBD0_W 0x20000000
87#define ENET_TBD0_TO2 0x10000000
88#define ENET_TBD0_L 0x08000000
89#define ENET_TBD0_TC 0x04000000
90#define ENET_TBD0_DATA_LENGTH 0x0000FFFF
91#define ENET_TBD1_DATA_POINTER 0xFFFFFFFF
92#define ENET_TBD2_INT 0x40000000
93#define ENET_TBD2_TS 0x20000000
94#define ENET_TBD2_PINS 0x10000000
95#define ENET_TBD2_IINS 0x08000000
96#define ENET_TBD2_TXE 0x00008000
97#define ENET_TBD2_UE 0x00002000
98#define ENET_TBD2_EE 0x00001000
99#define ENET_TBD2_FE 0x00000800
100#define ENET_TBD2_LCE 0x00000400
101#define ENET_TBD2_OE 0x00000200
102#define ENET_TBD2_TSE 0x00000100
103#define ENET_TBD4_BDU 0x80000000
104#define ENET_TBD5_TIMESTAMP 0xFFFFFFFF
105
106//Enhanced receive buffer descriptor
107#define ENET_RBD0_E 0x80000000
108#define ENET_RBD0_RO1 0x40000000
109#define ENET_RBD0_W 0x20000000
110#define ENET_RBD0_RO2 0x10000000
111#define ENET_RBD0_L 0x08000000
112#define ENET_RBD0_M 0x01000000
113#define ENET_RBD0_BC 0x00800000
114#define ENET_RBD0_MC 0x00400000
115#define ENET_RBD0_LG 0x00200000
116#define ENET_RBD0_NO 0x00100000
117#define ENET_RBD0_CR 0x00040000
118#define ENET_RBD0_OV 0x00020000
119#define ENET_RBD0_TR 0x00010000
120#define ENET_RBD0_DATA_LENGTH 0x0000FFFF
121#define ENET_RBD1_DATA_POINTER 0xFFFFFFFF
122#define ENET_RBD2_ME 0x80000000
123#define ENET_RBD2_PE 0x04000000
124#define ENET_RBD2_CE 0x02000000
125#define ENET_RBD2_UC 0x01000000
126#define ENET_RBD2_INT 0x00800000
127#define ENET_RBD2_VPCP 0x0000E000
128#define ENET_RBD2_ICE 0x00000020
129#define ENET_RBD2_PCR 0x00000010
130#define ENET_RBD2_VLAN 0x00000004
131#define ENET_RBD2_IPV6 0x00000002
132#define ENET_RBD2_FRAG 0x00000001
133#define ENET_RBD3_HEADER_LENGTH 0xF8000000
134#define ENET_RBD3_PROTOCOL_TYPE 0x00FF0000
135#define ENET_RBD3_PAYLOAD_CHECKSUM 0x0000FFFF
136#define ENET_RBD4_BDU 0x80000000
137#define ENET_RBD5_TIMESTAMP 0xFFFFFFFF
138
139//C++ guard
140#ifdef __cplusplus
141extern "C" {
142#endif
143
144//S32K1 Ethernet MAC driver
145extern const NicDriver s32k1EthDriver;
146
147//S32K1 Ethernet MAC related functions
148error_t s32k1EthInit(NetInterface *interface);
149void s32k1EthInitGpio(NetInterface *interface);
150void s32k1EthInitBufferDesc(NetInterface *interface);
151
152void s32k1EthTick(NetInterface *interface);
153
154void s32k1EthEnableIrq(NetInterface *interface);
155void s32k1EthDisableIrq(NetInterface *interface);
156void s32k1EthEventHandler(NetInterface *interface);
157
158error_t s32k1EthSendPacket(NetInterface *interface,
159 const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
160
161error_t s32k1EthReceivePacket(NetInterface *interface);
162
163error_t s32k1EthUpdateMacAddrFilter(NetInterface *interface);
164error_t s32k1EthUpdateMacConfig(NetInterface *interface);
165
166void s32k1EthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
167 uint8_t regAddr, uint16_t data);
168
169uint16_t s32k1EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
170 uint8_t regAddr);
171
172uint32_t s32k1EthCalcCrc(const void *data, size_t length);
173
174//C++ guard
175#ifdef __cplusplus
176}
177#endif
178
179#endif
error_t
Error codes.
Definition error.h:43
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
NIC driver.
Definition nic.h:283