mikroSDK Reference Manual
sama5d3_geth_driver.h
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1
31#ifndef _SAMA5D3_GETH_DRIVER_H
32#define _SAMA5D3_GETH_DRIVER_H
33
34//Number of TX buffers
35#ifndef SAMA5D3_GETH_TX_BUFFER_COUNT
36 #define SAMA5D3_GETH_TX_BUFFER_COUNT 2
37#elif (SAMA5D3_GETH_TX_BUFFER_COUNT != 2)
38 #error SAMA5D3_GETH_TX_BUFFER_COUNT parameter is not valid
39#endif
40
41//TX buffer size
42#ifndef SAMA5D3_GETH_TX_BUFFER_SIZE
43 #define SAMA5D3_GETH_TX_BUFFER_SIZE 1536
44#elif (SAMA5D3_GETH_TX_BUFFER_SIZE != 1536)
45 #error SAMA5D3_GETH_TX_BUFFER_SIZE parameter is not valid
46#endif
47
48//Number of RX buffers
49#ifndef SAMA5D3_GETH_RX_BUFFER_COUNT
50 #define SAMA5D3_GETH_RX_BUFFER_COUNT 96
51#elif (SAMA5D3_GETH_RX_BUFFER_COUNT < 12)
52 #error SAMA5D3_GETH_RX_BUFFER_COUNT parameter is not valid
53#endif
54
55//RX buffer size
56#ifndef SAMA5D3_GETH_RX_BUFFER_SIZE
57 #define SAMA5D3_GETH_RX_BUFFER_SIZE 128
58#elif (SAMA5D3_GETH_RX_BUFFER_SIZE != 128)
59 #error SAMA5D3_GETH_RX_BUFFER_SIZE parameter is not valid
60#endif
61
62//Gigabit Ethernet interrupt priority
63#ifndef SAMA5D3_GETH_IRQ_PRIORITY
64 #define SAMA5D3_GETH_IRQ_PRIORITY 0
65#elif (SAMA5D3_GETH_IRQ_PRIORITY < 0)
66 #error SAMA5D3_GETH_IRQ_PRIORITY parameter is not valid
67#endif
68
69//Name of the section where to place DMA buffers
70#ifndef SAMA5D3_GETH_RAM_SECTION
71 #define SAMA5D3_GETH_RAM_SECTION ".ram_no_cache"
72#endif
73
74//RGMII signals
75#define GMAC_RGMII_MASK (PIO_PB18A_G125CK | \
76 PIO_PB17A_GMDIO | PIO_PB16A_GMDC | PIO_PB13A_GRXER | \
77 PIO_PB12A_GRXDV | PIO_PB11A_GRXCK | PIO_PB9A_GTXEN | \
78 PIO_PB8A_GTXCK | PIO_PB7A_GRX3 | PIO_PB6A_GRX2 | \
79 PIO_PB5A_GRX1 | PIO_PB4A_GRX0 | PIO_PB3A_GTX3 | \
80 PIO_PB2A_GTX2 | PIO_PB1A_GTX1 | PIO_PB0A_GTX0)
81
82//TX buffer descriptor flags
83#define GMAC_TX_USED 0x80000000
84#define GMAC_TX_WRAP 0x40000000
85#define GMAC_TX_RLE_ERROR 0x20000000
86#define GMAC_TX_UNDERRUN_ERROR 0x10000000
87#define GMAC_TX_AHB_ERROR 0x08000000
88#define GMAC_TX_LATE_COL_ERROR 0x04000000
89#define GMAC_TX_CHECKSUM_ERROR 0x00700000
90#define GMAC_TX_NO_CRC 0x00010000
91#define GMAC_TX_LAST 0x00008000
92#define GMAC_TX_LENGTH 0x00003FFF
93
94//RX buffer descriptor flags
95#define GMAC_RX_ADDRESS 0xFFFFFFFC
96#define GMAC_RX_WRAP 0x00000002
97#define GMAC_RX_OWNERSHIP 0x00000001
98#define GMAC_RX_BROADCAST 0x80000000
99#define GMAC_RX_MULTICAST_HASH 0x40000000
100#define GMAC_RX_UNICAST_HASH 0x20000000
101#define GMAC_RX_SAR 0x08000000
102#define GMAC_RX_SAR_MASK 0x06000000
103#define GMAC_RX_TYPE_ID 0x01000000
104#define GMAC_RX_SNAP 0x01000000
105#define GMAC_RX_TYPE_ID_MASK 0x00C00000
106#define GMAC_RX_CHECKSUM_VALID 0x00C00000
107#define GMAC_RX_VLAN_TAG 0x00200000
108#define GMAC_RX_PRIORITY_TAG 0x00100000
109#define GMAC_RX_VLAN_PRIORITY 0x000E0000
110#define GMAC_RX_CFI 0x00010000
111#define GMAC_RX_EOF 0x00008000
112#define GMAC_RX_SOF 0x00004000
113#define GMAC_RX_LENGTH_MSB 0x00002000
114#define GMAC_RX_BAD_FCS 0x00002000
115#define GMAC_RX_LENGTH 0x00001FFF
116
117//C++ guard
118#ifdef __cplusplus
119extern "C" {
120#endif
121
122
127typedef struct
128{
129 uint32_t address;
130 uint32_t status;
132
133
138typedef struct
139{
140 uint32_t address;
141 uint32_t status;
143
144
145//SAMA5D3 Ethernet MAC driver (GMAC instance)
146extern const NicDriver sama5d3GigabitEthDriver;
147
148//SAMA5D3 Ethernet MAC related functions
149error_t sama5d3GigabitEthInit(NetInterface *interface);
150void sama5d3GigabitEthInitGpio(NetInterface *interface);
151void sama5d3GigabitEthInitBufferDesc(NetInterface *interface);
152
153void sama5d3GigabitEthTick(NetInterface *interface);
154
155void sama5d3GigabitEthEnableIrq(NetInterface *interface);
156void sama5d3GigabitEthDisableIrq(NetInterface *interface);
157void sama5d3GigabitEthIrqHandler(void);
158void sama5d3GigabitEthEventHandler(NetInterface *interface);
159
160error_t sama5d3GigabitEthSendPacket(NetInterface *interface,
161 const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
162
163error_t sama5d3GigabitEthReceivePacket(NetInterface *interface);
164
165error_t sama5d3GigabitEthUpdateMacAddrFilter(NetInterface *interface);
166error_t sama5d3GigabitEthUpdateMacConfig(NetInterface *interface);
167
168void sama5d3GigabitEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
169 uint8_t regAddr, uint16_t data);
170
171uint16_t sama5d3GigabitEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
172 uint8_t regAddr);
173
174//C++ guard
175#ifdef __cplusplus
176}
177#endif
178
179#endif
error_t
Error codes.
Definition error.h:43
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
NIC driver.
Definition nic.h:283
Receive buffer descriptor.
Definition sama5d3_geth_driver.h:139
Transmit buffer descriptor.
Definition sama5d3_geth_driver.h:128