mikroSDK Reference Manual
stm32f1xx_eth_driver.h
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1
31#ifndef _STM32F1XX_ETH_DRIVER_H
32#define _STM32F1XX_ETH_DRIVER_H
33
34//Dependencies
35#include "core/nic.h"
36
37//Number of TX buffers
38#ifndef STM32F1XX_ETH_TX_BUFFER_COUNT
39 #define STM32F1XX_ETH_TX_BUFFER_COUNT 2
40#elif (STM32F1XX_ETH_TX_BUFFER_COUNT < 1)
41 #error STM32F1XX_ETH_TX_BUFFER_COUNT parameter is not valid
42#endif
43
44//TX buffer size
45#ifndef STM32F1XX_ETH_TX_BUFFER_SIZE
46 #define STM32F1XX_ETH_TX_BUFFER_SIZE 1536
47#elif (STM32F1XX_ETH_TX_BUFFER_SIZE != 1536)
48 #error STM32F1XX_ETH_TX_BUFFER_SIZE parameter is not valid
49#endif
50
51//Number of RX buffers
52#ifndef STM32F1XX_ETH_RX_BUFFER_COUNT
53 #define STM32F1XX_ETH_RX_BUFFER_COUNT 4
54#elif (STM32F1XX_ETH_RX_BUFFER_COUNT < 1)
55 #error STM32F1XX_ETH_RX_BUFFER_COUNT parameter is not valid
56#endif
57
58//RX buffer size
59#ifndef STM32F1XX_ETH_RX_BUFFER_SIZE
60 #define STM32F1XX_ETH_RX_BUFFER_SIZE 1536
61#elif (STM32F1XX_ETH_RX_BUFFER_SIZE != 1536)
62 #error STM32F1XX_ETH_RX_BUFFER_SIZE parameter is not valid
63#endif
64
65//Interrupt priority grouping
66#ifndef STM32F1XX_ETH_IRQ_PRIORITY_GROUPING
67 #define STM32F1XX_ETH_IRQ_PRIORITY_GROUPING 3
68#elif (STM32F1XX_ETH_IRQ_PRIORITY_GROUPING < 0)
69 #error STM32F1XX_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
70#endif
71
72//Ethernet interrupt group priority
73#ifndef STM32F1XX_ETH_IRQ_GROUP_PRIORITY
74 #define STM32F1XX_ETH_IRQ_GROUP_PRIORITY 12
75#elif (STM32F1XX_ETH_IRQ_GROUP_PRIORITY < 0)
76 #error STM32F1XX_ETH_IRQ_GROUP_PRIORITY parameter is not valid
77#endif
78
79//Ethernet interrupt subpriority
80#ifndef STM32F1XX_ETH_IRQ_SUB_PRIORITY
81 #define STM32F1XX_ETH_IRQ_SUB_PRIORITY 0
82#elif (STM32F1XX_ETH_IRQ_SUB_PRIORITY < 0)
83 #error STM32F1XX_ETH_IRQ_SUB_PRIORITY parameter is not valid
84#endif
85
86//ETH_MACCR register
87#define ETH_MACCR_RESERVED15 0x00008000
88
89//Transmit DMA descriptor flags
90#define ETH_TDES0_OWN 0x80000000
91#define ETH_TDES0_IC 0x40000000
92#define ETH_TDES0_LS 0x20000000
93#define ETH_TDES0_FS 0x10000000
94#define ETH_TDES0_DC 0x08000000
95#define ETH_TDES0_DP 0x04000000
96#define ETH_TDES0_TTSE 0x02000000
97#define ETH_TDES0_CIC 0x00C00000
98#define ETH_TDES0_TER 0x00200000
99#define ETH_TDES0_TCH 0x00100000
100#define ETH_TDES0_TTSS 0x00020000
101#define ETH_TDES0_IHE 0x00010000
102#define ETH_TDES0_ES 0x00008000
103#define ETH_TDES0_JT 0x00004000
104#define ETH_TDES0_FF 0x00002000
105#define ETH_TDES0_IPE 0x00001000
106#define ETH_TDES0_LCA 0x00000800
107#define ETH_TDES0_NC 0x00000400
108#define ETH_TDES0_LCO 0x00000200
109#define ETH_TDES0_EC 0x00000100
110#define ETH_TDES0_VF 0x00000080
111#define ETH_TDES0_CC 0x00000078
112#define ETH_TDES0_ED 0x00000004
113#define ETH_TDES0_UF 0x00000002
114#define ETH_TDES0_DB 0x00000001
115#define ETH_TDES1_TBS2 0x1FFF0000
116#define ETH_TDES1_TBS1 0x00001FFF
117#define ETH_TDES2_TBAP1 0xFFFFFFFF
118#define ETH_TDES3_TBAP2 0xFFFFFFFF
119
120//Receive DMA descriptor flags
121#define ETH_RDES0_OWN 0x80000000
122#define ETH_RDES0_AFM 0x40000000
123#define ETH_RDES0_FL 0x3FFF0000
124#define ETH_RDES0_ES 0x00008000
125#define ETH_RDES0_DE 0x00004000
126#define ETH_RDES0_SAF 0x00002000
127#define ETH_RDES0_LE 0x00001000
128#define ETH_RDES0_OE 0x00000800
129#define ETH_RDES0_VLAN 0x00000400
130#define ETH_RDES0_FS 0x00000200
131#define ETH_RDES0_LS 0x00000100
132#define ETH_RDES0_IPHCE 0x00000080
133#define ETH_RDES0_LCO 0x00000040
134#define ETH_RDES0_FT 0x00000020
135#define ETH_RDES0_RWT 0x00000010
136#define ETH_RDES0_RE 0x00000008
137#define ETH_RDES0_DBE 0x00000004
138#define ETH_RDES0_CE 0x00000002
139#define ETH_RDES0_PCE 0x00000001
140#define ETH_RDES1_DIC 0x80000000
141#define ETH_RDES1_RBS2 0x1FFF0000
142#define ETH_RDES1_RER 0x00008000
143#define ETH_RDES1_RCH 0x00004000
144#define ETH_RDES1_RBS1 0x00001FFF
145#define ETH_RDES2_RBAP1 0xFFFFFFFF
146#define ETH_RDES3_RBAP2 0xFFFFFFFF
147
148//C++ guard
149#ifdef __cplusplus
150extern "C" {
151#endif
152
153
158typedef struct
159{
160 uint32_t tdes0;
161 uint32_t tdes1;
162 uint32_t tdes2;
163 uint32_t tdes3;
165
166
171typedef struct
172{
173 uint32_t rdes0;
174 uint32_t rdes1;
175 uint32_t rdes2;
176 uint32_t rdes3;
178
179
180//STM32F1 Ethernet MAC driver
181extern const NicDriver stm32f1xxEthDriver;
182
183//STM32F1 Ethernet MAC related functions
184error_t stm32f1xxEthInit(NetInterface *interface);
185void stm32f1xxEthInitGpio(NetInterface *interface);
186void stm32f1xxEthInitDmaDesc(NetInterface *interface);
187
188void stm32f1xxEthTick(NetInterface *interface);
189
190void stm32f1xxEthEnableIrq(NetInterface *interface);
191void stm32f1xxEthDisableIrq(NetInterface *interface);
192void stm32f1xxEthEventHandler(NetInterface *interface);
193
194error_t stm32f1xxEthSendPacket(NetInterface *interface,
195 const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
196
197error_t stm32f1xxEthReceivePacket(NetInterface *interface);
198
199error_t stm32f1xxEthUpdateMacAddrFilter(NetInterface *interface);
200error_t stm32f1xxEthUpdateMacConfig(NetInterface *interface);
201
202void stm32f1xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
203 uint8_t regAddr, uint16_t data);
204
205uint16_t stm32f1xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
206 uint8_t regAddr);
207
208uint32_t stm32f1xxEthCalcCrc(const void *data, size_t length);
209
210//C++ guard
211#ifdef __cplusplus
212}
213#endif
214
215#endif
error_t
Error codes.
Definition error.h:43
void stm32f1xxEthInitGpio(NetInterface *interface)
Externally linked API for ETH configuration.
Definition hw_eth.h:86
Network interface controller abstraction layer.
Structure describing a buffer that spans multiple chunks.
Definition net_mem.h:89
NIC driver.
Definition nic.h:283
Receive DMA descriptor.
Definition stm32f1xx_eth_driver.h:172
Transmit DMA descriptor.
Definition stm32f1xx_eth_driver.h:159