21#ifndef STM32H7xx_HAL_ETH_EX_H
22#define STM32H7xx_HAL_ETH_EX_H
50 FunctionalState InnerVLANTagInStatus;
52 uint32_t StripInnerVLANTag;
55 FunctionalState InnerVLANTag;
57 FunctionalState DoubleVLANProcessing;
59 FunctionalState VLANTagHashTableMatch;
61 FunctionalState VLANTagInStatus;
63 uint32_t StripVLANTag;
66 uint32_t VLANTypeCheck;
69 FunctionalState VLANTagInverceMatch;
70}ETH_RxVLANConfigTypeDef;
79 FunctionalState SourceTxDesc;
81 FunctionalState SVLANType;
83 uint32_t VLANTagControl;
85}ETH_TxVLANConfigTypeDef;
97 uint32_t SrcAddrFilterMatch;
100 uint32_t DestAddrFilterMatch;
103 uint32_t SrcAddrHigherBitsMatch;
106 uint32_t DestAddrHigherBitsMatch;
112 uint32_t Ip4DestAddr;
117}ETH_L3FilterConfigTypeDef;
129 uint32_t SrcPortFilterMatch;
132 uint32_t DestPortFilterMatch;
138 uint32_t DestinationPort;
140}ETH_L4FilterConfigTypeDef;
157#define ETH_TX_LPI_ENTRY ETH_MACLCSR_TLPIEN
158#define ETH_TX_LPI_EXIT ETH_MACLCSR_TLPIEX
159#define ETH_RX_LPI_ENTRY ETH_MACLCSR_RLPIEN
160#define ETH_RX_LPI_EXIT ETH_MACLCSR_RLPIEX
168#define ETH_L3_FILTER_0 ((uint32_t)0x00000000)
169#define ETH_L3_FILTER_1 ((uint32_t)0x0000000C)
177#define ETH_L4_FILTER_0 ((uint32_t)0x00000000)
178#define ETH_L4_FILTER_1 ((uint32_t)0x0000000C)
186#define ETH_L3_IPV6_MATCH ETH_MACL3L4CR_L3PEN
187#define ETH_L3_IPV4_MATCH ((uint32_t)0x00000000)
195#define ETH_L3_SRC_ADDR_PERFECT_MATCH_ENABLE ETH_MACL3L4CR_L3SAM
196#define ETH_L3_SRC_ADDR_INVERSE_MATCH_ENABLE (ETH_MACL3L4CR_L3SAM | ETH_MACL3L4CR_L3SAIM)
197#define ETH_L3_SRC_ADDR_MATCH_DISABLE ((uint32_t)0x00000000)
205#define ETH_L3_DEST_ADDR_PERFECT_MATCH_ENABLE ETH_MACL3L4CR_L3DAM
206#define ETH_L3_DEST_ADDR_INVERSE_MATCH_ENABLE (ETH_MACL3L4CR_L3DAM | ETH_MACL3L4CR_L3DAIM)
207#define ETH_L3_DEST_ADDR_MATCH_DISABLE ((uint32_t)0x00000000)
215#define ETH_L4_UDP_MATCH ETH_MACL3L4CR_L4PEN
216#define ETH_L4_TCP_MATCH ((uint32_t)0x00000000)
224#define ETH_L4_SRC_PORT_PERFECT_MATCH_ENABLE ETH_MACL3L4CR_L4SPM
225#define ETH_L4_SRC_PORT_INVERSE_MATCH_ENABLE (ETH_MACL3L4CR_L4SPM |ETH_MACL3L4CR_L4SPIM)
226#define ETH_L4_SRC_PORT_MATCH_DISABLE ((uint32_t)0x00000000)
234#define ETH_L4_DEST_PORT_PERFECT_MATCH_ENABLE ETH_MACL3L4CR_L4DPM
235#define ETH_L4_DEST_PORT_INVERSE_MATCH_ENABLE (ETH_MACL3L4CR_L4DPM | ETH_MACL3L4CR_L4DPIM)
236#define ETH_L4_DEST_PORT_MATCH_DISABLE ((uint32_t)0x00000000)
244#define ETH_INNERVLANTAGRXSTRIPPING_NONE ETH_MACVTR_EIVLS_DONOTSTRIP
245#define ETH_INNERVLANTAGRXSTRIPPING_IFPASS ETH_MACVTR_EIVLS_STRIPIFPASS
246#define ETH_INNERVLANTAGRXSTRIPPING_IFFAILS ETH_MACVTR_EIVLS_STRIPIFFAILS
247#define ETH_INNERVLANTAGRXSTRIPPING_ALWAYS ETH_MACVTR_EIVLS_ALWAYSSTRIP
255#define ETH_VLANTAGRXSTRIPPING_NONE ETH_MACVTR_EVLS_DONOTSTRIP
256#define ETH_VLANTAGRXSTRIPPING_IFPASS ETH_MACVTR_EVLS_STRIPIFPASS
257#define ETH_VLANTAGRXSTRIPPING_IFFAILS ETH_MACVTR_EVLS_STRIPIFFAILS
258#define ETH_VLANTAGRXSTRIPPING_ALWAYS ETH_MACVTR_EVLS_ALWAYSSTRIP
266#define ETH_VLANTYPECHECK_DISABLE ETH_MACVTR_DOVLTC
267#define ETH_VLANTYPECHECK_SVLAN (ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL)
268#define ETH_VLANTYPECHECK_CVLAN ((uint32_t)0x00000000)
276#define ETH_VLANTAGCONTROL_NONE (ETH_MACVIR_VLP | ETH_MACVIR_VLC_NOVLANTAG)
277#define ETH_VLANTAGCONTROL_DELETE (ETH_MACVIR_VLP | ETH_MACVIR_VLC_VLANTAGDELETE)
278#define ETH_VLANTAGCONTROL_INSERT (ETH_MACVIR_VLP | ETH_MACVIR_VLC_VLANTAGINSERT)
279#define ETH_VLANTAGCONTROL_REPLACE (ETH_MACVIR_VLP | ETH_MACVIR_VLC_VLANTAGREPLACE)
287#define ETH_INNER_TX_VLANTAG ((uint32_t)0x00000001U)
288#define ETH_OUTER_TX_VLANTAG ((uint32_t)0x00000000U)
306void HAL_ETHEx_EnableARPOffload(ETH_HandleTypeDef *heth);
307void HAL_ETHEx_DisableARPOffload(ETH_HandleTypeDef *heth);
308void HAL_ETHEx_SetARPAddressMatch(ETH_HandleTypeDef *heth, uint32_t IpAddress);
311void HAL_ETHEx_EnableL3L4Filtering(ETH_HandleTypeDef *heth);
312void HAL_ETHEx_DisableL3L4Filtering(ETH_HandleTypeDef *heth);
313HAL_StatusTypeDef HAL_ETHEx_GetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig);
314HAL_StatusTypeDef HAL_ETHEx_GetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L4FilterConfigTypeDef *pL4FilterConfig);
315HAL_StatusTypeDef HAL_ETHEx_SetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L3FilterConfigTypeDef *pL3FilterConfig);
316HAL_StatusTypeDef HAL_ETHEx_SetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter, ETH_L4FilterConfigTypeDef *pL4FilterConfig);
319void HAL_ETHEx_EnableVLANProcessing(ETH_HandleTypeDef *heth);
320void HAL_ETHEx_DisableVLANProcessing(ETH_HandleTypeDef *heth);
321HAL_StatusTypeDef HAL_ETHEx_GetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig);
322HAL_StatusTypeDef HAL_ETHEx_SetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig);
323void HAL_ETHEx_SetVLANHashTable(ETH_HandleTypeDef *heth, uint32_t VLANHashTable);
324HAL_StatusTypeDef HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig);
325HAL_StatusTypeDef HAL_ETHEx_SetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag ,ETH_TxVLANConfigTypeDef *pVlanConfig);
326void HAL_ETHEx_SetTxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t VLANTag ,uint32_t VLANIdentifier);
329void HAL_ETHEx_EnterLPIMode(ETH_HandleTypeDef *heth, FunctionalState TxAutomate, FunctionalState TxClockStop);
330void HAL_ETHEx_ExitLPIMode(ETH_HandleTypeDef *heth);
331uint32_t HAL_ETHEx_GetMACLPIEvent(ETH_HandleTypeDef *heth);
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32f1xx_hal_def.h:40
This file contains HAL common defines, enumeration, macros and structures definitions.