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#define | MC_SRSH_JTAG_MASK 0x1u |
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#define | MC_SRSH_JTAG_SHIFT 0 |
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#define | MC_SRSH_LOCKUP_MASK 0x2u |
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#define | MC_SRSH_LOCKUP_SHIFT 1 |
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#define | MC_SRSH_SW_MASK 0x4u |
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#define | MC_SRSH_SW_SHIFT 2 |
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#define | MC_SRSL_WAKEUP_MASK 0x1u |
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#define | MC_SRSL_WAKEUP_SHIFT 0 |
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#define | MC_SRSL_LVD_MASK 0x2u |
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#define | MC_SRSL_LVD_SHIFT 1 |
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#define | MC_SRSL_LOC_MASK 0x4u |
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#define | MC_SRSL_LOC_SHIFT 2 |
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#define | MC_SRSL_COP_MASK 0x20u |
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#define | MC_SRSL_COP_SHIFT 5 |
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#define | MC_SRSL_PIN_MASK 0x40u |
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#define | MC_SRSL_PIN_SHIFT 6 |
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#define | MC_SRSL_POR_MASK 0x80u |
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#define | MC_SRSL_POR_SHIFT 7 |
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#define | MC_PMPROT_AVLLS1_MASK 0x1u |
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#define | MC_PMPROT_AVLLS1_SHIFT 0 |
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#define | MC_PMPROT_AVLLS2_MASK 0x2u |
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#define | MC_PMPROT_AVLLS2_SHIFT 1 |
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#define | MC_PMPROT_AVLLS3_MASK 0x4u |
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#define | MC_PMPROT_AVLLS3_SHIFT 2 |
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#define | MC_PMPROT_ALLS_MASK 0x10u |
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#define | MC_PMPROT_ALLS_SHIFT 4 |
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#define | MC_PMPROT_AVLP_MASK 0x20u |
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#define | MC_PMPROT_AVLP_SHIFT 5 |
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#define | MC_PMCTRL_LPLLSM_MASK 0x7u |
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#define | MC_PMCTRL_LPLLSM_SHIFT 0 |
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#define | MC_PMCTRL_LPLLSM(x) (((uint8_t)(((uint8_t)(x))<<MC_PMCTRL_LPLLSM_SHIFT))&MC_PMCTRL_LPLLSM_MASK) |
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#define | MC_PMCTRL_RUNM_MASK 0x60u |
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#define | MC_PMCTRL_RUNM_SHIFT 5 |
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#define | MC_PMCTRL_RUNM(x) (((uint8_t)(((uint8_t)(x))<<MC_PMCTRL_RUNM_SHIFT))&MC_PMCTRL_RUNM_MASK) |
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#define | MC_PMCTRL_LPWUI_MASK 0x80u |
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#define | MC_PMCTRL_LPWUI_SHIFT 7 |
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