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#define | PWM0_BASE (0x40033000u) |
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#define | PWM0 ((PWM_Type *)PWM0_BASE) |
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#define | PWM1_BASE (0x400B3000u) |
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#define | PWM1 ((PWM_Type *)PWM1_BASE) |
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#define | PWM_BASE_ADDRS { PWM0_BASE, PWM1_BASE } |
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#define | PWM_BASE_PTRS { PWM0, PWM1 } |
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#define | PWM_CMP_IRQS { { PWM0_CMP0_IRQn, PWM0_CMP1_IRQn, PWM0_CMP2_IRQn, PWM0_CMP3_IRQn }, { PWM1_CMP0_IRQn, PWM1_CMP1_IRQn, PWM1_CMP2_IRQn, PWM1_CMP3_IRQn } } |
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#define | PWM_RELOAD_IRQS { { PWM0_RELOAD0_IRQn, PWM0_RELOAD1_IRQn, PWM0_RELOAD2_IRQn, PWM0_RELOAD3_IRQn }, { PWM1_RELOAD0_IRQn, PWM1_RELOAD1_IRQn, PWM1_RELOAD2_IRQn, PWM1_RELOAD3_IRQn } } |
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#define | PWM_CAP_IRQS { PWM0_CAP_IRQn, PWM1_CAP_IRQn } |
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#define | PWM_RERR_IRQS { PWM0_RERR_IRQn, PWM1_RERR_IRQn } |
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#define | PWM_FAULT_IRQS { PWM0_FAULT_IRQn, PWM1_FAULT_IRQn } |
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