USBPHY Register Masks

PWD - USB PHY Power-Down Register
#define	USBPHY_PWD_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)
#define	USBPHY_PWD_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)
#define	USBPHY_PWD_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)
#define	USBPHY_PWD_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)
#define	USBPHY_PWD_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)
#define	USBPHY_PWD_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)
#define	USBPHY_PWD_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)
#define	USBPHY_PWD_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)
#define	USBPHY_PWD_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)
#define	USBPHY_PWD_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)
#define	USBPHY_PWD_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)
#define	USBPHY_PWD_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)

PWD_SET - USB PHY Power-Down Register
#define	USBPHY_PWD_SET_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_SET_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_SET_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)
#define	USBPHY_PWD_SET_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_SET_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_SET_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_SET_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_SET_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_SET_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)
#define	USBPHY_PWD_SET_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_SET_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_SET_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)
#define	USBPHY_PWD_SET_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_SET_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_SET_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)
#define	USBPHY_PWD_SET_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_SET_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_SET_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)
#define	USBPHY_PWD_SET_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_SET_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_SET_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)
#define	USBPHY_PWD_SET_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_SET_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_SET_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)
#define	USBPHY_PWD_SET_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_SET_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_SET_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_SET_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_SET_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_SET_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)
#define	USBPHY_PWD_SET_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_SET_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_SET_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)
#define	USBPHY_PWD_SET_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_SET_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_SET_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)
#define	USBPHY_PWD_SET_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_SET_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_SET_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)
#define	USBPHY_PWD_SET_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_SET_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_SET_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)

PWD_CLR - USB PHY Power-Down Register
#define	USBPHY_PWD_CLR_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_CLR_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_CLR_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)
#define	USBPHY_PWD_CLR_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_CLR_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_CLR_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_CLR_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_CLR_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)
#define	USBPHY_PWD_CLR_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_CLR_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_CLR_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)
#define	USBPHY_PWD_CLR_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_CLR_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_CLR_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)
#define	USBPHY_PWD_CLR_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_CLR_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_CLR_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)
#define	USBPHY_PWD_CLR_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_CLR_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_CLR_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)
#define	USBPHY_PWD_CLR_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_CLR_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_CLR_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)
#define	USBPHY_PWD_CLR_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_CLR_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_CLR_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_CLR_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_CLR_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)
#define	USBPHY_PWD_CLR_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_CLR_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_CLR_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)
#define	USBPHY_PWD_CLR_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_CLR_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_CLR_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)
#define	USBPHY_PWD_CLR_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_CLR_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_CLR_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)
#define	USBPHY_PWD_CLR_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_CLR_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_CLR_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)

PWD_TOG - USB PHY Power-Down Register
#define	USBPHY_PWD_TOG_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_TOG_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_TOG_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)
#define	USBPHY_PWD_TOG_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_TOG_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_TOG_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_TOG_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_TOG_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)
#define	USBPHY_PWD_TOG_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_TOG_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_TOG_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)
#define	USBPHY_PWD_TOG_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_TOG_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_TOG_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)
#define	USBPHY_PWD_TOG_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_TOG_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_TOG_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)
#define	USBPHY_PWD_TOG_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_TOG_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_TOG_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)
#define	USBPHY_PWD_TOG_TXPWDFS_MASK   (0x400U)
#define	USBPHY_PWD_TOG_TXPWDFS_SHIFT   (10U)
#define	USBPHY_PWD_TOG_TXPWDFS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)
#define	USBPHY_PWD_TOG_TXPWDIBIAS_MASK   (0x800U)
#define	USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT   (11U)
#define	USBPHY_PWD_TOG_TXPWDIBIAS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)
#define	USBPHY_PWD_TOG_TXPWDV2I_MASK   (0x1000U)
#define	USBPHY_PWD_TOG_TXPWDV2I_SHIFT   (12U)
#define	USBPHY_PWD_TOG_TXPWDV2I(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)
#define	USBPHY_PWD_TOG_RXPWDENV_MASK   (0x20000U)
#define	USBPHY_PWD_TOG_RXPWDENV_SHIFT   (17U)
#define	USBPHY_PWD_TOG_RXPWDENV(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)
#define	USBPHY_PWD_TOG_RXPWD1PT1_MASK   (0x40000U)
#define	USBPHY_PWD_TOG_RXPWD1PT1_SHIFT   (18U)
#define	USBPHY_PWD_TOG_RXPWD1PT1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)
#define	USBPHY_PWD_TOG_RXPWDDIFF_MASK   (0x80000U)
#define	USBPHY_PWD_TOG_RXPWDDIFF_SHIFT   (19U)
#define	USBPHY_PWD_TOG_RXPWDDIFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)
#define	USBPHY_PWD_TOG_RXPWDRX_MASK   (0x100000U)
#define	USBPHY_PWD_TOG_RXPWDRX_SHIFT   (20U)
#define	USBPHY_PWD_TOG_RXPWDRX(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)

TX - USB PHY Transmitter Control Register
#define	USBPHY_TX_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TX_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DM_SHIFT)) & USBPHY_TX_TXCAL45DM_MASK)
#define	USBPHY_TX_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DP_SHIFT)) & USBPHY_TX_TXCAL45DP_MASK)
#define	USBPHY_TX_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_USBPHY_TX_EDGECTRL_MASK)
#define	USBPHY_TX_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TX_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DM_SHIFT)) & USBPHY_TX_TXCAL45DM_MASK)
#define	USBPHY_TX_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TXCAL45DP_SHIFT)) & USBPHY_TX_TXCAL45DP_MASK)
#define	USBPHY_TX_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_USBPHY_TX_EDGECTRL_MASK)

TX_SET - USB PHY Transmitter Control Register
#define	USBPHY_TX_SET_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_SET_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_SET_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)
#define	USBPHY_TX_SET_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_SET_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_SET_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DM_SHIFT)) & USBPHY_TX_SET_TXCAL45DM_MASK)
#define	USBPHY_TX_SET_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_SET_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_SET_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DP_SHIFT)) & USBPHY_TX_SET_TXCAL45DP_MASK)
#define	USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_SET_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK)
#define	USBPHY_TX_SET_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_SET_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_SET_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)
#define	USBPHY_TX_SET_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_SET_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_SET_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DM_SHIFT)) & USBPHY_TX_SET_TXCAL45DM_MASK)
#define	USBPHY_TX_SET_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_SET_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_SET_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_TXCAL45DP_SHIFT)) & USBPHY_TX_SET_TXCAL45DP_MASK)
#define	USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_SET_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_SET_USBPHY_TX_EDGECTRL_MASK)

TX_CLR - USB PHY Transmitter Control Register
#define	USBPHY_TX_CLR_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_CLR_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_CLR_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)
#define	USBPHY_TX_CLR_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_CLR_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_CLR_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DM_SHIFT)) & USBPHY_TX_CLR_TXCAL45DM_MASK)
#define	USBPHY_TX_CLR_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_CLR_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_CLR_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DP_SHIFT)) & USBPHY_TX_CLR_TXCAL45DP_MASK)
#define	USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_CLR_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK)
#define	USBPHY_TX_CLR_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_CLR_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_CLR_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)
#define	USBPHY_TX_CLR_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_CLR_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_CLR_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DM_SHIFT)) & USBPHY_TX_CLR_TXCAL45DM_MASK)
#define	USBPHY_TX_CLR_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_CLR_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_CLR_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_TXCAL45DP_SHIFT)) & USBPHY_TX_CLR_TXCAL45DP_MASK)
#define	USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_CLR_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_CLR_USBPHY_TX_EDGECTRL_MASK)

TX_TOG - USB PHY Transmitter Control Register
#define	USBPHY_TX_TOG_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_TOG_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_TOG_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)
#define	USBPHY_TX_TOG_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_TOG_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_TOG_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DM_SHIFT)) & USBPHY_TX_TOG_TXCAL45DM_MASK)
#define	USBPHY_TX_TOG_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_TOG_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_TOG_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DP_SHIFT)) & USBPHY_TX_TOG_TXCAL45DP_MASK)
#define	USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_TOG_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK)
#define	USBPHY_TX_TOG_D_CAL_MASK   (0xFU)
#define	USBPHY_TX_TOG_D_CAL_SHIFT   (0U)
#define	USBPHY_TX_TOG_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)
#define	USBPHY_TX_TOG_TXCAL45DM_MASK   (0xF00U)
#define	USBPHY_TX_TOG_TXCAL45DM_SHIFT   (8U)
#define	USBPHY_TX_TOG_TXCAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DM_SHIFT)) & USBPHY_TX_TOG_TXCAL45DM_MASK)
#define	USBPHY_TX_TOG_TXCAL45DP_MASK   (0xF0000U)
#define	USBPHY_TX_TOG_TXCAL45DP_SHIFT   (16U)
#define	USBPHY_TX_TOG_TXCAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_TXCAL45DP_SHIFT)) & USBPHY_TX_TOG_TXCAL45DP_MASK)
#define	USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK   (0x1C000000U)
#define	USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT   (26U)
#define	USBPHY_TX_TOG_USBPHY_TX_EDGECTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_SHIFT)) & USBPHY_TX_TOG_USBPHY_TX_EDGECTRL_MASK)

RX - USB PHY Receiver Control Register
#define	USBPHY_RX_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)
#define	USBPHY_RX_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)
#define	USBPHY_RX_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)
#define	USBPHY_RX_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)
#define	USBPHY_RX_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)
#define	USBPHY_RX_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)

RX_SET - USB PHY Receiver Control Register
#define	USBPHY_RX_SET_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_SET_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_SET_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)
#define	USBPHY_RX_SET_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_SET_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_SET_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)
#define	USBPHY_RX_SET_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_SET_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_SET_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)
#define	USBPHY_RX_SET_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_SET_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_SET_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)
#define	USBPHY_RX_SET_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_SET_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_SET_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)
#define	USBPHY_RX_SET_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_SET_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_SET_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)

RX_CLR - USB PHY Receiver Control Register
#define	USBPHY_RX_CLR_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_CLR_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_CLR_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)
#define	USBPHY_RX_CLR_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_CLR_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_CLR_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)
#define	USBPHY_RX_CLR_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_CLR_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_CLR_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)
#define	USBPHY_RX_CLR_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_CLR_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_CLR_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)
#define	USBPHY_RX_CLR_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_CLR_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_CLR_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)
#define	USBPHY_RX_CLR_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_CLR_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_CLR_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)

RX_TOG - USB PHY Receiver Control Register
#define	USBPHY_RX_TOG_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_TOG_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_TOG_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)
#define	USBPHY_RX_TOG_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_TOG_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_TOG_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)
#define	USBPHY_RX_TOG_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_TOG_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_TOG_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)
#define	USBPHY_RX_TOG_ENVADJ_MASK   (0x7U)
#define	USBPHY_RX_TOG_ENVADJ_SHIFT   (0U)
#define	USBPHY_RX_TOG_ENVADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)
#define	USBPHY_RX_TOG_DISCONADJ_MASK   (0x70U)
#define	USBPHY_RX_TOG_DISCONADJ_SHIFT   (4U)
#define	USBPHY_RX_TOG_DISCONADJ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)
#define	USBPHY_RX_TOG_RXDBYPASS_MASK   (0x400000U)
#define	USBPHY_RX_TOG_RXDBYPASS_SHIFT   (22U)
#define	USBPHY_RX_TOG_RXDBYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)

CTRL - USB PHY General Control Register
#define	USBPHY_CTRL_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK)
#define	USBPHY_CTRL_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK)
#define	USBPHY_CTRL_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLKGATE_SHIFT)) & USBPHY_CTRL_CLKGATE_MASK)
#define	USBPHY_CTRL_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SFTRST_SHIFT)) & USBPHY_CTRL_SFTRST_MASK)

CTRL_SET - USB PHY General Control Register
#define	USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_SET_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_SET_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_SET_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_SET_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_SET_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_SET_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_SET_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_SET_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_SET_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_SET_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_SET_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_SET_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_SET_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_SET_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_SET_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_SET_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK)
#define	USBPHY_CTRL_SET_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_SET_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_SET_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK)
#define	USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_SET_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_SET_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_SET_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_SET_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_SET_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_SET_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_SET_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_SET_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_SET_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_SET_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_SET_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_SET_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_SET_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_SET_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_SET_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_SET_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_SET_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_SET_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_SET_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_SET_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_SET_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_SET_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_SET_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_SET_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_SET_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_SET_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_SET_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_SET_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_CLKGATE_SHIFT)) & USBPHY_CTRL_SET_CLKGATE_MASK)
#define	USBPHY_CTRL_SET_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_SET_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_SET_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_SFTRST_SHIFT)) & USBPHY_CTRL_SET_SFTRST_MASK)

CTRL_CLR - USB PHY General Control Register
#define	USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_CLR_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_CLR_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_CLR_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_CLR_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_CLR_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_CLR_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_CLR_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_CLR_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_CLR_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_CLR_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_CLR_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_CLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK)
#define	USBPHY_CTRL_CLR_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_CLR_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_CLR_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK)
#define	USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_CLR_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_CLR_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_CLR_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_CLR_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_CLR_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_CLR_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_CLR_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_CLR_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_CLR_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_CLR_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_CLR_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_CLR_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_CLR_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_CLR_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_CLR_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_CLR_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_CLR_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_CLR_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_CLR_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_CLR_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_CLR_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_CLR_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_CLR_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_CLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_CLKGATE_SHIFT)) & USBPHY_CTRL_CLR_CLKGATE_MASK)
#define	USBPHY_CTRL_CLR_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_CLR_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_CLR_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_SFTRST_SHIFT)) & USBPHY_CTRL_CLR_SFTRST_MASK)

CTRL_TOG - USB PHY General Control Register
#define	USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_TOG_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_TOG_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_TOG_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_TOG_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_TOG_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_TOG_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_TOG_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_TOG_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_TOG_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_TOG_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_TOG_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_TOG_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK)
#define	USBPHY_CTRL_TOG_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_TOG_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_TOG_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK)
#define	USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK   (0x2U)
#define	USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT   (1U)
#define	USBPHY_CTRL_TOG_ENHOSTDISCONDETECT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_SHIFT)) & USBPHY_CTRL_TOG_ENHOSTDISCONDETECT_MASK)
#define	USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK   (0x8U)
#define	USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT   (3U)
#define	USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_SHIFT)) & USBPHY_CTRL_TOG_HOSTDISCONDETECT_IRQ_MASK)
#define	USBPHY_CTRL_TOG_ENDEVPLUGINDET_MASK   (0x10U)
#define	USBPHY_CTRL_TOG_ENDEVPLUGINDET_SHIFT   (4U)
#define	USBPHY_CTRL_TOG_ENDEVPLUGINDET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDET_MASK)
#define	USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK   (0x1000U)
#define	USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT   (12U)
#define	USBPHY_CTRL_TOG_DEVPLUGIN_IRQ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_SHIFT)) & USBPHY_CTRL_TOG_DEVPLUGIN_IRQ_MASK)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK   (0x4000U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT   (14U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL2(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL2_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL2_MASK)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK   (0x8000U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT   (15U)
#define	USBPHY_CTRL_TOG_ENUTMILEVEL3(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENUTMILEVEL3_SHIFT)) & USBPHY_CTRL_TOG_ENUTMILEVEL3_MASK)
#define	USBPHY_CTRL_TOG_AUTORESUME_EN_MASK   (0x40000U)
#define	USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT   (18U)
#define	USBPHY_CTRL_TOG_AUTORESUME_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_AUTORESUME_EN_SHIFT)) & USBPHY_CTRL_TOG_AUTORESUME_EN_MASK)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK   (0x80000U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT   (19U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_CLKGATE_MASK)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK   (0x100000U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT   (20U)
#define	USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_SHIFT)) & USBPHY_CTRL_TOG_ENAUTOCLR_PHY_PWD_MASK)
#define	USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK   (0x1000000U)
#define	USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT   (24U)
#define	USBPHY_CTRL_TOG_FSDLL_RST_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_FSDLL_RST_EN_SHIFT)) & USBPHY_CTRL_TOG_FSDLL_RST_EN_MASK)
#define	USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK   (0x8000000U)
#define	USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT   (27U)
#define	USBPHY_CTRL_TOG_OTG_ID_VALUE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_OTG_ID_VALUE_SHIFT)) & USBPHY_CTRL_TOG_OTG_ID_VALUE_MASK)
#define	USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK   (0x10000000U)
#define	USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT   (28U)
#define	USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_SHIFT)) & USBPHY_CTRL_TOG_HOST_FORCE_LS_SE0_MASK)
#define	USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK   (0x20000000U)
#define	USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT   (29U)
#define	USBPHY_CTRL_TOG_UTMI_SUSPENDM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_UTMI_SUSPENDM_SHIFT)) & USBPHY_CTRL_TOG_UTMI_SUSPENDM_MASK)
#define	USBPHY_CTRL_TOG_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_CTRL_TOG_CLKGATE_SHIFT   (30U)
#define	USBPHY_CTRL_TOG_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_CLKGATE_SHIFT)) & USBPHY_CTRL_TOG_CLKGATE_MASK)
#define	USBPHY_CTRL_TOG_SFTRST_MASK   (0x80000000U)
#define	USBPHY_CTRL_TOG_SFTRST_SHIFT   (31U)
#define	USBPHY_CTRL_TOG_SFTRST(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_SFTRST_SHIFT)) & USBPHY_CTRL_TOG_SFTRST_MASK)

STATUS - USB PHY Status Register
#define	USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK   (0x8U)
#define	USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT   (3U)
#define	USBPHY_STATUS_HOSTDISCONDETECT_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) & USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)
#define	USBPHY_STATUS_DEVPLUGIN_STATUS_MASK   (0x40U)
#define	USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT   (6U)
#define	USBPHY_STATUS_DEVPLUGIN_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)
#define	USBPHY_STATUS_OTGID_STATUS_MASK   (0x100U)
#define	USBPHY_STATUS_OTGID_STATUS_SHIFT   (8U)
#define	USBPHY_STATUS_OTGID_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_OTGID_STATUS_SHIFT)) & USBPHY_STATUS_OTGID_STATUS_MASK)
#define	USBPHY_STATUS_RESUME_STATUS_MASK   (0x400U)
#define	USBPHY_STATUS_RESUME_STATUS_SHIFT   (10U)
#define	USBPHY_STATUS_RESUME_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RESUME_STATUS_SHIFT)) & USBPHY_STATUS_RESUME_STATUS_MASK)
#define	USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK   (0x8U)
#define	USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT   (3U)
#define	USBPHY_STATUS_HOSTDISCONDETECT_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) & USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)
#define	USBPHY_STATUS_DEVPLUGIN_STATUS_MASK   (0x40U)
#define	USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT   (6U)
#define	USBPHY_STATUS_DEVPLUGIN_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)
#define	USBPHY_STATUS_OTGID_STATUS_MASK   (0x100U)
#define	USBPHY_STATUS_OTGID_STATUS_SHIFT   (8U)
#define	USBPHY_STATUS_OTGID_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_OTGID_STATUS_SHIFT)) & USBPHY_STATUS_OTGID_STATUS_MASK)
#define	USBPHY_STATUS_RESUME_STATUS_MASK   (0x400U)
#define	USBPHY_STATUS_RESUME_STATUS_SHIFT   (10U)
#define	USBPHY_STATUS_RESUME_STATUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_RESUME_STATUS_SHIFT)) & USBPHY_STATUS_RESUME_STATUS_MASK)

DEBUG - USB PHY Debug Register
#define	USBPHY_DEBUG_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK)
#define	USBPHY_DEBUG_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLKGATE_MASK)

DEBUG_SET - USB PHY Debug Register
#define	USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_SET_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_SET_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_SET_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_SET_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_SET_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_SET_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_SET_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_SET_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_SET_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_SET_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_SET_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK)
#define	USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_SET_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_SET_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_SET_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_SET_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_SET_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_SET_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_SET_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_SET_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_SET_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_SET_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_SET_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_SET_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_SET_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_SET_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_SET_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_SET_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_SET_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_SET_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_SET_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_SET_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_SET_CLKGATE_SHIFT)) & USBPHY_DEBUG_SET_CLKGATE_MASK)

DEBUG_CLR - USB PHY Debug Register
#define	USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_CLR_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_CLR_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_CLR_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_CLR_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_CLR_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_CLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK)
#define	USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_CLR_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_CLR_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_CLR_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_CLR_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_CLR_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_CLR_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_CLR_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_CLR_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_CLR_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_CLR_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_CLR_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_CLR_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_CLR_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_CLR_CLKGATE_SHIFT)) & USBPHY_DEBUG_CLR_CLKGATE_MASK)

DEBUG_TOG - USB PHY Debug Register
#define	USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_TOG_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_TOG_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_TOG_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_TOG_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_TOG_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_TOG_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK)
#define	USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK   (0x1U)
#define	USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT   (0U)
#define	USBPHY_DEBUG_TOG_OTGIDPIOLOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_OTGIDPIOLOCK_SHIFT)) & USBPHY_DEBUG_TOG_OTGIDPIOLOCK_MASK)
#define	USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK   (0x2U)
#define	USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT   (1U)
#define	USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_SHIFT)) & USBPHY_DEBUG_TOG_DEBUG_INTERFACE_HOLD_MASK)
#define	USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK   (0xCU)
#define	USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT   (2U)
#define	USBPHY_DEBUG_TOG_HSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_HSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK   (0x30U)
#define	USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT   (4U)
#define	USBPHY_DEBUG_TOG_ENHSTPULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENHSTPULLDOWN_SHIFT)) & USBPHY_DEBUG_TOG_ENHSTPULLDOWN_MASK)
#define	USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK   (0xF00U)
#define	USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT   (8U)
#define	USBPHY_DEBUG_TOG_TX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_TX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_TX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK   (0x1000U)
#define	USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT   (12U)
#define	USBPHY_DEBUG_TOG_ENTX2RXCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENTX2RXCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_ENTX2RXCOUNT_MASK)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK   (0x1F0000U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT   (16U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETCOUNT_MASK)
#define	USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK   (0x1000000U)
#define	USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT   (24U)
#define	USBPHY_DEBUG_TOG_ENSQUELCHRESET(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_TOG_ENSQUELCHRESET_MASK)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK   (0x1E000000U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT   (25U)
#define	USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_SHIFT)) & USBPHY_DEBUG_TOG_SQUELCHRESETLENGTH_MASK)
#define	USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK   (0x20000000U)
#define	USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT   (29U)
#define	USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_SHIFT)) & USBPHY_DEBUG_TOG_HOST_RESUME_DEBUG_MASK)
#define	USBPHY_DEBUG_TOG_CLKGATE_MASK   (0x40000000U)
#define	USBPHY_DEBUG_TOG_CLKGATE_SHIFT   (30U)
#define	USBPHY_DEBUG_TOG_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG_TOG_CLKGATE_SHIFT)) & USBPHY_DEBUG_TOG_CLKGATE_MASK)

DEBUG0_STATUS - UTMI Debug Status Register 0
#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK   (0xFFFFU)
#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT   (0U)
#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK)
#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK   (0x3FF0000U)
#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT   (16U)
#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK)
#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK   (0xFC000000U)
#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT   (26U)
#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK)
#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK   (0xFFFFU)
#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT   (0U)
#define	USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_LOOP_BACK_FAIL_COUNT_MASK)
#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK   (0x3FF0000U)
#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT   (16U)
#define	USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_UTMI_RXERROR_FAIL_COUNT_MASK)
#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK   (0xFC000000U)
#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT   (26U)
#define	USBPHY_DEBUG0_STATUS_SQUELCH_COUNT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_SHIFT)) & USBPHY_DEBUG0_STATUS_SQUELCH_COUNT_MASK)

DEBUG1 - UTMI Debug Status Register 1
#define	USBPHY_DEBUG1_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)
#define	USBPHY_DEBUG1_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)

DEBUG1_SET - UTMI Debug Status Register 1
#define	USBPHY_DEBUG1_SET_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_SET_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)
#define	USBPHY_DEBUG1_SET_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_SET_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)

DEBUG1_CLR - UTMI Debug Status Register 1
#define	USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_CLR_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)
#define	USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_CLR_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)

DEBUG1_TOG - UTMI Debug Status Register 1
#define	USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_TOG_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)
#define	USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK   (0x6000U)
#define	USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT   (13U)
#define	USBPHY_DEBUG1_TOG_ENTAILADJVD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)

VERSION - UTMI RTL Version
#define	USBPHY_VERSION_STEP_MASK   (0xFFFFU)
#define	USBPHY_VERSION_STEP_SHIFT   (0U)
#define	USBPHY_VERSION_STEP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_STEP_SHIFT)) & USBPHY_VERSION_STEP_MASK)
#define	USBPHY_VERSION_MINOR_MASK   (0xFF0000U)
#define	USBPHY_VERSION_MINOR_SHIFT   (16U)
#define	USBPHY_VERSION_MINOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MINOR_SHIFT)) & USBPHY_VERSION_MINOR_MASK)
#define	USBPHY_VERSION_MAJOR_MASK   (0xFF000000U)
#define	USBPHY_VERSION_MAJOR_SHIFT   (24U)
#define	USBPHY_VERSION_MAJOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MAJOR_SHIFT)) & USBPHY_VERSION_MAJOR_MASK)
#define	USBPHY_VERSION_STEP_MASK   (0xFFFFU)
#define	USBPHY_VERSION_STEP_SHIFT   (0U)
#define	USBPHY_VERSION_STEP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_STEP_SHIFT)) & USBPHY_VERSION_STEP_MASK)
#define	USBPHY_VERSION_MINOR_MASK   (0xFF0000U)
#define	USBPHY_VERSION_MINOR_SHIFT   (16U)
#define	USBPHY_VERSION_MINOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MINOR_SHIFT)) & USBPHY_VERSION_MINOR_MASK)
#define	USBPHY_VERSION_MAJOR_MASK   (0xFF000000U)
#define	USBPHY_VERSION_MAJOR_SHIFT   (24U)
#define	USBPHY_VERSION_MAJOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_VERSION_MAJOR_SHIFT)) & USBPHY_VERSION_MAJOR_MASK)

PLL_SIC - USB PHY PLL Control/Status Register
#define	USBPHY_PLL_SIC_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_PLL_LOCK_MASK)
#define	USBPHY_PLL_SIC_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_PLL_LOCK_MASK)

PLL_SIC_SET - USB PHY PLL Control/Status Register
#define	USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_SET_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_SET_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_SET_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_SET_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_SET_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_LOCK_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_SET_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_SET_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_SET_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_SET_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_SET_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_SET_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_LOCK_MASK)

PLL_SIC_CLR - USB PHY PLL Control/Status Register
#define	USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_CLR_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_CLR_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_CLR_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_CLR_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_CLR_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_CLR_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_CLR_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_CLR_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_CLR_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_CLR_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK)

PLL_SIC_TOG - USB PHY PLL Control/Status Register
#define	USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_TOG_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_TOG_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_TOG_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_TOG_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_TOG_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK   (0x3U)
#define	USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT   (0U)
#define	USBPHY_PLL_SIC_TOG_PLL_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK   (0x40U)
#define	USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT   (6U)
#define	USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_EN_USB_CLKS_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_MASK   (0x800U)
#define	USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_SHIFT   (11U)
#define	USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_HOLD_RING_OFF_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_POWER_MASK   (0x1000U)
#define	USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT   (12U)
#define	USBPHY_PLL_SIC_TOG_PLL_POWER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_POWER_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_POWER_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK   (0x2000U)
#define	USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT   (13U)
#define	USBPHY_PLL_SIC_TOG_PLL_ENABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_ENABLE_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_ENABLE_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK   (0x10000U)
#define	USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT   (16U)
#define	USBPHY_PLL_SIC_TOG_PLL_BYPASS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_BYPASS_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_BYPASS_MASK)
#define	USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK   (0x80000000U)
#define	USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT   (31U)
#define	USBPHY_PLL_SIC_TOG_PLL_LOCK(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK)

USB1_VBUS_DETECT - USB PHY VBUS Detect Control Register
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK)

USB1_VBUS_DETECT_SET - USB PHY VBUS Detect Control Register
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK)

USB1_VBUS_DETECT_CLR - USB PHY VBUS Detect Control Register
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK)

USB1_VBUS_DETECT_TOG - USB PHY VBUS Detect Control Register
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK   (0x7U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_SESSEND_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK   (0x20U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT   (5U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_BVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK   (0x40U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT   (6U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_AVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK   (0x80U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT   (7U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_OVERRIDE_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK   (0x100U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT   (8U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK   (0x600U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT   (9U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK   (0x40000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT   (18U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK   (0x100000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT   (20U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK   (0x4000000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT   (26U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)
#define	USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK   (0x80000000U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT   (31U)
#define	USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK)

USB1_VBUS_DET_STAT - USB PHY VBUS Detector Status Register
#define	USBPHY_USB1_VBUS_DET_STAT_SESSEND_MASK   (0x1U)
#define	USBPHY_USB1_VBUS_DET_STAT_SESSEND_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DET_STAT_SESSEND(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_SESSEND_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_SESSEND_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_BVALID_MASK   (0x2U)
#define	USBPHY_USB1_VBUS_DET_STAT_BVALID_SHIFT   (1U)
#define	USBPHY_USB1_VBUS_DET_STAT_BVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_BVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_BVALID_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_AVALID_MASK   (0x4U)
#define	USBPHY_USB1_VBUS_DET_STAT_AVALID_SHIFT   (2U)
#define	USBPHY_USB1_VBUS_DET_STAT_AVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_AVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_AVALID_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_SESSEND_MASK   (0x1U)
#define	USBPHY_USB1_VBUS_DET_STAT_SESSEND_SHIFT   (0U)
#define	USBPHY_USB1_VBUS_DET_STAT_SESSEND(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_SESSEND_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_SESSEND_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_BVALID_MASK   (0x2U)
#define	USBPHY_USB1_VBUS_DET_STAT_BVALID_SHIFT   (1U)
#define	USBPHY_USB1_VBUS_DET_STAT_BVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_BVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_BVALID_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_AVALID_MASK   (0x4U)
#define	USBPHY_USB1_VBUS_DET_STAT_AVALID_SHIFT   (2U)
#define	USBPHY_USB1_VBUS_DET_STAT_AVALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_AVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_AVALID_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_MASK   (0x8U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_SHIFT   (3U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_MASK)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK   (0x10U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_SHIFT   (4U)
#define	USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK)

USB1_CHRG_DET_STAT - USB PHY Charger Detect Status Register
#define	USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_MASK   (0x1U)
#define	USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_SHIFT   (0U)
#define	USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_MASK   (0x2U)
#define	USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_SHIFT   (1U)
#define	USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_DM_STATE_MASK   (0x4U)
#define	USBPHY_USB1_CHRG_DET_STAT_DM_STATE_SHIFT   (2U)
#define	USBPHY_USB1_CHRG_DET_STAT_DM_STATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DM_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DM_STATE_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_DP_STATE_MASK   (0x8U)
#define	USBPHY_USB1_CHRG_DET_STAT_DP_STATE_SHIFT   (3U)
#define	USBPHY_USB1_CHRG_DET_STAT_DP_STATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DP_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DP_STATE_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_MASK   (0x10U)
#define	USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_SHIFT   (4U)
#define	USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_MASK   (0x1U)
#define	USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_SHIFT   (0U)
#define	USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_MASK   (0x2U)
#define	USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_SHIFT   (1U)
#define	USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_DM_STATE_MASK   (0x4U)
#define	USBPHY_USB1_CHRG_DET_STAT_DM_STATE_SHIFT   (2U)
#define	USBPHY_USB1_CHRG_DET_STAT_DM_STATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DM_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DM_STATE_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_DP_STATE_MASK   (0x8U)
#define	USBPHY_USB1_CHRG_DET_STAT_DP_STATE_SHIFT   (3U)
#define	USBPHY_USB1_CHRG_DET_STAT_DP_STATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DP_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DP_STATE_MASK)
#define	USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_MASK   (0x10U)
#define	USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_SHIFT   (4U)
#define	USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_MASK)

ANACTRL - USB PHY Analog Control Register
#define	USBPHY_ANACTRL_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_PFD_STABLE_MASK)
#define	USBPHY_ANACTRL_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_PFD_STABLE_MASK)

ANACTRL_SET - USB PHY Analog Control Register
#define	USBPHY_ANACTRL_SET_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_SET_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_SET_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_SET_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_SET_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_SET_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_SET_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_SET_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_SET_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_SET_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_SET_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_SET_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_SET_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_SET_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_SET_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_SET_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_SET_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_SET_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_SET_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_SET_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_SET_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_SET_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_SET_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_SET_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_SET_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_SET_PFD_STABLE_MASK)
#define	USBPHY_ANACTRL_SET_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_SET_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_SET_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_SET_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_SET_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_SET_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_SET_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_SET_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_SET_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_SET_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_SET_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_SET_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_SET_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_SET_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_SET_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_SET_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_SET_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_SET_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_SET_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_SET_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_SET_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_SET_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_SET_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_SET_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_SET_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_SET_PFD_STABLE_MASK)

ANACTRL_CLR - USB PHY Analog Control Register
#define	USBPHY_ANACTRL_CLR_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_CLR_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_CLR_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_CLR_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_CLR_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_CLR_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_CLR_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_CLR_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_CLR_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_CLR_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_CLR_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_CLR_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_CLR_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_CLR_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_CLR_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_CLR_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_CLR_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_CLR_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_CLR_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_STABLE_MASK)
#define	USBPHY_ANACTRL_CLR_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_CLR_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_CLR_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_CLR_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_CLR_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_CLR_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_CLR_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_CLR_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_CLR_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_CLR_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_CLR_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_CLR_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_CLR_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_CLR_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_CLR_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_CLR_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_CLR_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_CLR_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_CLR_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_CLR_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_STABLE_MASK)

ANACTRL_TOG - USB PHY Analog Control Register
#define	USBPHY_ANACTRL_TOG_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_TOG_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_TOG_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_TOG_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_TOG_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_TOG_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_TOG_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_TOG_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_TOG_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_TOG_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_TOG_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_TOG_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_TOG_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_TOG_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_TOG_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_TOG_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_TOG_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_TOG_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_TOG_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_STABLE_MASK)
#define	USBPHY_ANACTRL_TOG_TESTCLK_SEL_MASK   (0x1U)
#define	USBPHY_ANACTRL_TOG_TESTCLK_SEL_SHIFT   (0U)
#define	USBPHY_ANACTRL_TOG_TESTCLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_TESTCLK_SEL_SHIFT)) & USBPHY_ANACTRL_TOG_TESTCLK_SEL_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_CLKGATE_MASK   (0x2U)
#define	USBPHY_ANACTRL_TOG_PFD_CLKGATE_SHIFT   (1U)
#define	USBPHY_ANACTRL_TOG_PFD_CLKGATE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLKGATE_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_CLK_SEL_MASK   (0xCU)
#define	USBPHY_ANACTRL_TOG_PFD_CLK_SEL_SHIFT   (2U)
#define	USBPHY_ANACTRL_TOG_PFD_CLK_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLK_SEL_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_FRAC_MASK   (0x3F0U)
#define	USBPHY_ANACTRL_TOG_PFD_FRAC_SHIFT   (4U)
#define	USBPHY_ANACTRL_TOG_PFD_FRAC(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_FRAC_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_FRAC_MASK)
#define	USBPHY_ANACTRL_TOG_DEV_PULLDOWN_MASK   (0x400U)
#define	USBPHY_ANACTRL_TOG_DEV_PULLDOWN_SHIFT   (10U)
#define	USBPHY_ANACTRL_TOG_DEV_PULLDOWN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_TOG_DEV_PULLDOWN_MASK)
#define	USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_MASK   (0x1800U)
#define	USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_SHIFT   (11U)
#define	USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_MASK)
#define	USBPHY_ANACTRL_TOG_EMPH_EN_MASK   (0x2000U)
#define	USBPHY_ANACTRL_TOG_EMPH_EN_SHIFT   (13U)
#define	USBPHY_ANACTRL_TOG_EMPH_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_EN_MASK)
#define	USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_MASK   (0xC000U)
#define	USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_SHIFT   (14U)
#define	USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_MASK)
#define	USBPHY_ANACTRL_TOG_PFD_STABLE_MASK   (0x80000000U)
#define	USBPHY_ANACTRL_TOG_PFD_STABLE_SHIFT   (31U)
#define	USBPHY_ANACTRL_TOG_PFD_STABLE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_STABLE_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_STABLE_MASK)

USB1_LOOPBACK - USB PHY Loopback Control/Status Register
#define	USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTPKT_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TSTPKT_MASK)

USB1_LOOPBACK_SET - USB PHY Loopback Control/Status Register
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_SET_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_SET_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_SET_TSTPKT_MASK)

USB1_LOOPBACK_CLR - USB PHY Loopback Control/Status Register
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_CLR_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_CLR_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_CLR_TSTPKT_MASK)

USB1_LOOPBACK_TOG - USB PHY Loopback Control/Status Register
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK   (0x1U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_TESTSTART_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK   (0x2U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT   (1U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK   (0x4U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT   (2U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMI_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK   (0x8U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT   (3U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK   (0x10U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT   (4U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_LS_MODE_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK   (0x20U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT   (5U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK   (0x40U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT   (6U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_TX_HIZ_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK   (0x80U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT   (7U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST0_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK   (0x100U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT   (8U)
#define	USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_UTMO_DIG_TST1_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK   (0x8000U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT   (15U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTI_HSFS_MODE_EN_MASK)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK   (0xFF0000U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_TOG_TSTPKT(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_TOG_TSTPKT_SHIFT)) & USBPHY_USB1_LOOPBACK_TOG_TSTPKT_MASK)

USB1_LOOPBACK_HSFSCNT - USB PHY Loopback Packet Number Select Register
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TSTI_FS_NUMBER_MASK)

USB1_LOOPBACK_HSFSCNT_SET - USB PHY Loopback Packet Number Select Register
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_SET_TSTI_FS_NUMBER_MASK)

USB1_LOOPBACK_HSFSCNT_CLR - USB PHY Loopback Packet Number Select Register
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_CLR_TSTI_FS_NUMBER_MASK)

USB1_LOOPBACK_HSFSCNT_TOG - USB PHY Loopback Packet Number Select Register
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_MASK   (0xFFFFU)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_SHIFT   (0U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_HS_NUMBER_MASK)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_MASK   (0xFFFF0000U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_SHIFT   (16U)
#define	USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_SHIFT)) & USBPHY_USB1_LOOPBACK_HSFSCNT_TOG_TSTI_FS_NUMBER_MASK)

TRIM_OVERRIDE_EN - USB PHY Trim Override Enable Register
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TRIM_USBPHY_TX_CAL45DM_MASK)

TRIM_OVERRIDE_EN_SET - USB PHY Trim Override Enable Register
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_SET_TRIM_USBPHY_TX_CAL45DM_MASK)

TRIM_OVERRIDE_EN_CLR - USB PHY Trim Override Enable Register
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_CLR_TRIM_USBPHY_TX_CAL45DM_MASK)

TRIM_OVERRIDE_EN_TOG - USB PHY Trim Override Enable Register
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK   (0x1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT   (0U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_DIV_SEL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK   (0x2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT   (1U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_ENV_TAIL_ADJ_VD_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK   (0x4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT   (2U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_D_CAL_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK   (0x8U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT   (3U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DP_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_MASK   (0x10U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_SHIFT   (4U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_TX_CAL45DM_OVERRIDE_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK   (0x30000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT   (16U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_PLL_CTRL0_DIV_SEL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK   (0xC0000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT   (18U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USB_REG_ENV_TAIL_ADJ_VD_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK   (0xF00000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT   (20U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_D_CAL_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK   (0xF000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT   (24U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DP_MASK)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_MASK   (0xF0000000U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_SHIFT   (28U)
#define	USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM(x)   (((uint32_t)(((uint32_t)(x)) << USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_SHIFT)) & USBPHY_TRIM_OVERRIDE_EN_TOG_TRIM_USBPHY_TX_CAL45DM_MASK)

Macro Definition Documentation

USBPHY_ANACTRL_CLR_DEV_PULLDOWN [1/2]

#define USBPHY_ANACTRL_CLR_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_CLR_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_CLR_DEV_PULLDOWN [2/2]

#define USBPHY_ANACTRL_CLR_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_CLR_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL [1/2]

#define USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL [2/2]

#define USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_CLR_EMPH_EN [1/2]

#define USBPHY_ANACTRL_CLR_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_CLR_EMPH_EN [2/2]

#define USBPHY_ANACTRL_CLR_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL [1/2]

#define USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL [2/2]

#define USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_CLR_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_CLR_PFD_CLK_SEL [1/2]

#define USBPHY_ANACTRL_CLR_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_CLR_PFD_CLK_SEL [2/2]

#define USBPHY_ANACTRL_CLR_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_CLR_PFD_CLKGATE [1/2]

#define USBPHY_ANACTRL_CLR_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_ANACTRL_CLR_PFD_CLKGATE [2/2]

#define USBPHY_ANACTRL_CLR_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_CLR_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_CLR_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_ANACTRL_DEV_PULLDOWN [1/2]

#define USBPHY_ANACTRL_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_DEV_PULLDOWN [2/2]

#define USBPHY_ANACTRL_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_EMPH_CUR_CTRL [1/2]

#define USBPHY_ANACTRL_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_EMPH_CUR_CTRL [2/2]

#define USBPHY_ANACTRL_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_EMPH_EN [1/2]

#define USBPHY_ANACTRL_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_EMPH_EN [2/2]

#define USBPHY_ANACTRL_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_EMPH_PULSE_CTRL [1/2]

#define USBPHY_ANACTRL_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_EMPH_PULSE_CTRL [2/2]

#define USBPHY_ANACTRL_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_PFD_CLK_SEL [1/2]

#define USBPHY_ANACTRL_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_PFD_CLK_SEL [2/2]

#define USBPHY_ANACTRL_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_PFD_CLKGATE [1/2]

#define USBPHY_ANACTRL_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_ANACTRL_PFD_CLKGATE [2/2]

#define USBPHY_ANACTRL_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_ANACTRL_SET_DEV_PULLDOWN [1/2]

#define USBPHY_ANACTRL_SET_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_SET_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_SET_DEV_PULLDOWN [2/2]

#define USBPHY_ANACTRL_SET_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_SET_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_SET_EMPH_CUR_CTRL [1/2]

#define USBPHY_ANACTRL_SET_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_SET_EMPH_CUR_CTRL [2/2]

#define USBPHY_ANACTRL_SET_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_SET_EMPH_EN [1/2]

#define USBPHY_ANACTRL_SET_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_SET_EMPH_EN [2/2]

#define USBPHY_ANACTRL_SET_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL [1/2]

#define USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL [2/2]

#define USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_SET_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_SET_PFD_CLK_SEL [1/2]

#define USBPHY_ANACTRL_SET_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_SET_PFD_CLK_SEL [2/2]

#define USBPHY_ANACTRL_SET_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_SET_PFD_CLKGATE [1/2]

#define USBPHY_ANACTRL_SET_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_ANACTRL_SET_PFD_CLKGATE [2/2]

#define USBPHY_ANACTRL_SET_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_SET_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_SET_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_ANACTRL_TOG_DEV_PULLDOWN [1/2]

#define USBPHY_ANACTRL_TOG_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_TOG_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_TOG_DEV_PULLDOWN [2/2]

#define USBPHY_ANACTRL_TOG_DEV_PULLDOWN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_DEV_PULLDOWN_SHIFT)) & USBPHY_ANACTRL_TOG_DEV_PULLDOWN_MASK)

DEV_PULLDOWN 0b0..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare disabled in device mode. 0b1..The 15kohm nominal pulldowns on the USB_DP and USB_DM pinsare enabled in device mode.

USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL [1/2]

#define USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL [2/2]

#define USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_CUR_CTRL_MASK)

EMPH_CUR_CTRL 0b00..No pre-emphasis current is enabled for the HS TX drivers 0b01..One unit of pre-emphasis current is enabled for the HS TX drivers 0b10..Two units of pre-emphasis current are enabled for the HS TX drivers 0b11..Three units of pre-emphasis current are enabled for the HS TX drivers

USBPHY_ANACTRL_TOG_EMPH_EN [1/2]

#define USBPHY_ANACTRL_TOG_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_TOG_EMPH_EN [2/2]

#define USBPHY_ANACTRL_TOG_EMPH_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_EN_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_EN_MASK)

EMPH_EN 0b0..No pre-emphasis is used on HS TX output drivers 0b1..Enables pre-emphasis for HS TX output drivers

USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL [1/2]

#define USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL [2/2]

#define USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_SHIFT)) & USBPHY_ANACTRL_TOG_EMPH_PULSE_CTRL_MASK)

EMPH_PULSE_CTRL 0b00..Minimum duration of pre-emphasis current after each data transition 0b11..Maximum duration of pre-emphasis current after each data transition

USBPHY_ANACTRL_TOG_PFD_CLK_SEL [1/2]

#define USBPHY_ANACTRL_TOG_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_TOG_PFD_CLK_SEL [2/2]

#define USBPHY_ANACTRL_TOG_PFD_CLK_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLK_SEL_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLK_SEL_MASK)

PFD_CLK_SEL 0b00..USB1PFDCLK is the same frequency as the xtal clock (Default) 0b01..USB1PFDCLK frequency is pfd_clk divided by 4 0b10..USB1PFDCLK frequency is pfd_clk divided by 2 0b11..USB1PFDCLK frequency is the same as pfd_clk frequency

USBPHY_ANACTRL_TOG_PFD_CLKGATE [1/2]

#define USBPHY_ANACTRL_TOG_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_ANACTRL_TOG_PFD_CLKGATE [2/2]

#define USBPHY_ANACTRL_TOG_PFD_CLKGATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_ANACTRL_TOG_PFD_CLKGATE_SHIFT)) & USBPHY_ANACTRL_TOG_PFD_CLKGATE_MASK)

PFD_CLKGATE 0b0..PFD clock output is enabled 0b1..PFD clock output is gated (Default)

USBPHY_CTRL_CLR_ENDEVPLUGINDET [1/2]

#define USBPHY_CTRL_CLR_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_CTRL_CLR_ENDEVPLUGINDET [2/2]

#define USBPHY_CTRL_CLR_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_CLR_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_CLR_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_CTRL_ENDEVPLUGINDET [1/2]

#define USBPHY_CTRL_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_CTRL_ENDEVPLUGINDET [2/2]

#define USBPHY_CTRL_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_CTRL_SET_ENDEVPLUGINDET [1/2]

#define USBPHY_CTRL_SET_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_CTRL_SET_ENDEVPLUGINDET [2/2]

#define USBPHY_CTRL_SET_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_SET_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_SET_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_CTRL_TOG_ENDEVPLUGINDET [1/2]

#define USBPHY_CTRL_TOG_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_CTRL_TOG_ENDEVPLUGINDET [2/2]

#define USBPHY_CTRL_TOG_ENDEVPLUGINDET

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_CTRL_TOG_ENDEVPLUGINDET_SHIFT)) & USBPHY_CTRL_TOG_ENDEVPLUGINDET_MASK)

ENDEVPLUGINDET - Enables non-standard resistive plugged-in detection 0b0..Disables 200kohm pullup resistors on USB_DP and USB_DM pins (Default) 0b1..Enables 200kohm pullup resistors on USB_DP and USB_DM pins

USBPHY_DEBUG1_CLR_ENTAILADJVD [1/2]

#define USBPHY_DEBUG1_CLR_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_DEBUG1_CLR_ENTAILADJVD [2/2]

#define USBPHY_DEBUG1_CLR_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_CLR_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_CLR_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_DEBUG1_ENTAILADJVD [1/2]

#define USBPHY_DEBUG1_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_DEBUG1_ENTAILADJVD [2/2]

#define USBPHY_DEBUG1_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_DEBUG1_SET_ENTAILADJVD [1/2]

#define USBPHY_DEBUG1_SET_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_DEBUG1_SET_ENTAILADJVD [2/2]

#define USBPHY_DEBUG1_SET_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_SET_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_SET_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_DEBUG1_TOG_ENTAILADJVD [1/2]

#define USBPHY_DEBUG1_TOG_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_DEBUG1_TOG_ENTAILADJVD [2/2]

#define USBPHY_DEBUG1_TOG_ENTAILADJVD

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_DEBUG1_TOG_ENTAILADJVD_SHIFT)) & USBPHY_DEBUG1_TOG_ENTAILADJVD_MASK)

ENTAILADJVD 0b00..Delay is nominal 0b01..Delay is +20% 0b10..Delay is -20% 0b11..Delay is -40%

USBPHY_PLL_SIC_CLR_PLL_DIV_SEL [1/2]

#define USBPHY_PLL_SIC_CLR_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_CLR_PLL_DIV_SEL [2/2]

#define USBPHY_PLL_SIC_CLR_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_CLR_PLL_LOCK [1/2]

#define USBPHY_PLL_SIC_CLR_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PLL_SIC_CLR_PLL_LOCK [2/2]

#define USBPHY_PLL_SIC_CLR_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_CLR_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_CLR_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PLL_SIC_PLL_DIV_SEL [1/2]

#define USBPHY_PLL_SIC_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_PLL_DIV_SEL [2/2]

#define USBPHY_PLL_SIC_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_PLL_LOCK [1/2]

#define USBPHY_PLL_SIC_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PLL_SIC_PLL_LOCK [2/2]

#define USBPHY_PLL_SIC_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PLL_SIC_SET_PLL_DIV_SEL [1/2]

#define USBPHY_PLL_SIC_SET_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_SET_PLL_DIV_SEL [2/2]

#define USBPHY_PLL_SIC_SET_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_SET_PLL_LOCK [1/2]

#define USBPHY_PLL_SIC_SET_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PLL_SIC_SET_PLL_LOCK [2/2]

#define USBPHY_PLL_SIC_SET_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_SET_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_SET_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PLL_SIC_TOG_PLL_DIV_SEL [1/2]

#define USBPHY_PLL_SIC_TOG_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_TOG_PLL_DIV_SEL [2/2]

#define USBPHY_PLL_SIC_TOG_PLL_DIV_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_DIV_SEL_MASK)

PLL_DIV_SEL 0b00..PLL reference frequency = 24MHz 0b01..PLL reference frequency = 16MHz 0b1x..PLL reference frequency = 12MHz

USBPHY_PLL_SIC_TOG_PLL_LOCK [1/2]

#define USBPHY_PLL_SIC_TOG_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PLL_SIC_TOG_PLL_LOCK [2/2]

#define USBPHY_PLL_SIC_TOG_PLL_LOCK

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_TOG_PLL_LOCK_SHIFT)) & USBPHY_PLL_SIC_TOG_PLL_LOCK_MASK)

PLL_LOCK 0b0..PLL is not currently locked 0b1..PLL is currently locked

USBPHY_PWD_CLR_RXPWD1PT1 [1/2]

#define USBPHY_PWD_CLR_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_CLR_RXPWD1PT1 [2/2]

#define USBPHY_PWD_CLR_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWD1PT1_SHIFT)) & USBPHY_PWD_CLR_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_CLR_RXPWDDIFF [1/2]

#define USBPHY_PWD_CLR_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_CLR_RXPWDDIFF [2/2]

#define USBPHY_PWD_CLR_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDDIFF_SHIFT)) & USBPHY_PWD_CLR_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_CLR_RXPWDENV [1/2]

#define USBPHY_PWD_CLR_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_CLR_RXPWDENV [2/2]

#define USBPHY_PWD_CLR_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDENV_SHIFT)) & USBPHY_PWD_CLR_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_CLR_RXPWDRX [1/2]

#define USBPHY_PWD_CLR_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_CLR_RXPWDRX [2/2]

#define USBPHY_PWD_CLR_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RXPWDRX_SHIFT)) & USBPHY_PWD_CLR_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_CLR_TXPWDFS [1/2]

#define USBPHY_PWD_CLR_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_CLR_TXPWDFS [2/2]

#define USBPHY_PWD_CLR_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDFS_SHIFT)) & USBPHY_PWD_CLR_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_CLR_TXPWDIBIAS [1/2]

#define USBPHY_PWD_CLR_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_CLR_TXPWDIBIAS [2/2]

#define USBPHY_PWD_CLR_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_CLR_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_CLR_TXPWDV2I [1/2]

#define USBPHY_PWD_CLR_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_PWD_CLR_TXPWDV2I [2/2]

#define USBPHY_PWD_CLR_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_TXPWDV2I_SHIFT)) & USBPHY_PWD_CLR_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_PWD_RXPWD1PT1 [1/2]

#define USBPHY_PWD_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_RXPWD1PT1 [2/2]

#define USBPHY_PWD_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWD1PT1_SHIFT)) & USBPHY_PWD_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_RXPWDDIFF [1/2]

#define USBPHY_PWD_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_RXPWDDIFF [2/2]

#define USBPHY_PWD_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDDIFF_SHIFT)) & USBPHY_PWD_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_RXPWDENV [1/2]

#define USBPHY_PWD_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_RXPWDENV [2/2]

#define USBPHY_PWD_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDENV_SHIFT)) & USBPHY_PWD_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_RXPWDRX [1/2]

#define USBPHY_PWD_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_RXPWDRX [2/2]

#define USBPHY_PWD_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RXPWDRX_SHIFT)) & USBPHY_PWD_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_SET_RXPWD1PT1 [1/2]

#define USBPHY_PWD_SET_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_SET_RXPWD1PT1 [2/2]

#define USBPHY_PWD_SET_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWD1PT1_SHIFT)) & USBPHY_PWD_SET_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_SET_RXPWDDIFF [1/2]

#define USBPHY_PWD_SET_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_SET_RXPWDDIFF [2/2]

#define USBPHY_PWD_SET_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDDIFF_SHIFT)) & USBPHY_PWD_SET_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_SET_RXPWDENV [1/2]

#define USBPHY_PWD_SET_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_SET_RXPWDENV [2/2]

#define USBPHY_PWD_SET_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDENV_SHIFT)) & USBPHY_PWD_SET_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_SET_RXPWDRX [1/2]

#define USBPHY_PWD_SET_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_SET_RXPWDRX [2/2]

#define USBPHY_PWD_SET_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_RXPWDRX_SHIFT)) & USBPHY_PWD_SET_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_SET_TXPWDFS [1/2]

#define USBPHY_PWD_SET_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_SET_TXPWDFS [2/2]

#define USBPHY_PWD_SET_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDFS_SHIFT)) & USBPHY_PWD_SET_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_SET_TXPWDIBIAS [1/2]

#define USBPHY_PWD_SET_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_SET_TXPWDIBIAS [2/2]

#define USBPHY_PWD_SET_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_SET_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_SET_TXPWDV2I [1/2]

#define USBPHY_PWD_SET_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_PWD_SET_TXPWDV2I [2/2]

#define USBPHY_PWD_SET_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_SET_TXPWDV2I_SHIFT)) & USBPHY_PWD_SET_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_PWD_TOG_RXPWD1PT1 [1/2]

#define USBPHY_PWD_TOG_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_TOG_RXPWD1PT1 [2/2]

#define USBPHY_PWD_TOG_RXPWD1PT1

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWD1PT1_SHIFT)) & USBPHY_PWD_TOG_RXPWD1PT1_MASK)

RXPWD1PT1 0b0..Normal operation 0b1..Power-down the USB full-speed differential receiver.

USBPHY_PWD_TOG_RXPWDDIFF [1/2]

#define USBPHY_PWD_TOG_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_TOG_RXPWDDIFF [2/2]

#define USBPHY_PWD_TOG_RXPWDDIFF

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDDIFF_SHIFT)) & USBPHY_PWD_TOG_RXPWDDIFF_MASK)

RXPWDDIFF 0b0..Normal operation. 0b1..Power-down the USB high-speed differential receiver

USBPHY_PWD_TOG_RXPWDENV [1/2]

#define USBPHY_PWD_TOG_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_TOG_RXPWDENV [2/2]

#define USBPHY_PWD_TOG_RXPWDENV

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDENV_SHIFT)) & USBPHY_PWD_TOG_RXPWDENV_MASK)

RXPWDENV 0b0..Normal operation. 0b1..Power-down the USB high-speed receiver envelope detector (squelch signal)

USBPHY_PWD_TOG_RXPWDRX [1/2]

#define USBPHY_PWD_TOG_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_TOG_RXPWDRX [2/2]

#define USBPHY_PWD_TOG_RXPWDRX

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_RXPWDRX_SHIFT)) & USBPHY_PWD_TOG_RXPWDRX_MASK)

RXPWDRX 0b0..Normal operation 0b1..Power-down the entire USB PHY receiver block except for the full-speed differential receiver

USBPHY_PWD_TOG_TXPWDFS [1/2]

#define USBPHY_PWD_TOG_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_TOG_TXPWDFS [2/2]

#define USBPHY_PWD_TOG_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDFS_SHIFT)) & USBPHY_PWD_TOG_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_TOG_TXPWDIBIAS [1/2]

#define USBPHY_PWD_TOG_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_TOG_TXPWDIBIAS [2/2]

#define USBPHY_PWD_TOG_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TOG_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_TOG_TXPWDV2I [1/2]

#define USBPHY_PWD_TOG_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_PWD_TOG_TXPWDV2I [2/2]

#define USBPHY_PWD_TOG_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TOG_TXPWDV2I_SHIFT)) & USBPHY_PWD_TOG_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_PWD_TXPWDFS [1/2]

#define USBPHY_PWD_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_TXPWDFS [2/2]

#define USBPHY_PWD_TXPWDFS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDFS_SHIFT)) & USBPHY_PWD_TXPWDFS_MASK)

TXPWDFS 0b0..Normal operation. 0b1..Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers into high-impedance output

USBPHY_PWD_TXPWDIBIAS [1/2]

#define USBPHY_PWD_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_TXPWDIBIAS [2/2]

#define USBPHY_PWD_TXPWDIBIAS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDIBIAS_SHIFT)) & USBPHY_PWD_TXPWDIBIAS_MASK)

TXPWDIBIAS 0b0..Normal operation 0b1..Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the USB is in suspend mode. This effectively powers down the entire USB transmit path

USBPHY_PWD_TXPWDV2I [1/2]

#define USBPHY_PWD_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_PWD_TXPWDV2I [2/2]

#define USBPHY_PWD_TXPWDV2I

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_TXPWDV2I_SHIFT)) & USBPHY_PWD_TXPWDV2I_MASK)

TXPWDV2I 0b0..Normal operation. 0b1..Power-down the USB PHY transmit V-to-I converter and the current mirror

USBPHY_RX_CLR_DISCONADJ [1/2]

#define USBPHY_RX_CLR_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_CLR_DISCONADJ [2/2]

#define USBPHY_RX_CLR_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_DISCONADJ_SHIFT)) & USBPHY_RX_CLR_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_CLR_ENVADJ [1/2]

#define USBPHY_RX_CLR_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_CLR_ENVADJ [2/2]

#define USBPHY_RX_CLR_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_ENVADJ_SHIFT)) & USBPHY_RX_CLR_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_CLR_RXDBYPASS [1/2]

#define USBPHY_RX_CLR_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_RX_CLR_RXDBYPASS [2/2]

#define USBPHY_RX_CLR_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_CLR_RXDBYPASS_SHIFT)) & USBPHY_RX_CLR_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_RX_DISCONADJ [1/2]

#define USBPHY_RX_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_DISCONADJ [2/2]

#define USBPHY_RX_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_DISCONADJ_SHIFT)) & USBPHY_RX_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_ENVADJ [1/2]

#define USBPHY_RX_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_ENVADJ [2/2]

#define USBPHY_RX_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_ENVADJ_SHIFT)) & USBPHY_RX_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_RXDBYPASS [1/2]

#define USBPHY_RX_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_RX_RXDBYPASS [2/2]

#define USBPHY_RX_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_RXDBYPASS_SHIFT)) & USBPHY_RX_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_RX_SET_DISCONADJ [1/2]

#define USBPHY_RX_SET_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_SET_DISCONADJ [2/2]

#define USBPHY_RX_SET_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_DISCONADJ_SHIFT)) & USBPHY_RX_SET_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_SET_ENVADJ [1/2]

#define USBPHY_RX_SET_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_SET_ENVADJ [2/2]

#define USBPHY_RX_SET_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_ENVADJ_SHIFT)) & USBPHY_RX_SET_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_SET_RXDBYPASS [1/2]

#define USBPHY_RX_SET_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_RX_SET_RXDBYPASS [2/2]

#define USBPHY_RX_SET_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_SET_RXDBYPASS_SHIFT)) & USBPHY_RX_SET_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_RX_TOG_DISCONADJ [1/2]

#define USBPHY_RX_TOG_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_TOG_DISCONADJ [2/2]

#define USBPHY_RX_TOG_DISCONADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_DISCONADJ_SHIFT)) & USBPHY_RX_TOG_DISCONADJ_MASK)

DISCONADJ 0b000..Trip-Level Voltage is 0.56875 V 0b001..Trip-Level Voltage is 0.55000 V 0b010..Trip-Level Voltage is 0.58125 V 0b011..Trip-Level Voltage is 0.60000 V 0b1xx..Reserved

USBPHY_RX_TOG_ENVADJ [1/2]

#define USBPHY_RX_TOG_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_TOG_ENVADJ [2/2]

#define USBPHY_RX_TOG_ENVADJ

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_ENVADJ_SHIFT)) & USBPHY_RX_TOG_ENVADJ_MASK)

ENVADJ 0b000..Trip-Level Voltage is 0.1000 V 0b001..Trip-Level Voltage is 0.1125 V 0b010..Trip-Level Voltage is 0.1250 V 0b011..Trip-Level Voltage is 0.0875 V 0b1xx..Reserved

USBPHY_RX_TOG_RXDBYPASS [1/2]

#define USBPHY_RX_TOG_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_RX_TOG_RXDBYPASS [2/2]

#define USBPHY_RX_TOG_RXDBYPASS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_RX_TOG_RXDBYPASS_SHIFT)) & USBPHY_RX_TOG_RXDBYPASS_MASK)

RXDBYPASS 0b0..Normal operation. 0b1..Use the output of the USB_DP single-ended receiver in place of the full-speed differential receiver

USBPHY_STATUS_DEVPLUGIN_STATUS [1/2]

#define USBPHY_STATUS_DEVPLUGIN_STATUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)

DEVPLUGIN_STATUS - Status indicator for non-standard resistive plugged-in detection 0b0..No attachment to a USB host is detected 0b1..Cable attachment to a USB host is detected

USBPHY_STATUS_DEVPLUGIN_STATUS [2/2]

#define USBPHY_STATUS_DEVPLUGIN_STATUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_DEVPLUGIN_STATUS_SHIFT)) & USBPHY_STATUS_DEVPLUGIN_STATUS_MASK)

DEVPLUGIN_STATUS - Status indicator for non-standard resistive plugged-in detection 0b0..No attachment to a USB host is detected 0b1..Cable attachment to a USB host is detected

USBPHY_STATUS_HOSTDISCONDETECT_STATUS [1/2]

#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) & USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)

HOSTDISCONDETECT_STATUS 0b0..USB cable disconnect has not been detected at the local host 0b1..USB cable disconnect has been detected at the local host

USBPHY_STATUS_HOSTDISCONDETECT_STATUS [2/2]

#define USBPHY_STATUS_HOSTDISCONDETECT_STATUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_STATUS_HOSTDISCONDETECT_STATUS_SHIFT)) & USBPHY_STATUS_HOSTDISCONDETECT_STATUS_MASK)

HOSTDISCONDETECT_STATUS 0b0..USB cable disconnect has not been detected at the local host 0b1..USB cable disconnect has been detected at the local host

USBPHY_TX_CLR_D_CAL [1/2]

#define USBPHY_TX_CLR_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_TX_CLR_D_CAL [2/2]

#define USBPHY_TX_CLR_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_CLR_D_CAL_SHIFT)) & USBPHY_TX_CLR_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_TX_D_CAL [1/2]

#define USBPHY_TX_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_TX_D_CAL [2/2]

#define USBPHY_TX_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_D_CAL_SHIFT)) & USBPHY_TX_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_TX_SET_D_CAL [1/2]

#define USBPHY_TX_SET_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_TX_SET_D_CAL [2/2]

#define USBPHY_TX_SET_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_SET_D_CAL_SHIFT)) & USBPHY_TX_SET_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_TX_TOG_D_CAL [1/2]

#define USBPHY_TX_TOG_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_TX_TOG_D_CAL [2/2]

#define USBPHY_TX_TOG_D_CAL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_TX_TOG_D_CAL_SHIFT)) & USBPHY_TX_TOG_D_CAL_MASK)

D_CAL 0b0000..Maximum current, approximately 19% above nominal. 0b0111..Nominal 0b1111..Minimum current, approximately 19% below nominal.

USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED [1/2]

#define USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_MASK)

CHRG_DETECTED - Battery Charging Primary Detection phase output 0b0..Standard Downstream Port (SDP) has been detected 0b1..Charging Port has been detected

USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED [2/2]

#define USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_CHRG_DETECTED_MASK)

CHRG_DETECTED - Battery Charging Primary Detection phase output 0b0..Standard Downstream Port (SDP) has been detected 0b1..Charging Port has been detected

USBPHY_USB1_CHRG_DET_STAT_DM_STATE [1/2]

#define USBPHY_USB1_CHRG_DET_STAT_DM_STATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DM_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DM_STATE_MASK)

DM_STATE 0b0..USB_DM pin voltage is < 0.8V 0b1..USB_DM pin voltage is > 2.0V

USBPHY_USB1_CHRG_DET_STAT_DM_STATE [2/2]

#define USBPHY_USB1_CHRG_DET_STAT_DM_STATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DM_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DM_STATE_MASK)

DM_STATE 0b0..USB_DM pin voltage is < 0.8V 0b1..USB_DM pin voltage is > 2.0V

USBPHY_USB1_CHRG_DET_STAT_DP_STATE [1/2]

#define USBPHY_USB1_CHRG_DET_STAT_DP_STATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DP_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DP_STATE_MASK)

DP_STATE 0b0..USB_DP pin voltage is < 0.8V 0b1..USB_DP pin voltage is > 2.0V

USBPHY_USB1_CHRG_DET_STAT_DP_STATE [2/2]

#define USBPHY_USB1_CHRG_DET_STAT_DP_STATE

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_DP_STATE_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_DP_STATE_MASK)

DP_STATE 0b0..USB_DP pin voltage is < 0.8V 0b1..USB_DP pin voltage is > 2.0V

USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT [1/2]

#define USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_MASK)

PLUG_CONTACT - Battery Charging Data Contact Detection phase output 0b0..No USB cable attachment has been detected 0b1..A USB cable attachment between the device and host has been detected

USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT [2/2]

#define USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_PLUG_CONTACT_MASK)

PLUG_CONTACT - Battery Charging Data Contact Detection phase output 0b0..No USB cable attachment has been detected 0b1..A USB cable attachment between the device and host has been detected

USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP [1/2]

#define USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_MASK)

SECDET_DCP - Battery Charging Secondary Detection phase output 0b0..Charging Downstream Port (CDP) has been detected 0b1..Downstream Charging Port (DCP) has been detected

USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP [2/2]

#define USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_SHIFT)) & USBPHY_USB1_CHRG_DET_STAT_SECDET_DCP_MASK)

SECDET_DCP - Battery Charging Secondary Detection phase output 0b0..Charging Downstream Port (CDP) has been detected 0b1..Downstream Charging Port (DCP) has been detected

USBPHY_USB1_VBUS_DET_STAT_AVALID [1/2]

#define USBPHY_USB1_VBUS_DET_STAT_AVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_AVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_AVALID_MASK)

AVALID - A-Device Session Valid status 0b0..The VBUS voltage is below the Session Valid threshold 0b1..The VBUS voltage is above the Session Valid threshold

USBPHY_USB1_VBUS_DET_STAT_AVALID [2/2]

#define USBPHY_USB1_VBUS_DET_STAT_AVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_AVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_AVALID_MASK)

AVALID - A-Device Session Valid status 0b0..The VBUS voltage is below the Session Valid threshold 0b1..The VBUS voltage is above the Session Valid threshold

USBPHY_USB1_VBUS_DET_STAT_BVALID [1/2]

#define USBPHY_USB1_VBUS_DET_STAT_BVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_BVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_BVALID_MASK)

BVALID - B-Device Session Valid status 0b0..The VBUS voltage is below the Session Valid threshold 0b1..The VBUS voltage is above the Session Valid threshold

USBPHY_USB1_VBUS_DET_STAT_BVALID [2/2]

#define USBPHY_USB1_VBUS_DET_STAT_BVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_BVALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_BVALID_MASK)

BVALID - B-Device Session Valid status 0b0..The VBUS voltage is below the Session Valid threshold 0b1..The VBUS voltage is above the Session Valid threshold

USBPHY_USB1_VBUS_DET_STAT_SESSEND [1/2]

#define USBPHY_USB1_VBUS_DET_STAT_SESSEND

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_SESSEND_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_SESSEND_MASK)

SESSEND - Session End indicator 0b0..The VBUS voltage is above the Session Valid threshold 0b1..The VBUS voltage is below the Session Valid threshold

USBPHY_USB1_VBUS_DET_STAT_SESSEND [2/2]

#define USBPHY_USB1_VBUS_DET_STAT_SESSEND

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_SESSEND_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_SESSEND_MASK)

SESSEND - Session End indicator 0b0..The VBUS voltage is above the Session Valid threshold 0b1..The VBUS voltage is below the Session Valid threshold

USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID [1/2]

#define USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_MASK)

VBUS_VALID - VBUS voltage status 0b0..VBUS is below the comparator threshold 0b1..VBUS is above the comparator threshold

USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID [2/2]

#define USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_MASK)

VBUS_VALID - VBUS voltage status 0b0..VBUS is below the comparator threshold 0b1..VBUS is above the comparator threshold

USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V [1/2]

#define USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK)

VBUS_VALID_3V - VBUS_VALID_3V detector status 0b0..VBUS voltage is below VBUS_VALID_3V threshold 0b1..VBUS voltage is above VBUS_VALID_3V threshold

USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V [2/2]

#define USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_SHIFT)) & USBPHY_USB1_VBUS_DET_STAT_VBUS_VALID_3V_MASK)

VBUS_VALID_3V - VBUS_VALID_3V detector status 0b0..VBUS voltage is below VBUS_VALID_3V threshold 0b1..VBUS voltage is above VBUS_VALID_3V threshold

USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID [1/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.

USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID [2/2]

#define USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_CLR_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.

USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS [1/2]

#define USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS [2/2]

#define USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR [1/2]

#define USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR [2/2]

#define USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS [1/2]

#define USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS [2/2]

#define USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID [1/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.

USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID [2/2]

#define USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_SET_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.

USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_DISCHARGE_VBUS_MASK)

DISCHARGE_VBUS - Controls VBUS discharge resistor 0b0..VBUS discharge resistor is disabled (Default) 0b1..VBUS discharge resistor is enabled

USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_EN_CHARGER_RESISTOR_MASK)

EN_CHARGER_RESISTOR - Enables resistors used for an older method of resistive battery charger detection 0b0..Disable resistive charger detection resistors on USB_DP and USB_DP 0b1..Enable resistive charger detection resistors on USB_DP and USB_DP

USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_PWRUP_CMPS_MASK)

PWRUP_CMPS - Enables the VBUS_VALID comparator 0b0..Powers down the VBUS_VALID comparator 0b1..Enables the VBUS_VALID comparator (default)

USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID [1/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.

USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID [2/2]

#define USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_TOG_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.

USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN [1/2]

#define USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN [2/2]

#define USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_OVERRIDE_EN_MASK)

VBUS_OVERRIDE_EN - VBUS detect signal override enable 0b0..Use the results of the internal VBUS_VALID and Session Valid comparators for VBUS_VALID, AVALID, BVALID, and SESSEND (Default) 0b1..Use the override values for VBUS_VALID, AVALID, BVALID, and SESSEND

USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUS_SOURCE_SEL_MASK)

VBUS_SOURCE_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b00..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b01..Use the Session Valid comparator results for signal reported to the USB controller 0b10..Use the Session Valid comparator results for signal reported to the USB controller 0b11..Reserved, do not use

USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL [1/2]

#define USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL [2/2]

#define USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_SEL_MASK)

VBUSVALID_SEL - Selects the source of the VBUS_VALID signal reported to the USB controller 0b0..Use the VBUS_VALID comparator results for signal reported to the USB controller (Default) 0b1..Use the VBUS_VALID_3V detector results for signal reported to the USB controller

USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH [1/2]

#define USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH [2/2]

#define USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_THRESH_MASK)

VBUSVALID_THRESH 0b000..4.0 V 0b001..4.1 V 0b010..4.2 V 0b011..4.3 V 0b100..4.4 V (Default) 0b101..4.5 V 0b110..4.6 V 0b111..4.7 V

USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID [1/2]

#define USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.

USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID [2/2]

#define USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID

(

x

)

(((uint32_t)(((uint32_t)(x)) << USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_SHIFT)) & USBPHY_USB1_VBUS_DETECT_VBUSVALID_TO_SESSVALID_MASK)

VBUSVALID_TO_SESSVALID - Selects the comparator used for VBUS_VALID 0b0..Use the VBUS_VALID comparator for VBUS_VALID results 0b1..Use the Session End comparator for VBUS_VALID results. The Session End threshold is >0.8V and <4.0V.