|
mikroSDK Reference Manual
|
SEL0 - Crossbar B Select Register 0 | |
| #define | XBARB_SEL0_SEL0_MASK (0x3FU) |
| #define | XBARB_SEL0_SEL0_SHIFT (0U) |
| #define | XBARB_SEL0_SEL0(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL0_SHIFT)) & XBARB_SEL0_SEL0_MASK) |
| #define | XBARB_SEL0_SEL1_MASK (0x3F00U) |
| #define | XBARB_SEL0_SEL1_SHIFT (8U) |
| #define | XBARB_SEL0_SEL1(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL1_SHIFT)) & XBARB_SEL0_SEL1_MASK) |
SEL1 - Crossbar B Select Register 1 | |
| #define | XBARB_SEL1_SEL2_MASK (0x3FU) |
| #define | XBARB_SEL1_SEL2_SHIFT (0U) |
| #define | XBARB_SEL1_SEL2(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL2_SHIFT)) & XBARB_SEL1_SEL2_MASK) |
| #define | XBARB_SEL1_SEL3_MASK (0x3F00U) |
| #define | XBARB_SEL1_SEL3_SHIFT (8U) |
| #define | XBARB_SEL1_SEL3(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL3_SHIFT)) & XBARB_SEL1_SEL3_MASK) |
SEL2 - Crossbar B Select Register 2 | |
| #define | XBARB_SEL2_SEL4_MASK (0x3FU) |
| #define | XBARB_SEL2_SEL4_SHIFT (0U) |
| #define | XBARB_SEL2_SEL4(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL4_SHIFT)) & XBARB_SEL2_SEL4_MASK) |
| #define | XBARB_SEL2_SEL5_MASK (0x3F00U) |
| #define | XBARB_SEL2_SEL5_SHIFT (8U) |
| #define | XBARB_SEL2_SEL5(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL5_SHIFT)) & XBARB_SEL2_SEL5_MASK) |
SEL3 - Crossbar B Select Register 3 | |
| #define | XBARB_SEL3_SEL6_MASK (0x3FU) |
| #define | XBARB_SEL3_SEL6_SHIFT (0U) |
| #define | XBARB_SEL3_SEL6(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL6_SHIFT)) & XBARB_SEL3_SEL6_MASK) |
| #define | XBARB_SEL3_SEL7_MASK (0x3F00U) |
| #define | XBARB_SEL3_SEL7_SHIFT (8U) |
| #define | XBARB_SEL3_SEL7(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL7_SHIFT)) & XBARB_SEL3_SEL7_MASK) |
SEL4 - Crossbar B Select Register 4 | |
| #define | XBARB_SEL4_SEL8_MASK (0x3FU) |
| #define | XBARB_SEL4_SEL8_SHIFT (0U) |
| #define | XBARB_SEL4_SEL8(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL8_SHIFT)) & XBARB_SEL4_SEL8_MASK) |
| #define | XBARB_SEL4_SEL9_MASK (0x3F00U) |
| #define | XBARB_SEL4_SEL9_SHIFT (8U) |
| #define | XBARB_SEL4_SEL9(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL9_SHIFT)) & XBARB_SEL4_SEL9_MASK) |
SEL5 - Crossbar B Select Register 5 | |
| #define | XBARB_SEL5_SEL10_MASK (0x3FU) |
| #define | XBARB_SEL5_SEL10_SHIFT (0U) |
| #define | XBARB_SEL5_SEL10(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL10_SHIFT)) & XBARB_SEL5_SEL10_MASK) |
| #define | XBARB_SEL5_SEL11_MASK (0x3F00U) |
| #define | XBARB_SEL5_SEL11_SHIFT (8U) |
| #define | XBARB_SEL5_SEL11(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL11_SHIFT)) & XBARB_SEL5_SEL11_MASK) |
SEL6 - Crossbar B Select Register 6 | |
| #define | XBARB_SEL6_SEL12_MASK (0x3FU) |
| #define | XBARB_SEL6_SEL12_SHIFT (0U) |
| #define | XBARB_SEL6_SEL12(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL12_SHIFT)) & XBARB_SEL6_SEL12_MASK) |
| #define | XBARB_SEL6_SEL13_MASK (0x3F00U) |
| #define | XBARB_SEL6_SEL13_SHIFT (8U) |
| #define | XBARB_SEL6_SEL13(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL13_SHIFT)) & XBARB_SEL6_SEL13_MASK) |
SEL7 - Crossbar B Select Register 7 | |
| #define | XBARB_SEL7_SEL14_MASK (0x3FU) |
| #define | XBARB_SEL7_SEL14_SHIFT (0U) |
| #define | XBARB_SEL7_SEL14(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL14_SHIFT)) & XBARB_SEL7_SEL14_MASK) |
| #define | XBARB_SEL7_SEL15_MASK (0x3F00U) |
| #define | XBARB_SEL7_SEL15_SHIFT (8U) |
| #define | XBARB_SEL7_SEL15(x) (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL15_SHIFT)) & XBARB_SEL7_SEL15_MASK) |
| #define XBARB_SEL0_SEL0 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL0_SHIFT)) & XBARB_SEL0_SEL0_MASK) |
SEL0 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL0_SEL1 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL0_SEL1_SHIFT)) & XBARB_SEL0_SEL1_MASK) |
SEL1 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL1_SEL2 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL2_SHIFT)) & XBARB_SEL1_SEL2_MASK) |
SEL2 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL1_SEL3 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL1_SEL3_SHIFT)) & XBARB_SEL1_SEL3_MASK) |
SEL3 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL2_SEL4 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL4_SHIFT)) & XBARB_SEL2_SEL4_MASK) |
SEL4 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL2_SEL5 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL2_SEL5_SHIFT)) & XBARB_SEL2_SEL5_MASK) |
SEL5 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL3_SEL6 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL6_SHIFT)) & XBARB_SEL3_SEL6_MASK) |
SEL6 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL3_SEL7 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL3_SEL7_SHIFT)) & XBARB_SEL3_SEL7_MASK) |
SEL7 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL4_SEL8 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL8_SHIFT)) & XBARB_SEL4_SEL8_MASK) |
SEL8 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL4_SEL9 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL4_SEL9_SHIFT)) & XBARB_SEL4_SEL9_MASK) |
SEL9 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL5_SEL10 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL10_SHIFT)) & XBARB_SEL5_SEL10_MASK) |
SEL10 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL5_SEL11 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL5_SEL11_SHIFT)) & XBARB_SEL5_SEL11_MASK) |
SEL11 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL6_SEL12 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL12_SHIFT)) & XBARB_SEL6_SEL12_MASK) |
SEL12 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL6_SEL13 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL6_SEL13_SHIFT)) & XBARB_SEL6_SEL13_MASK) |
SEL13 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL7_SEL14 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL14_SHIFT)) & XBARB_SEL7_SEL14_MASK) |
SEL14 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete
| #define XBARB_SEL7_SEL15 | ( | x | ) | (((uint16_t)(((uint16_t)(x)) << XBARB_SEL7_SEL15_SHIFT)) & XBARB_SEL7_SEL15_MASK) |
SEL15 0b000000..CMP0 Output 0b000001..CMP1 Output 0b000010..CMP2 Output 0b000011..CMP3 Output 0b000100..FTM0 all channels match trigger ORed together 0b000101..FTM0 counter init trigger 0b000110..FTM3 all channels match trigger ORed together 0b000111..FTM3 counter init trigger 0b001000..PWMA channel 0 trigger 0 0b001001..PWMA channel 1 trigger 0 0b001010..PWMA channel 2 trigger 0 0b001011..PWMA channel 3 trigger 0 0b001100..PDB0 channel 0 output trigger 0b001101..High Speed Analog-to-Digital Converter 0 conversion A complete 0b001110..XB_IN2 input pin 0b001111..XB_IN3 input pin 0b010000..FTM1 all channels match trigger ORed together 0b010001..FTM1 counter init trigger 0b010010..DMA channel 0 done 0b010011..DMA channel 1 done 0b010100..XB_IN10 input pin 0b010101..XB_IN11 input pin 0b010110..DMA channel 6 done 0b010111..DMA channel 7 done 0b011000..PIT trigger 0 0b011001..PIT trigger 1 0b011010..PDB1 channel 0 output trigger 0b011011..High Speed Analog-to-Digital Converter 0 conversion B complete 0b011100..PWMB channel 0 trigger 0 or trigger 1 0b011101..PWMB channel 1 trigger 0 or trigger 1 0b011110..PWMB channel 2 trigger 0 or trigger 1 0b011111..PWMB channel 3 trigger 0 or trigger 1 0b100000..FTM2 all channels match trigger ORed together 0b100001..FTM2 counter init trigger 0b100010..PDB0 channel 1 output trigger 0b100011..PDB1 channel 1 output trigger 0b100100..High Speed Analog-to-Digital Converter 1 conversion A complete 0b100101..High Speed Analog-to-Digital Converter 1 conversion B complete 0b100110..Analog-to-Digital Converter 0 conversion complete