mikroSDK Reference Manual
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RCC registers bit address in the alias region. More...
Macros | |
#define | RCC_CR_OFFSET_BB (RCC_OFFSET + RCC_CR_OFFSET) |
#define | RCC_CFGR_OFFSET_BB (RCC_OFFSET + RCC_CFGR_OFFSET) |
#define | RCC_CIR_OFFSET_BB (RCC_OFFSET + RCC_CIR_OFFSET) |
#define | RCC_BDCR_OFFSET_BB (RCC_OFFSET + RCC_BDCR_OFFSET) |
#define | RCC_CSR_OFFSET_BB (RCC_OFFSET + RCC_CSR_OFFSET) |
#define | RCC_HSION_BIT_NUMBER RCC_CR_HSION_Pos |
#define | RCC_CR_HSION_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_HSION_BIT_NUMBER * 4U))) |
#define | RCC_HSEON_BIT_NUMBER RCC_CR_HSEON_Pos |
#define | RCC_CR_HSEON_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_HSEON_BIT_NUMBER * 4U))) |
#define | RCC_CSSON_BIT_NUMBER RCC_CR_CSSON_Pos |
#define | RCC_CR_CSSON_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_CSSON_BIT_NUMBER * 4U))) |
#define | RCC_PLLON_BIT_NUMBER RCC_CR_PLLON_Pos |
#define | RCC_CR_PLLON_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_CR_OFFSET_BB * 32U) + (RCC_PLLON_BIT_NUMBER * 4U))) |
#define | RCC_LSION_BIT_NUMBER RCC_CSR_LSION_Pos |
#define | RCC_CSR_LSION_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_LSION_BIT_NUMBER * 4U))) |
#define | RCC_RMVF_BIT_NUMBER RCC_CSR_RMVF_Pos |
#define | RCC_CSR_RMVF_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_CSR_OFFSET_BB * 32U) + (RCC_RMVF_BIT_NUMBER * 4U))) |
#define | RCC_LSEON_BIT_NUMBER RCC_BDCR_LSEON_Pos |
#define | RCC_BDCR_LSEON_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_BDCR_OFFSET_BB * 32U) + (RCC_LSEON_BIT_NUMBER * 4U))) |
#define | RCC_LSEBYP_BIT_NUMBER RCC_BDCR_LSEBYP_Pos |
#define | RCC_BDCR_LSEBYP_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_BDCR_OFFSET_BB * 32U) + (RCC_LSEBYP_BIT_NUMBER * 4U))) |
#define | RCC_RTCEN_BIT_NUMBER RCC_BDCR_RTCEN_Pos |
#define | RCC_BDCR_RTCEN_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_BDCR_OFFSET_BB * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U))) |
#define | RCC_BDRST_BIT_NUMBER RCC_BDCR_BDRST_Pos |
#define | RCC_BDCR_BDRST_BB ((uint32_t)(PERIPH_BB_BASE + (RCC_BDCR_OFFSET_BB * 32U) + (RCC_BDRST_BIT_NUMBER * 4U))) |
#define | RCC_OFFSET (RCC_BASE - PERIPH_BASE) |
#define | RCC_CR_OFFSET (RCC_OFFSET + 0x00U) |
#define | RCC_HSION_BIT_NUMBER 0x00U |
#define | RCC_CR_HSION_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U)) |
#define | RCC_CSSON_BIT_NUMBER 0x13U |
#define | RCC_CR_CSSON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U)) |
#define | RCC_PLLON_BIT_NUMBER 0x18U |
#define | RCC_CR_PLLON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U)) |
#define | RCC_PLLI2SON_BIT_NUMBER 0x1AU |
#define | RCC_CR_PLLI2SON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLI2SON_BIT_NUMBER * 4U)) |
#define | RCC_CFGR_OFFSET (RCC_OFFSET + 0x08U) |
#define | RCC_I2SSRC_BIT_NUMBER 0x17U |
#define | RCC_CFGR_I2SSRC_BB (PERIPH_BB_BASE + (RCC_CFGR_OFFSET * 32U) + (RCC_I2SSRC_BIT_NUMBER * 4U)) |
#define | RCC_BDCR_OFFSET (RCC_OFFSET + 0x70U) |
#define | RCC_RTCEN_BIT_NUMBER 0x0FU |
#define | RCC_BDCR_RTCEN_BB (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U)) |
#define | RCC_BDRST_BIT_NUMBER 0x10U |
#define | RCC_BDCR_BDRST_BB (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U)) |
#define | RCC_CSR_OFFSET (RCC_OFFSET + 0x74U) |
#define | RCC_LSION_BIT_NUMBER 0x00U |
#define | RCC_CSR_LSION_BB (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U)) |
#define | RCC_CR_BYTE2_ADDRESS 0x40023802U |
#define | RCC_CIR_BYTE1_ADDRESS ((uint32_t)(RCC_BASE + 0x0CU + 0x01U)) |
#define | RCC_CIR_BYTE2_ADDRESS ((uint32_t)(RCC_BASE + 0x0CU + 0x02U)) |
#define | RCC_BDCR_BYTE0_ADDRESS (PERIPH_BASE + RCC_BDCR_OFFSET) |
#define | RCC_DBP_TIMEOUT_VALUE 2U |
#define | RCC_LSE_TIMEOUT_VALUE LSE_STARTUP_TIMEOUT |
#define | HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT |
#define | HSI_TIMEOUT_VALUE 2U /* 2 ms */ |
#define | LSI_TIMEOUT_VALUE 2U /* 2 ms */ |
#define | PLLI2S_TIMEOUT_VALUE 2U /* Timeout value fixed to 100 ms */ |
#define | RCC_OFFSET (RCC_BASE - PERIPH_BASE) |
#define | RCC_CR_OFFSET (RCC_OFFSET + 0x00U) |
#define | RCC_HSION_BIT_NUMBER 0x00U |
#define | RCC_CR_HSION_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_HSION_BIT_NUMBER * 4U)) |
#define | RCC_CSSON_BIT_NUMBER 0x13U |
#define | RCC_CR_CSSON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_CSSON_BIT_NUMBER * 4U)) |
#define | RCC_PLLON_BIT_NUMBER 0x18U |
#define | RCC_CR_PLLON_BB (PERIPH_BB_BASE + (RCC_CR_OFFSET * 32U) + (RCC_PLLON_BIT_NUMBER * 4U)) |
#define | RCC_BDCR_OFFSET (RCC_OFFSET + 0x70U) |
#define | RCC_RTCEN_BIT_NUMBER 0x0FU |
#define | RCC_BDCR_RTCEN_BB (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_RTCEN_BIT_NUMBER * 4U)) |
#define | RCC_BDRST_BIT_NUMBER 0x10U |
#define | RCC_BDCR_BDRST_BB (PERIPH_BB_BASE + (RCC_BDCR_OFFSET * 32U) + (RCC_BDRST_BIT_NUMBER * 4U)) |
#define | RCC_CSR_OFFSET (RCC_OFFSET + 0x74U) |
#define | RCC_LSION_BIT_NUMBER 0x00U |
#define | RCC_CSR_LSION_BB (PERIPH_BB_BASE + (RCC_CSR_OFFSET * 32U) + (RCC_LSION_BIT_NUMBER * 4U)) |
#define | RCC_CR_BYTE2_ADDRESS 0x40023802U |
#define | RCC_CIR_BYTE1_ADDRESS ((uint32_t)(RCC_BASE + 0x0CU + 0x01U)) |
#define | RCC_CIR_BYTE2_ADDRESS ((uint32_t)(RCC_BASE + 0x0CU + 0x02U)) |
#define | RCC_BDCR_BYTE0_ADDRESS (PERIPH_BASE + RCC_BDCR_OFFSET) |
#define | RCC_DBP_TIMEOUT_VALUE 2U |
#define | RCC_LSE_TIMEOUT_VALUE LSE_STARTUP_TIMEOUT |
#define | HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT |
#define | HSI_TIMEOUT_VALUE 2U /* 2 ms */ |
#define | LSI_TIMEOUT_VALUE 2U /* 2 ms */ |
#define | CLOCKSWITCH_TIMEOUT_VALUE 5000U /* 5 s */ |