DAC Register Masks

Macros
#define	DAC0_BASE   (0x400CC000u)
#define	DAC0   ((DAC_Type *)DAC0_BASE)
#define	DAC1_BASE   (0x400CD000u)
#define	DAC1   ((DAC_Type *)DAC1_BASE)
#define	DAC_BASE_ADDRS   { DAC0_BASE, DAC1_BASE }
#define	DAC_BASE_PTRS   { DAC0, DAC1 }
#define	DAC_IRQS   { DAC0_IRQn, DAC1_IRQn }
#define	DAC_DATL_DATA_MASK   0xFFu
#define	DAC_DATL_DATA_SHIFT   0
#define	DAC_DATL_DATA(x)   (((uint8_t)(((uint8_t)(x))<<DAC_DATL_DATA_SHIFT))&DAC_DATL_DATA_MASK)
#define	DAC_DATH_DATA_MASK   0xFu
#define	DAC_DATH_DATA_SHIFT   0
#define	DAC_DATH_DATA(x)   (((uint8_t)(((uint8_t)(x))<<DAC_DATH_DATA_SHIFT))&DAC_DATH_DATA_MASK)
#define	DAC_DATL_COUNT   (16U)
#define	DAC_DATH_COUNT   (16U)
#define	DAC_DATL_COUNT   (16U)
#define	DAC_DATH_COUNT   (16U)
#define	DAC_DATL_COUNT   (16U)
#define	DAC_DATH_COUNT   (16U)
#define	DAC_DATL_COUNT   (16U)
#define	DAC_DATH_COUNT   (16U)

DATL - DAC Data Low Register
#define	DAC_DATL_DATA0_MASK   (0xFFU)
#define	DAC_DATL_DATA0_SHIFT   (0U)
#define	DAC_DATL_DATA0(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATL_DATA0_SHIFT)) & DAC_DATL_DATA0_MASK)
#define	DAC_DATL_DATA0_MASK   (0xFFU)
#define	DAC_DATL_DATA0_SHIFT   (0U)
#define	DAC_DATL_DATA0(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATL_DATA0_SHIFT)) & DAC_DATL_DATA0_MASK)
#define	DAC_DATL_DATA0_MASK   (0xFFU)
#define	DAC_DATL_DATA0_SHIFT   (0U)
#define	DAC_DATL_DATA0(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATL_DATA0_SHIFT)) & DAC_DATL_DATA0_MASK)
#define	DAC_DATL_DATA0_MASK   (0xFFU)
#define	DAC_DATL_DATA0_SHIFT   (0U)
#define	DAC_DATL_DATA0(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATL_DATA0_SHIFT)) & DAC_DATL_DATA0_MASK)
#define	DAC_DATL_DATA0_MASK   (0xFFU)
#define	DAC_DATL_DATA0_SHIFT   (0U)
#define	DAC_DATL_DATA0(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATL_DATA0_SHIFT)) & DAC_DATL_DATA0_MASK)

DATL - DAC Data Low Register
#define	DAC_DATL_COUNT   (16U)

DATH - DAC Data High Register
#define	DAC_DATH_DATA1_MASK   (0xFU)
#define	DAC_DATH_DATA1_SHIFT   (0U)
#define	DAC_DATH_DATA1(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATH_DATA1_SHIFT)) & DAC_DATH_DATA1_MASK)
#define	DAC_DATH_DATA1_MASK   (0xFU)
#define	DAC_DATH_DATA1_SHIFT   (0U)
#define	DAC_DATH_DATA1(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATH_DATA1_SHIFT)) & DAC_DATH_DATA1_MASK)
#define	DAC_DATH_DATA1_MASK   (0xFU)
#define	DAC_DATH_DATA1_SHIFT   (0U)
#define	DAC_DATH_DATA1(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATH_DATA1_SHIFT)) & DAC_DATH_DATA1_MASK)
#define	DAC_DATH_DATA1_MASK   (0xFU)
#define	DAC_DATH_DATA1_SHIFT   (0U)
#define	DAC_DATH_DATA1(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATH_DATA1_SHIFT)) & DAC_DATH_DATA1_MASK)
#define	DAC_DATH_DATA1_MASK   (0xFU)
#define	DAC_DATH_DATA1_SHIFT   (0U)
#define	DAC_DATH_DATA1(x)   (((uint8_t)(((uint8_t)(x)) << DAC_DATH_DATA1_SHIFT)) & DAC_DATH_DATA1_MASK)

DATH - DAC Data High Register
#define	DAC_DATH_COUNT   (16U)

SR - DAC Status Register
#define	DAC_SR_DACBFRPBF_MASK   (0x1U)
#define	DAC_SR_DACBFRPBF_SHIFT   (0U)
#define	DAC_SR_DACBFRPBF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)
#define	DAC_SR_DACBFRPTF_MASK   (0x2U)
#define	DAC_SR_DACBFRPTF_SHIFT   (1U)
#define	DAC_SR_DACBFRPTF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)
#define	DAC_SR_DACBFWMF_MASK   (0x4U)
#define	DAC_SR_DACBFWMF_SHIFT   (2U)
#define	DAC_SR_DACBFWMF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)
#define	DAC_SR_DACBFRPBF_MASK   0x1u
#define	DAC_SR_DACBFRPBF_SHIFT   0
#define	DAC_SR_DACBFRPTF_MASK   0x2u
#define	DAC_SR_DACBFRPTF_SHIFT   1
#define	DAC_SR_DACBFWMF_MASK   0x4u
#define	DAC_SR_DACBFWMF_SHIFT   2
#define	DAC_SR_DACBFRPBF_MASK   (0x1U)
#define	DAC_SR_DACBFRPBF_SHIFT   (0U)
#define	DAC_SR_DACBFRPBF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)
#define	DAC_SR_DACBFRPTF_MASK   (0x2U)
#define	DAC_SR_DACBFRPTF_SHIFT   (1U)
#define	DAC_SR_DACBFRPTF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)
#define	DAC_SR_DACBFWMF_MASK   (0x4U)
#define	DAC_SR_DACBFWMF_SHIFT   (2U)
#define	DAC_SR_DACBFWMF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)
#define	DAC_SR_DACBFRPBF_MASK   (0x1U)
#define	DAC_SR_DACBFRPBF_SHIFT   (0U)
#define	DAC_SR_DACBFRPBF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)
#define	DAC_SR_DACBFRPTF_MASK   (0x2U)
#define	DAC_SR_DACBFRPTF_SHIFT   (1U)
#define	DAC_SR_DACBFRPTF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)
#define	DAC_SR_DACBFWMF_MASK   (0x4U)
#define	DAC_SR_DACBFWMF_SHIFT   (2U)
#define	DAC_SR_DACBFWMF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)
#define	DAC_SR_DACBFRPBF_MASK   (0x1U)
#define	DAC_SR_DACBFRPBF_SHIFT   (0U)
#define	DAC_SR_DACBFRPBF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)
#define	DAC_SR_DACBFRPTF_MASK   (0x2U)
#define	DAC_SR_DACBFRPTF_SHIFT   (1U)
#define	DAC_SR_DACBFRPTF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)
#define	DAC_SR_DACBFWMF_MASK   (0x4U)
#define	DAC_SR_DACBFWMF_SHIFT   (2U)
#define	DAC_SR_DACBFWMF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)
#define	DAC_SR_DACBFRPBF_MASK   (0x1U)
#define	DAC_SR_DACBFRPBF_SHIFT   (0U)
#define	DAC_SR_DACBFRPBF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)
#define	DAC_SR_DACBFRPTF_MASK   (0x2U)
#define	DAC_SR_DACBFRPTF_SHIFT   (1U)
#define	DAC_SR_DACBFRPTF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)
#define	DAC_SR_DACBFWMF_MASK   (0x4U)
#define	DAC_SR_DACBFWMF_SHIFT   (2U)
#define	DAC_SR_DACBFWMF(x)   (((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)

C0 - DAC Control Register
#define	DAC_C0_DACBBIEN_MASK   (0x1U)
#define	DAC_C0_DACBBIEN_SHIFT   (0U)
#define	DAC_C0_DACBBIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)
#define	DAC_C0_DACBTIEN_MASK   (0x2U)
#define	DAC_C0_DACBTIEN_SHIFT   (1U)
#define	DAC_C0_DACBTIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)
#define	DAC_C0_DACBWIEN_MASK   (0x4U)
#define	DAC_C0_DACBWIEN_SHIFT   (2U)
#define	DAC_C0_DACBWIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)
#define	DAC_C0_LPEN_MASK   (0x8U)
#define	DAC_C0_LPEN_SHIFT   (3U)
#define	DAC_C0_LPEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)
#define	DAC_C0_DACSWTRG_MASK   (0x10U)
#define	DAC_C0_DACSWTRG_SHIFT   (4U)
#define	DAC_C0_DACSWTRG(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)
#define	DAC_C0_DACTRGSEL_MASK   (0x20U)
#define	DAC_C0_DACTRGSEL_SHIFT   (5U)
#define	DAC_C0_DACTRGSEL(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)
#define	DAC_C0_DACRFS_MASK   (0x40U)
#define	DAC_C0_DACRFS_SHIFT   (6U)
#define	DAC_C0_DACRFS(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)
#define	DAC_C0_DACEN_MASK   (0x80U)
#define	DAC_C0_DACEN_SHIFT   (7U)
#define	DAC_C0_DACEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)
#define	DAC_C0_DACBBIEN_MASK   0x1u
#define	DAC_C0_DACBBIEN_SHIFT   0
#define	DAC_C0_DACBTIEN_MASK   0x2u
#define	DAC_C0_DACBTIEN_SHIFT   1
#define	DAC_C0_DACBWIEN_MASK   0x4u
#define	DAC_C0_DACBWIEN_SHIFT   2
#define	DAC_C0_LPEN_MASK   0x8u
#define	DAC_C0_LPEN_SHIFT   3
#define	DAC_C0_DACSWTRG_MASK   0x10u
#define	DAC_C0_DACSWTRG_SHIFT   4
#define	DAC_C0_DACTRGSEL_MASK   0x20u
#define	DAC_C0_DACTRGSEL_SHIFT   5
#define	DAC_C0_DACRFS_MASK   0x40u
#define	DAC_C0_DACRFS_SHIFT   6
#define	DAC_C0_DACEN_MASK   0x80u
#define	DAC_C0_DACEN_SHIFT   7
#define	DAC_C0_DACBBIEN_MASK   (0x1U)
#define	DAC_C0_DACBBIEN_SHIFT   (0U)
#define	DAC_C0_DACBBIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)
#define	DAC_C0_DACBTIEN_MASK   (0x2U)
#define	DAC_C0_DACBTIEN_SHIFT   (1U)
#define	DAC_C0_DACBTIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)
#define	DAC_C0_DACBWIEN_MASK   (0x4U)
#define	DAC_C0_DACBWIEN_SHIFT   (2U)
#define	DAC_C0_DACBWIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)
#define	DAC_C0_LPEN_MASK   (0x8U)
#define	DAC_C0_LPEN_SHIFT   (3U)
#define	DAC_C0_LPEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)
#define	DAC_C0_DACSWTRG_MASK   (0x10U)
#define	DAC_C0_DACSWTRG_SHIFT   (4U)
#define	DAC_C0_DACSWTRG(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)
#define	DAC_C0_DACTRGSEL_MASK   (0x20U)
#define	DAC_C0_DACTRGSEL_SHIFT   (5U)
#define	DAC_C0_DACTRGSEL(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)
#define	DAC_C0_DACRFS_MASK   (0x40U)
#define	DAC_C0_DACRFS_SHIFT   (6U)
#define	DAC_C0_DACRFS(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)
#define	DAC_C0_DACEN_MASK   (0x80U)
#define	DAC_C0_DACEN_SHIFT   (7U)
#define	DAC_C0_DACEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)
#define	DAC_C0_DACBBIEN_MASK   (0x1U)
#define	DAC_C0_DACBBIEN_SHIFT   (0U)
#define	DAC_C0_DACBBIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)
#define	DAC_C0_DACBTIEN_MASK   (0x2U)
#define	DAC_C0_DACBTIEN_SHIFT   (1U)
#define	DAC_C0_DACBTIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)
#define	DAC_C0_DACBWIEN_MASK   (0x4U)
#define	DAC_C0_DACBWIEN_SHIFT   (2U)
#define	DAC_C0_DACBWIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)
#define	DAC_C0_LPEN_MASK   (0x8U)
#define	DAC_C0_LPEN_SHIFT   (3U)
#define	DAC_C0_LPEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)
#define	DAC_C0_DACSWTRG_MASK   (0x10U)
#define	DAC_C0_DACSWTRG_SHIFT   (4U)
#define	DAC_C0_DACSWTRG(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)
#define	DAC_C0_DACTRGSEL_MASK   (0x20U)
#define	DAC_C0_DACTRGSEL_SHIFT   (5U)
#define	DAC_C0_DACTRGSEL(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)
#define	DAC_C0_DACRFS_MASK   (0x40U)
#define	DAC_C0_DACRFS_SHIFT   (6U)
#define	DAC_C0_DACRFS(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)
#define	DAC_C0_DACEN_MASK   (0x80U)
#define	DAC_C0_DACEN_SHIFT   (7U)
#define	DAC_C0_DACEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)
#define	DAC_C0_DACBBIEN_MASK   (0x1U)
#define	DAC_C0_DACBBIEN_SHIFT   (0U)
#define	DAC_C0_DACBBIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)
#define	DAC_C0_DACBTIEN_MASK   (0x2U)
#define	DAC_C0_DACBTIEN_SHIFT   (1U)
#define	DAC_C0_DACBTIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)
#define	DAC_C0_DACBWIEN_MASK   (0x4U)
#define	DAC_C0_DACBWIEN_SHIFT   (2U)
#define	DAC_C0_DACBWIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)
#define	DAC_C0_LPEN_MASK   (0x8U)
#define	DAC_C0_LPEN_SHIFT   (3U)
#define	DAC_C0_LPEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)
#define	DAC_C0_DACSWTRG_MASK   (0x10U)
#define	DAC_C0_DACSWTRG_SHIFT   (4U)
#define	DAC_C0_DACSWTRG(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)
#define	DAC_C0_DACTRGSEL_MASK   (0x20U)
#define	DAC_C0_DACTRGSEL_SHIFT   (5U)
#define	DAC_C0_DACTRGSEL(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)
#define	DAC_C0_DACRFS_MASK   (0x40U)
#define	DAC_C0_DACRFS_SHIFT   (6U)
#define	DAC_C0_DACRFS(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)
#define	DAC_C0_DACEN_MASK   (0x80U)
#define	DAC_C0_DACEN_SHIFT   (7U)
#define	DAC_C0_DACEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)
#define	DAC_C0_DACBBIEN_MASK   (0x1U)
#define	DAC_C0_DACBBIEN_SHIFT   (0U)
#define	DAC_C0_DACBBIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)
#define	DAC_C0_DACBTIEN_MASK   (0x2U)
#define	DAC_C0_DACBTIEN_SHIFT   (1U)
#define	DAC_C0_DACBTIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)
#define	DAC_C0_DACBWIEN_MASK   (0x4U)
#define	DAC_C0_DACBWIEN_SHIFT   (2U)
#define	DAC_C0_DACBWIEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)
#define	DAC_C0_LPEN_MASK   (0x8U)
#define	DAC_C0_LPEN_SHIFT   (3U)
#define	DAC_C0_LPEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)
#define	DAC_C0_DACSWTRG_MASK   (0x10U)
#define	DAC_C0_DACSWTRG_SHIFT   (4U)
#define	DAC_C0_DACSWTRG(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)
#define	DAC_C0_DACTRGSEL_MASK   (0x20U)
#define	DAC_C0_DACTRGSEL_SHIFT   (5U)
#define	DAC_C0_DACTRGSEL(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)
#define	DAC_C0_DACRFS_MASK   (0x40U)
#define	DAC_C0_DACRFS_SHIFT   (6U)
#define	DAC_C0_DACRFS(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)
#define	DAC_C0_DACEN_MASK   (0x80U)
#define	DAC_C0_DACEN_SHIFT   (7U)
#define	DAC_C0_DACEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)

C1 - DAC Control Register 1
#define	DAC_C1_DACBFEN_MASK   (0x1U)
#define	DAC_C1_DACBFEN_SHIFT   (0U)
#define	DAC_C1_DACBFEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)
#define	DAC_C1_DACBFMD_MASK   (0x6U)
#define	DAC_C1_DACBFMD_SHIFT   (1U)
#define	DAC_C1_DACBFMD(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)
#define	DAC_C1_DACBFWM_MASK   (0x18U)
#define	DAC_C1_DACBFWM_SHIFT   (3U)
#define	DAC_C1_DACBFWM(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)
#define	DAC_C1_DMAEN_MASK   (0x80U)
#define	DAC_C1_DMAEN_SHIFT   (7U)
#define	DAC_C1_DMAEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)
#define	DAC_C1_DACBFEN_MASK   0x1u
#define	DAC_C1_DACBFEN_SHIFT   0
#define	DAC_C1_DACBFMD_MASK   0x6u
#define	DAC_C1_DACBFMD_SHIFT   1
#define	DAC_C1_DACBFMD(x)   (((uint8_t)(((uint8_t)(x))<<DAC_C1_DACBFMD_SHIFT))&DAC_C1_DACBFMD_MASK)
#define	DAC_C1_DACBFWM_MASK   0x18u
#define	DAC_C1_DACBFWM_SHIFT   3
#define	DAC_C1_DACBFWM(x)   (((uint8_t)(((uint8_t)(x))<<DAC_C1_DACBFWM_SHIFT))&DAC_C1_DACBFWM_MASK)
#define	DAC_C1_DMAEN_MASK   0x80u
#define	DAC_C1_DMAEN_SHIFT   7
#define	DAC_C1_DACBFEN_MASK   (0x1U)
#define	DAC_C1_DACBFEN_SHIFT   (0U)
#define	DAC_C1_DACBFEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)
#define	DAC_C1_DACBFMD_MASK   (0x6U)
#define	DAC_C1_DACBFMD_SHIFT   (1U)
#define	DAC_C1_DACBFMD(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)
#define	DAC_C1_DACBFWM_MASK   (0x18U)
#define	DAC_C1_DACBFWM_SHIFT   (3U)
#define	DAC_C1_DACBFWM(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)
#define	DAC_C1_DMAEN_MASK   (0x80U)
#define	DAC_C1_DMAEN_SHIFT   (7U)
#define	DAC_C1_DMAEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)
#define	DAC_C1_DACBFEN_MASK   (0x1U)
#define	DAC_C1_DACBFEN_SHIFT   (0U)
#define	DAC_C1_DACBFEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)
#define	DAC_C1_DACBFMD_MASK   (0x6U)
#define	DAC_C1_DACBFMD_SHIFT   (1U)
#define	DAC_C1_DACBFMD(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)
#define	DAC_C1_DACBFWM_MASK   (0x18U)
#define	DAC_C1_DACBFWM_SHIFT   (3U)
#define	DAC_C1_DACBFWM(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)
#define	DAC_C1_DMAEN_MASK   (0x80U)
#define	DAC_C1_DMAEN_SHIFT   (7U)
#define	DAC_C1_DMAEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)
#define	DAC_C1_DACBFEN_MASK   (0x1U)
#define	DAC_C1_DACBFEN_SHIFT   (0U)
#define	DAC_C1_DACBFEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)
#define	DAC_C1_DACBFMD_MASK   (0x6U)
#define	DAC_C1_DACBFMD_SHIFT   (1U)
#define	DAC_C1_DACBFMD(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)
#define	DAC_C1_DACBFWM_MASK   (0x18U)
#define	DAC_C1_DACBFWM_SHIFT   (3U)
#define	DAC_C1_DACBFWM(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)
#define	DAC_C1_DMAEN_MASK   (0x80U)
#define	DAC_C1_DMAEN_SHIFT   (7U)
#define	DAC_C1_DMAEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)
#define	DAC_C1_DACBFEN_MASK   (0x1U)
#define	DAC_C1_DACBFEN_SHIFT   (0U)
#define	DAC_C1_DACBFEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)
#define	DAC_C1_DACBFMD_MASK   (0x6U)
#define	DAC_C1_DACBFMD_SHIFT   (1U)
#define	DAC_C1_DACBFMD(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)
#define	DAC_C1_DACBFWM_MASK   (0x18U)
#define	DAC_C1_DACBFWM_SHIFT   (3U)
#define	DAC_C1_DACBFWM(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)
#define	DAC_C1_DMAEN_MASK   (0x80U)
#define	DAC_C1_DMAEN_SHIFT   (7U)
#define	DAC_C1_DMAEN(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)

C2 - DAC Control Register 2
#define	DAC_C2_DACBFUP_MASK   (0xFU)
#define	DAC_C2_DACBFUP_SHIFT   (0U)
#define	DAC_C2_DACBFUP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFUP_SHIFT)) & DAC_C2_DACBFUP_MASK)
#define	DAC_C2_DACBFRP_MASK   (0xF0U)
#define	DAC_C2_DACBFRP_SHIFT   (4U)
#define	DAC_C2_DACBFRP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFRP_SHIFT)) & DAC_C2_DACBFRP_MASK)
#define	DAC_C2_DACBFUP_MASK   0xFu
#define	DAC_C2_DACBFUP_SHIFT   0
#define	DAC_C2_DACBFUP(x)   (((uint8_t)(((uint8_t)(x))<<DAC_C2_DACBFUP_SHIFT))&DAC_C2_DACBFUP_MASK)
#define	DAC_C2_DACBFRP_MASK   0xF0u
#define	DAC_C2_DACBFRP_SHIFT   4
#define	DAC_C2_DACBFRP(x)   (((uint8_t)(((uint8_t)(x))<<DAC_C2_DACBFRP_SHIFT))&DAC_C2_DACBFRP_MASK)
#define	DAC_C2_DACBFUP_MASK   (0xFU)
#define	DAC_C2_DACBFUP_SHIFT   (0U)
#define	DAC_C2_DACBFUP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFUP_SHIFT)) & DAC_C2_DACBFUP_MASK)
#define	DAC_C2_DACBFRP_MASK   (0xF0U)
#define	DAC_C2_DACBFRP_SHIFT   (4U)
#define	DAC_C2_DACBFRP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFRP_SHIFT)) & DAC_C2_DACBFRP_MASK)
#define	DAC_C2_DACBFUP_MASK   (0xFU)
#define	DAC_C2_DACBFUP_SHIFT   (0U)
#define	DAC_C2_DACBFUP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFUP_SHIFT)) & DAC_C2_DACBFUP_MASK)
#define	DAC_C2_DACBFRP_MASK   (0xF0U)
#define	DAC_C2_DACBFRP_SHIFT   (4U)
#define	DAC_C2_DACBFRP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFRP_SHIFT)) & DAC_C2_DACBFRP_MASK)
#define	DAC_C2_DACBFUP_MASK   (0xFU)
#define	DAC_C2_DACBFUP_SHIFT   (0U)
#define	DAC_C2_DACBFUP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFUP_SHIFT)) & DAC_C2_DACBFUP_MASK)
#define	DAC_C2_DACBFRP_MASK   (0xF0U)
#define	DAC_C2_DACBFRP_SHIFT   (4U)
#define	DAC_C2_DACBFRP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFRP_SHIFT)) & DAC_C2_DACBFRP_MASK)
#define	DAC_C2_DACBFUP_MASK   (0xFU)
#define	DAC_C2_DACBFUP_SHIFT   (0U)
#define	DAC_C2_DACBFUP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFUP_SHIFT)) & DAC_C2_DACBFUP_MASK)
#define	DAC_C2_DACBFRP_MASK   (0xF0U)
#define	DAC_C2_DACBFRP_SHIFT   (4U)
#define	DAC_C2_DACBFRP(x)   (((uint8_t)(((uint8_t)(x)) << DAC_C2_DACBFRP_SHIFT)) & DAC_C2_DACBFRP_MASK)

Macro Definition Documentation

DAC0

#define DAC0   ((DAC_Type *)DAC0_BASE)

Peripheral DAC0 base pointer

DAC0_BASE

#define DAC0_BASE   (0x400CC000u)

Peripheral DAC0 base address

DAC1

#define DAC1   ((DAC_Type *)DAC1_BASE)

Peripheral DAC1 base pointer

DAC1_BASE

#define DAC1_BASE   (0x400CD000u)

Peripheral DAC1 base address

DAC_BASE_ADDRS

#define DAC_BASE_ADDRS   { DAC0_BASE, DAC1_BASE }

Array initializer of DAC peripheral base addresses

DAC_BASE_PTRS

#define DAC_BASE_PTRS   { DAC0, DAC1 }

Array initializer of DAC peripheral base pointers

DAC_C0_DACBBIEN [1/5]

#define DAC_C0_DACBBIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)

DACBBIEN - DAC Buffer Read Pointer Bottom Flag Interrupt Enable 0b0..The DAC buffer read pointer bottom flag interrupt is disabled. 0b1..The DAC buffer read pointer bottom flag interrupt is enabled.

DAC_C0_DACBBIEN [2/5]

#define DAC_C0_DACBBIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)

DACBBIEN - DAC Buffer Read Pointer Bottom Flag Interrupt Enable 0b0..The DAC buffer read pointer bottom flag interrupt is disabled. 0b1..The DAC buffer read pointer bottom flag interrupt is enabled.

DAC_C0_DACBBIEN [3/5]

#define DAC_C0_DACBBIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)

DACBBIEN - DAC Buffer Read Pointer Bottom Flag Interrupt Enable 0b0..The DAC buffer read pointer bottom flag interrupt is disabled. 0b1..The DAC buffer read pointer bottom flag interrupt is enabled.

DAC_C0_DACBBIEN [4/5]

#define DAC_C0_DACBBIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)

DACBBIEN - DAC Buffer Read Pointer Bottom Flag Interrupt Enable 0b0..The DAC buffer read pointer bottom flag interrupt is disabled. 0b1..The DAC buffer read pointer bottom flag interrupt is enabled.

DAC_C0_DACBBIEN [5/5]

#define DAC_C0_DACBBIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBBIEN_SHIFT)) & DAC_C0_DACBBIEN_MASK)

DACBBIEN - DAC Buffer Read Pointer Bottom Flag Interrupt Enable 0b0..The DAC buffer read pointer bottom flag interrupt is disabled. 0b1..The DAC buffer read pointer bottom flag interrupt is enabled.

DAC_C0_DACBTIEN [1/5]

#define DAC_C0_DACBTIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)

DACBTIEN - DAC Buffer Read Pointer Top Flag Interrupt Enable 0b0..The DAC buffer read pointer top flag interrupt is disabled. 0b1..The DAC buffer read pointer top flag interrupt is enabled.

DAC_C0_DACBTIEN [2/5]

#define DAC_C0_DACBTIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)

DACBTIEN - DAC Buffer Read Pointer Top Flag Interrupt Enable 0b0..The DAC buffer read pointer top flag interrupt is disabled. 0b1..The DAC buffer read pointer top flag interrupt is enabled.

DAC_C0_DACBTIEN [3/5]

#define DAC_C0_DACBTIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)

DACBTIEN - DAC Buffer Read Pointer Top Flag Interrupt Enable 0b0..The DAC buffer read pointer top flag interrupt is disabled. 0b1..The DAC buffer read pointer top flag interrupt is enabled.

DAC_C0_DACBTIEN [4/5]

#define DAC_C0_DACBTIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)

DACBTIEN - DAC Buffer Read Pointer Top Flag Interrupt Enable 0b0..The DAC buffer read pointer top flag interrupt is disabled. 0b1..The DAC buffer read pointer top flag interrupt is enabled.

DAC_C0_DACBTIEN [5/5]

#define DAC_C0_DACBTIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBTIEN_SHIFT)) & DAC_C0_DACBTIEN_MASK)

DACBTIEN - DAC Buffer Read Pointer Top Flag Interrupt Enable 0b0..The DAC buffer read pointer top flag interrupt is disabled. 0b1..The DAC buffer read pointer top flag interrupt is enabled.

DAC_C0_DACBWIEN [1/5]

#define DAC_C0_DACBWIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)

DACBWIEN - DAC Buffer Watermark Interrupt Enable 0b0..The DAC buffer watermark interrupt is disabled. 0b1..The DAC buffer watermark interrupt is enabled.

DAC_C0_DACBWIEN [2/5]

#define DAC_C0_DACBWIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)

DACBWIEN - DAC Buffer Watermark Interrupt Enable 0b0..The DAC buffer watermark interrupt is disabled. 0b1..The DAC buffer watermark interrupt is enabled.

DAC_C0_DACBWIEN [3/5]

#define DAC_C0_DACBWIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)

DACBWIEN - DAC Buffer Watermark Interrupt Enable 0b0..The DAC buffer watermark interrupt is disabled. 0b1..The DAC buffer watermark interrupt is enabled.

DAC_C0_DACBWIEN [4/5]

#define DAC_C0_DACBWIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)

DACBWIEN - DAC Buffer Watermark Interrupt Enable 0b0..The DAC buffer watermark interrupt is disabled. 0b1..The DAC buffer watermark interrupt is enabled.

DAC_C0_DACBWIEN [5/5]

#define DAC_C0_DACBWIEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACBWIEN_SHIFT)) & DAC_C0_DACBWIEN_MASK)

DACBWIEN - DAC Buffer Watermark Interrupt Enable 0b0..The DAC buffer watermark interrupt is disabled. 0b1..The DAC buffer watermark interrupt is enabled.

DAC_C0_DACEN [1/5]

#define DAC_C0_DACEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)

DACEN - DAC Enable 0b0..The DAC system is disabled. 0b1..The DAC system is enabled.

DAC_C0_DACEN [2/5]

#define DAC_C0_DACEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)

DACEN - DAC Enable 0b0..The DAC system is disabled. 0b1..The DAC system is enabled.

DAC_C0_DACEN [3/5]

#define DAC_C0_DACEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)

DACEN - DAC Enable 0b0..The DAC system is disabled. 0b1..The DAC system is enabled.

DAC_C0_DACEN [4/5]

#define DAC_C0_DACEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)

DACEN - DAC Enable 0b0..The DAC system is disabled. 0b1..The DAC system is enabled.

DAC_C0_DACEN [5/5]

#define DAC_C0_DACEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACEN_SHIFT)) & DAC_C0_DACEN_MASK)

DACEN - DAC Enable 0b0..The DAC system is disabled. 0b1..The DAC system is enabled.

DAC_C0_DACRFS [1/5]

#define DAC_C0_DACRFS

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)

DACRFS - DAC Reference Select 0b0..The DAC selects DACREF_1 as the reference voltage. 0b1..The DAC selects DACREF_2 as the reference voltage.

DAC_C0_DACRFS [2/5]

#define DAC_C0_DACRFS

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)

DACRFS - DAC Reference Select 0b0..The DAC selects DACREF_1 as the reference voltage. 0b1..The DAC selects DACREF_2 as the reference voltage.

DAC_C0_DACRFS [3/5]

#define DAC_C0_DACRFS

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)

DACRFS - DAC Reference Select 0b0..The DAC selects DACREF_1 as the reference voltage. 0b1..The DAC selects DACREF_2 as the reference voltage.

DAC_C0_DACRFS [4/5]

#define DAC_C0_DACRFS

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)

DACRFS - DAC Reference Select 0b0..The DAC selects DACREF_1 as the reference voltage. 0b1..The DAC selects DACREF_2 as the reference voltage.

DAC_C0_DACRFS [5/5]

#define DAC_C0_DACRFS

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACRFS_SHIFT)) & DAC_C0_DACRFS_MASK)

DACRFS - DAC Reference Select 0b0..The DAC selects DACREF_1 as the reference voltage. 0b1..The DAC selects DACREF_2 as the reference voltage.

DAC_C0_DACSWTRG [1/5]

#define DAC_C0_DACSWTRG

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)

DACSWTRG - DAC Software Trigger 0b0..The DAC soft trigger is not valid. 0b1..The DAC soft trigger is valid.

DAC_C0_DACSWTRG [2/5]

#define DAC_C0_DACSWTRG

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)

DACSWTRG - DAC Software Trigger 0b0..The DAC soft trigger is not valid. 0b1..The DAC soft trigger is valid.

DAC_C0_DACSWTRG [3/5]

#define DAC_C0_DACSWTRG

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)

DACSWTRG - DAC Software Trigger 0b0..The DAC soft trigger is not valid. 0b1..The DAC soft trigger is valid.

DAC_C0_DACSWTRG [4/5]

#define DAC_C0_DACSWTRG

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)

DACSWTRG - DAC Software Trigger 0b0..The DAC soft trigger is not valid. 0b1..The DAC soft trigger is valid.

DAC_C0_DACSWTRG [5/5]

#define DAC_C0_DACSWTRG

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACSWTRG_SHIFT)) & DAC_C0_DACSWTRG_MASK)

DACSWTRG - DAC Software Trigger 0b0..The DAC soft trigger is not valid. 0b1..The DAC soft trigger is valid.

DAC_C0_DACTRGSEL [1/5]

#define DAC_C0_DACTRGSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)

DACTRGSEL - DAC Trigger Select 0b0..The DAC hardware trigger is selected. 0b1..The DAC software trigger is selected.

DAC_C0_DACTRGSEL [2/5]

#define DAC_C0_DACTRGSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)

DACTRGSEL - DAC Trigger Select 0b0..The DAC hardware trigger is selected. 0b1..The DAC software trigger is selected.

DAC_C0_DACTRGSEL [3/5]

#define DAC_C0_DACTRGSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)

DACTRGSEL - DAC Trigger Select 0b0..The DAC hardware trigger is selected. 0b1..The DAC software trigger is selected.

DAC_C0_DACTRGSEL [4/5]

#define DAC_C0_DACTRGSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)

DACTRGSEL - DAC Trigger Select 0b0..The DAC hardware trigger is selected. 0b1..The DAC software trigger is selected.

DAC_C0_DACTRGSEL [5/5]

#define DAC_C0_DACTRGSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_DACTRGSEL_SHIFT)) & DAC_C0_DACTRGSEL_MASK)

DACTRGSEL - DAC Trigger Select 0b0..The DAC hardware trigger is selected. 0b1..The DAC software trigger is selected.

DAC_C0_LPEN [1/5]

#define DAC_C0_LPEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)

LPEN - DAC Low Power Control 0b0..High-Power mode 0b1..Low-Power mode

DAC_C0_LPEN [2/5]

#define DAC_C0_LPEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)

LPEN - DAC Low Power Control 0b0..High-Power mode 0b1..Low-Power mode

DAC_C0_LPEN [3/5]

#define DAC_C0_LPEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)

LPEN - DAC Low Power Control 0b0..High-Power mode 0b1..Low-Power mode

DAC_C0_LPEN [4/5]

#define DAC_C0_LPEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)

LPEN - DAC Low Power Control 0b0..High-Power mode 0b1..Low-Power mode

DAC_C0_LPEN [5/5]

#define DAC_C0_LPEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C0_LPEN_SHIFT)) & DAC_C0_LPEN_MASK)

LPEN - DAC Low Power Control 0b0..High-Power mode 0b1..Low-Power mode

DAC_C1_DACBFEN [1/5]

#define DAC_C1_DACBFEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)

DACBFEN - DAC Buffer Enable 0b0..Buffer read pointer is disabled. The converted data is always the first word of the buffer. 0b1..Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.

DAC_C1_DACBFEN [2/5]

#define DAC_C1_DACBFEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)

DACBFEN - DAC Buffer Enable 0b0..Buffer read pointer is disabled. The converted data is always the first word of the buffer. 0b1..Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.

DAC_C1_DACBFEN [3/5]

#define DAC_C1_DACBFEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)

DACBFEN - DAC Buffer Enable 0b0..Buffer read pointer is disabled. The converted data is always the first word of the buffer. 0b1..Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.

DAC_C1_DACBFEN [4/5]

#define DAC_C1_DACBFEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)

DACBFEN - DAC Buffer Enable 0b0..Buffer read pointer is disabled. The converted data is always the first word of the buffer. 0b1..Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.

DAC_C1_DACBFEN [5/5]

#define DAC_C1_DACBFEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFEN_SHIFT)) & DAC_C1_DACBFEN_MASK)

DACBFEN - DAC Buffer Enable 0b0..Buffer read pointer is disabled. The converted data is always the first word of the buffer. 0b1..Buffer read pointer is enabled. The converted data is the word that the read pointer points to. It means converted data can be from any word of the buffer.

DAC_C1_DACBFMD [1/6]

#define DAC_C1_DACBFMD

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..Reserved

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..FIFO mode

DAC_C1_DACBFMD [2/6]

#define DAC_C1_DACBFMD

(

x

)

(((uint8_t)(((uint8_t)(x))<<DAC_C1_DACBFMD_SHIFT))&DAC_C1_DACBFMD_MASK)

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..Reserved

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..FIFO mode

DAC_C1_DACBFMD [3/6]

#define DAC_C1_DACBFMD

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..Reserved

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..FIFO mode

DAC_C1_DACBFMD [4/6]

#define DAC_C1_DACBFMD

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..Reserved

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..FIFO mode

DAC_C1_DACBFMD [5/6]

#define DAC_C1_DACBFMD

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..Reserved

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..FIFO mode

DAC_C1_DACBFMD [6/6]

#define DAC_C1_DACBFMD

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFMD_SHIFT)) & DAC_C1_DACBFMD_MASK)

DACBFMD - DAC Buffer Work Mode Select 0b00..Normal mode 0b01..Swing mode 0b10..One-Time Scan mode 0b11..FIFO mode

DAC_C1_DACBFWM [1/6]

#define DAC_C1_DACBFWM

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)

DACBFWM - DAC Buffer Watermark Select 0b00..1 word 0b01..2 words 0b10..3 words 0b11..4 words

DACBFWM - DAC Buffer Watermark Select 0b00..In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit. 0b01..In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit. 0b10..In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit. 0b11..In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.

DAC_C1_DACBFWM [2/6]

#define DAC_C1_DACBFWM

(

x

)

(((uint8_t)(((uint8_t)(x))<<DAC_C1_DACBFWM_SHIFT))&DAC_C1_DACBFWM_MASK)

DACBFWM - DAC Buffer Watermark Select 0b00..1 word 0b01..2 words 0b10..3 words 0b11..4 words

DACBFWM - DAC Buffer Watermark Select 0b00..In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit. 0b01..In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit. 0b10..In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit. 0b11..In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.

DAC_C1_DACBFWM [3/6]

#define DAC_C1_DACBFWM

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)

DACBFWM - DAC Buffer Watermark Select 0b00..1 word 0b01..2 words 0b10..3 words 0b11..4 words

DACBFWM - DAC Buffer Watermark Select 0b00..In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit. 0b01..In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit. 0b10..In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit. 0b11..In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.

DAC_C1_DACBFWM [4/6]

#define DAC_C1_DACBFWM

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)

DACBFWM - DAC Buffer Watermark Select 0b00..1 word 0b01..2 words 0b10..3 words 0b11..4 words

DACBFWM - DAC Buffer Watermark Select 0b00..In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit. 0b01..In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit. 0b10..In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit. 0b11..In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.

DAC_C1_DACBFWM [5/6]

#define DAC_C1_DACBFWM

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)

DACBFWM - DAC Buffer Watermark Select 0b00..1 word 0b01..2 words 0b10..3 words 0b11..4 words

DACBFWM - DAC Buffer Watermark Select 0b00..In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit. 0b01..In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit. 0b10..In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit. 0b11..In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.

DAC_C1_DACBFWM [6/6]

#define DAC_C1_DACBFWM

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DACBFWM_SHIFT)) & DAC_C1_DACBFWM_MASK)

DACBFWM - DAC Buffer Watermark Select 0b00..In normal mode, 1 word . In FIFO mode, 2 or less than 2 data remaining in FIFO will set watermark status bit. 0b01..In normal mode, 2 words . In FIFO mode, Max/4 or less than Max/4 data remaining in FIFO will set watermark status bit. 0b10..In normal mode, 3 words . In FIFO mode, Max/2 or less than Max/2 data remaining in FIFO will set watermark status bit. 0b11..In normal mode, 4 words . In FIFO mode, Max-2 or less than Max-2 data remaining in FIFO will set watermark status bit.

DAC_C1_DMAEN [1/5]

#define DAC_C1_DMAEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)

DMAEN - DMA Enable Select 0b0..DMA is disabled. 0b1..DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.

DAC_C1_DMAEN [2/5]

#define DAC_C1_DMAEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)

DMAEN - DMA Enable Select 0b0..DMA is disabled. 0b1..DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.

DAC_C1_DMAEN [3/5]

#define DAC_C1_DMAEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)

DMAEN - DMA Enable Select 0b0..DMA is disabled. 0b1..DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.

DAC_C1_DMAEN [4/5]

#define DAC_C1_DMAEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)

DMAEN - DMA Enable Select 0b0..DMA is disabled. 0b1..DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.

DAC_C1_DMAEN [5/5]

#define DAC_C1_DMAEN

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_C1_DMAEN_SHIFT)) & DAC_C1_DMAEN_MASK)

DMAEN - DMA Enable Select 0b0..DMA is disabled. 0b1..DMA is enabled. When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.

DAC_IRQS

#define DAC_IRQS   { DAC0_IRQn, DAC1_IRQn }

Interrupt vectors for the DAC peripheral type

DAC_SR_DACBFRPBF [1/5]

#define DAC_SR_DACBFRPBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)

DACBFRPBF - DAC Buffer Read Pointer Bottom Position Flag 0b0..The DAC buffer read pointer is not equal to C2[DACBFUP]. 0b1..The DAC buffer read pointer is equal to C2[DACBFUP].

DAC_SR_DACBFRPBF [2/5]

#define DAC_SR_DACBFRPBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)

DACBFRPBF - DAC Buffer Read Pointer Bottom Position Flag 0b0..The DAC buffer read pointer is not equal to C2[DACBFUP]. 0b1..The DAC buffer read pointer is equal to C2[DACBFUP].

DAC_SR_DACBFRPBF [3/5]

#define DAC_SR_DACBFRPBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)

DACBFRPBF - DAC Buffer Read Pointer Bottom Position Flag 0b0..The DAC buffer read pointer is not equal to C2[DACBFUP]. 0b1..The DAC buffer read pointer is equal to C2[DACBFUP].

DAC_SR_DACBFRPBF [4/5]

#define DAC_SR_DACBFRPBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)

DACBFRPBF - DAC Buffer Read Pointer Bottom Position Flag 0b0..The DAC buffer read pointer is not equal to C2[DACBFUP]. 0b1..The DAC buffer read pointer is equal to C2[DACBFUP].

DAC_SR_DACBFRPBF [5/5]

#define DAC_SR_DACBFRPBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPBF_SHIFT)) & DAC_SR_DACBFRPBF_MASK)

DACBFRPBF - DAC Buffer Read Pointer Bottom Position Flag 0b0..The DAC buffer read pointer is not equal to C2[DACBFUP]. 0b1..The DAC buffer read pointer is equal to C2[DACBFUP].

DAC_SR_DACBFRPTF [1/5]

#define DAC_SR_DACBFRPTF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)

DACBFRPTF - DAC Buffer Read Pointer Top Position Flag 0b0..The DAC buffer read pointer is not zero. 0b1..The DAC buffer read pointer is zero.

DAC_SR_DACBFRPTF [2/5]

#define DAC_SR_DACBFRPTF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)

DACBFRPTF - DAC Buffer Read Pointer Top Position Flag 0b0..The DAC buffer read pointer is not zero. 0b1..The DAC buffer read pointer is zero.

DAC_SR_DACBFRPTF [3/5]

#define DAC_SR_DACBFRPTF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)

DACBFRPTF - DAC Buffer Read Pointer Top Position Flag 0b0..The DAC buffer read pointer is not zero. 0b1..The DAC buffer read pointer is zero.

DAC_SR_DACBFRPTF [4/5]

#define DAC_SR_DACBFRPTF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)

DACBFRPTF - DAC Buffer Read Pointer Top Position Flag 0b0..The DAC buffer read pointer is not zero. 0b1..The DAC buffer read pointer is zero.

DAC_SR_DACBFRPTF [5/5]

#define DAC_SR_DACBFRPTF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFRPTF_SHIFT)) & DAC_SR_DACBFRPTF_MASK)

DACBFRPTF - DAC Buffer Read Pointer Top Position Flag 0b0..The DAC buffer read pointer is not zero. 0b1..The DAC buffer read pointer is zero.

DAC_SR_DACBFWMF [1/5]

#define DAC_SR_DACBFWMF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)

DACBFWMF - DAC Buffer Watermark Flag 0b0..The DAC buffer read pointer has not reached the watermark level. 0b1..The DAC buffer read pointer has reached the watermark level.

DAC_SR_DACBFWMF [2/5]

#define DAC_SR_DACBFWMF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)

DACBFWMF - DAC Buffer Watermark Flag 0b0..The DAC buffer read pointer has not reached the watermark level. 0b1..The DAC buffer read pointer has reached the watermark level.

DAC_SR_DACBFWMF [3/5]

#define DAC_SR_DACBFWMF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)

DACBFWMF - DAC Buffer Watermark Flag 0b0..The DAC buffer read pointer has not reached the watermark level. 0b1..The DAC buffer read pointer has reached the watermark level.

DAC_SR_DACBFWMF [4/5]

#define DAC_SR_DACBFWMF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)

DACBFWMF - DAC Buffer Watermark Flag 0b0..The DAC buffer read pointer has not reached the watermark level. 0b1..The DAC buffer read pointer has reached the watermark level.

DAC_SR_DACBFWMF [5/5]

#define DAC_SR_DACBFWMF

(

x

)

(((uint8_t)(((uint8_t)(x)) << DAC_SR_DACBFWMF_SHIFT)) & DAC_SR_DACBFWMF_MASK)

DACBFWMF - DAC Buffer Watermark Flag 0b0..The DAC buffer read pointer has not reached the watermark level. 0b1..The DAC buffer read pointer has reached the watermark level.