mikroSDK Reference Manual
Macros
Exported_macro
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Macros

#define SET_BIT(REG, BIT)   ((REG) |= (BIT))
 
#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
 
#define READ_BIT(REG, BIT)   ((REG) & (BIT))
 
#define CLEAR_REG(REG)   ((REG) = (0x0))
 
#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
 
#define READ_REG(REG)   ((REG))
 
#define MODIFY_REG(REG, CLEARMASK, SETMASK)   WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
 
#define POSITION_VAL(VAL)   (__CLZ(__RBIT(VAL)))
 
#define SET_BIT(REG, BIT)   ((REG) |= (BIT))
 
#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
 
#define READ_BIT(REG, BIT)   ((REG) & (BIT))
 
#define CLEAR_REG(REG)   ((REG) = (0x0))
 
#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
 
#define READ_REG(REG)   ((REG))
 
#define MODIFY_REG(REG, CLEARMASK, SETMASK)   WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
 
#define POSITION_VAL(VAL)   (__CLZ(__RBIT(VAL)))
 
#define ATOMIC_SET_BIT(REG, BIT)
 
#define ATOMIC_CLEAR_BIT(REG, BIT)
 
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)
 
#define ATOMIC_SETH_BIT(REG, BIT)
 
#define ATOMIC_CLEARH_BIT(REG, BIT)
 
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)
 
#define SET_BIT(REG, BIT)   ((REG) |= (BIT))
 
#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
 
#define READ_BIT(REG, BIT)   ((REG) & (BIT))
 
#define CLEAR_REG(REG)   ((REG) = (0x0))
 
#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
 
#define READ_REG(REG)   ((REG))
 
#define MODIFY_REG(REG, CLEARMASK, SETMASK)   WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
 
#define POSITION_VAL(VAL)   (__CLZ(__RBIT(VAL)))
 
#define IS_ADC_ALL_INSTANCE(INSTANCE)
 
#define IS_ADC_COMMON_INSTANCE(INSTANCE)   ((INSTANCE) == ADC12_COMMON)
 
#define IS_ADC_MULTIMODE_MASTER_INSTANCE(INSTANCE)   ((INSTANCE) == ADC1)
 
#define IS_ADC_DMA_CAPABILITY_INSTANCE(INSTANCE)   ((INSTANCE) == ADC1)
 
#define IS_CAN_ALL_INSTANCE(INSTANCE)
 
#define IS_CRC_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == CRC)
 
#define IS_DAC_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == DAC1)
 
#define IS_DMA_ALL_INSTANCE(INSTANCE)
 
#define IS_GPIO_ALL_INSTANCE(INSTANCE)
 
#define IS_GPIO_AF_INSTANCE(INSTANCE)   IS_GPIO_ALL_INSTANCE(INSTANCE)
 
#define IS_GPIO_LOCK_INSTANCE(INSTANCE)   IS_GPIO_ALL_INSTANCE(INSTANCE)
 
#define IS_I2C_ALL_INSTANCE(INSTANCE)
 
#define IS_SMBUS_ALL_INSTANCE   IS_I2C_ALL_INSTANCE
 
#define IS_I2S_ALL_INSTANCE(INSTANCE)
 
#define IS_IWDG_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == IWDG)
 
#define IS_SPI_ALL_INSTANCE(INSTANCE)
 
#define IS_TIM_INSTANCE(INSTANCE)
 
#define IS_TIM_ADVANCED_INSTANCE(INSTANCE)   ((INSTANCE) == TIM1)
 
#define IS_TIM_CC1_INSTANCE(INSTANCE)
 
#define IS_TIM_CC2_INSTANCE(INSTANCE)
 
#define IS_TIM_CC3_INSTANCE(INSTANCE)
 
#define IS_TIM_CC4_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE)
 
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE)
 
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)
 
#define IS_TIM_XOR_INSTANCE(INSTANCE)
 
#define IS_TIM_MASTER_INSTANCE(INSTANCE)
 
#define IS_TIM_SLAVE_INSTANCE(INSTANCE)
 
#define IS_TIM_DMABURST_INSTANCE(INSTANCE)
 
#define IS_TIM_BREAK_INSTANCE(INSTANCE)    ((INSTANCE) == TIM1)
 
#define IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL)
 
#define IS_TIM_CCXN_INSTANCE(INSTANCE, CHANNEL)
 
#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE)
 
#define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE)    ((INSTANCE) == TIM1)
 
#define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE)
 
#define IS_TIM_DMA_INSTANCE(INSTANCE)
 
#define IS_TIM_DMA_CC_INSTANCE(INSTANCE)
 
#define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)    ((INSTANCE) == TIM1)
 
#define IS_TIM_ETR_INSTANCE(INSTANCE)
 
#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE)
 
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE)   0U
 
#define IS_USART_INSTANCE(INSTANCE)
 
#define IS_UART_INSTANCE(INSTANCE)
 
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE)
 
#define IS_UART_LIN_INSTANCE(INSTANCE)
 
#define IS_UART_HWFLOW_INSTANCE(INSTANCE)
 
#define IS_SMARTCARD_INSTANCE(INSTANCE)
 
#define IS_IRDA_INSTANCE(INSTANCE)
 
#define IS_UART_MULTIPROCESSOR_INSTANCE(INSTANCE)
 
#define IS_UART_DMA_INSTANCE(INSTANCE)
 
#define IS_RTC_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == RTC)
 
#define IS_WWDG_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == WWDG)
 
#define IS_PCD_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == USB_OTG_FS)
 
#define IS_HCD_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == USB_OTG_FS)
 
#define IS_ETH_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == ETH)
 
#define RCC_HSE_MIN   3000000U
 
#define RCC_HSE_MAX   25000000U
 
#define RCC_MAX_FREQUENCY   72000000U
 

Macro Definition Documentation

◆ ATOMIC_CLEAR_BIT

#define ATOMIC_CLEAR_BIT ( REG,
BIT )
Value:
do { \
uint32_t val; \
do { \
val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
} while(0)
__IO
#define __IO
Definition core_cm3.h:170

◆ ATOMIC_CLEARH_BIT

#define ATOMIC_CLEARH_BIT ( REG,
BIT )
Value:
do { \
uint16_t val; \
do { \
val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
} while(0)

◆ ATOMIC_MODIFY_REG

#define ATOMIC_MODIFY_REG ( REG,
CLEARMSK,
SETMASK )
Value:
do { \
uint32_t val; \
do { \
val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
} while(0)

◆ ATOMIC_MODIFYH_REG

#define ATOMIC_MODIFYH_REG ( REG,
CLEARMSK,
SETMASK )
Value:
do { \
uint16_t val; \
do { \
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
} while(0)

◆ ATOMIC_SET_BIT

#define ATOMIC_SET_BIT ( REG,
BIT )
Value:
do { \
uint32_t val; \
do { \
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
} while(0)

◆ ATOMIC_SETH_BIT

#define ATOMIC_SETH_BIT ( REG,
BIT )
Value:
do { \
uint16_t val; \
do { \
val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
} while(0)

◆ IS_ADC_ALL_INSTANCE

#define IS_ADC_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == ADC1) || \
((INSTANCE) == ADC2))

◆ IS_CAN_ALL_INSTANCE

#define IS_CAN_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == CAN1) || \
((INSTANCE) == CAN2))

◆ IS_DMA_ALL_INSTANCE

#define IS_DMA_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == DMA1_Channel1) || \
((INSTANCE) == DMA1_Channel2) || \
((INSTANCE) == DMA1_Channel3) || \
((INSTANCE) == DMA1_Channel4) || \
((INSTANCE) == DMA1_Channel5) || \
((INSTANCE) == DMA1_Channel6) || \
((INSTANCE) == DMA1_Channel7) || \
((INSTANCE) == DMA2_Channel1) || \
((INSTANCE) == DMA2_Channel2) || \
((INSTANCE) == DMA2_Channel3) || \
((INSTANCE) == DMA2_Channel4) || \
((INSTANCE) == DMA2_Channel5))

◆ IS_GPIO_ALL_INSTANCE

#define IS_GPIO_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == GPIOA) || \
((INSTANCE) == GPIOB) || \
((INSTANCE) == GPIOC) || \
((INSTANCE) == GPIOD) || \
((INSTANCE) == GPIOE))

◆ IS_I2C_ALL_INSTANCE

#define IS_I2C_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2))

◆ IS_I2S_ALL_INSTANCE

#define IS_I2S_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == SPI2) || \
((INSTANCE) == SPI3))

◆ IS_IRDA_INSTANCE

#define IS_IRDA_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4) || \
((INSTANCE) == UART5))

◆ IS_SMARTCARD_INSTANCE

#define IS_SMARTCARD_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3))

◆ IS_SPI_ALL_INSTANCE

#define IS_SPI_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
((INSTANCE) == SPI3))

◆ IS_TIM_CC1_INSTANCE

#define IS_TIM_CC1_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CC2_INSTANCE

#define IS_TIM_CC2_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CC3_INSTANCE

#define IS_TIM_CC3_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CC4_INSTANCE

#define IS_TIM_CC4_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CCX_INSTANCE

#define IS_TIM_CCX_INSTANCE ( INSTANCE,
CHANNEL )
Value:
((((INSTANCE) == TIM1) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
(((INSTANCE) == TIM2) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
(((INSTANCE) == TIM3) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
(((INSTANCE) == TIM4) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))) \
|| \
(((INSTANCE) == TIM5) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3) || \
((CHANNEL) == TIM_CHANNEL_4))))

◆ IS_TIM_CCXN_INSTANCE

#define IS_TIM_CCXN_INSTANCE ( INSTANCE,
CHANNEL )
Value:
(((INSTANCE) == TIM1) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3)))

◆ IS_TIM_CLOCK_DIVISION_INSTANCE

#define IS_TIM_CLOCK_DIVISION_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE

#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE

#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CLOCKSOURCE_ITRX_INSTANCE

#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_CLOCKSOURCE_TIX_INSTANCE

#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_COUNTER_MODE_SELECT_INSTANCE

#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_DMA_CC_INSTANCE

#define IS_TIM_DMA_CC_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_DMA_INSTANCE

#define IS_TIM_DMA_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM6) || \
((INSTANCE) == TIM7))

◆ IS_TIM_DMABURST_INSTANCE

#define IS_TIM_DMABURST_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_ENCODER_INTERFACE_INSTANCE

#define IS_TIM_ENCODER_INTERFACE_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_ETR_INSTANCE

#define IS_TIM_ETR_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE

#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_INSTANCE

#define IS_TIM_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM6) || \
((INSTANCE) == TIM7))

◆ IS_TIM_MASTER_INSTANCE

#define IS_TIM_MASTER_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM6) || \
((INSTANCE) == TIM7))

◆ IS_TIM_OCXREF_CLEAR_INSTANCE

#define IS_TIM_OCXREF_CLEAR_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_SLAVE_INSTANCE

#define IS_TIM_SLAVE_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_TIM_XOR_INSTANCE

#define IS_TIM_XOR_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

◆ IS_UART_DMA_INSTANCE

#define IS_UART_DMA_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4))

◆ IS_UART_HALFDUPLEX_INSTANCE

#define IS_UART_HALFDUPLEX_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4) || \
((INSTANCE) == UART5))

◆ IS_UART_HWFLOW_INSTANCE

#define IS_UART_HWFLOW_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3))

◆ IS_UART_INSTANCE

#define IS_UART_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4) || \
((INSTANCE) == UART5))

◆ IS_UART_LIN_INSTANCE

#define IS_UART_LIN_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4) || \
((INSTANCE) == UART5))

◆ IS_UART_MULTIPROCESSOR_INSTANCE

#define IS_UART_MULTIPROCESSOR_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4) || \
((INSTANCE) == UART5))

◆ IS_USART_INSTANCE

#define IS_USART_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3))