mikroSDK Reference Manual
Macros
EWM Register Masks
Mapping Information » Device Peripheral Access Layer » ADC Peripheral Access Layer » AIPS Peripheral Access Layer » AXBS Peripheral Access Layer » CAN Peripheral Access Layer » CAU Peripheral Access Layer » CMP Peripheral Access Layer » CMT Peripheral Access Layer » CRC Peripheral Access Layer » DAC Peripheral Access Layer » DMA Peripheral Access Layer » DMAMUX Peripheral Access Layer » ENET Peripheral Access Layer » EWM Peripheral Access Layer

Macros

#define EWM_BASE   (0x40061000u)
 
#define EWM   ((EWM_Type *)EWM_BASE)
 
#define EWM_BASE_ADDRS   { EWM_BASE }
 
#define EWM_BASE_PTRS   { EWM }
 
#define EWM_IRQS   { WDOG_EWM_IRQn }
 

CTRL - Control Register

#define EWM_CTRL_EWMEN_MASK   (0x1U)
 
#define EWM_CTRL_EWMEN_SHIFT   (0U)
 
#define EWM_CTRL_EWMEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
 
#define EWM_CTRL_ASSIN_MASK   (0x2U)
 
#define EWM_CTRL_ASSIN_SHIFT   (1U)
 
#define EWM_CTRL_ASSIN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
 
#define EWM_CTRL_INEN_MASK   (0x4U)
 
#define EWM_CTRL_INEN_SHIFT   (2U)
 
#define EWM_CTRL_INEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
 
#define EWM_CTRL_INTEN_MASK   (0x8U)
 
#define EWM_CTRL_INTEN_SHIFT   (3U)
 
#define EWM_CTRL_INTEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
 
#define EWM_CTRL_EWMEN_MASK   0x1u
 
#define EWM_CTRL_EWMEN_SHIFT   0
 
#define EWM_CTRL_ASSIN_MASK   0x2u
 
#define EWM_CTRL_ASSIN_SHIFT   1
 
#define EWM_CTRL_INEN_MASK   0x4u
 
#define EWM_CTRL_INEN_SHIFT   2
 
#define EWM_CTRL_EWMEN_MASK   (0x1U)
 
#define EWM_CTRL_EWMEN_SHIFT   (0U)
 
#define EWM_CTRL_EWMEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
 
#define EWM_CTRL_ASSIN_MASK   (0x2U)
 
#define EWM_CTRL_ASSIN_SHIFT   (1U)
 
#define EWM_CTRL_ASSIN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
 
#define EWM_CTRL_INEN_MASK   (0x4U)
 
#define EWM_CTRL_INEN_SHIFT   (2U)
 
#define EWM_CTRL_INEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
 
#define EWM_CTRL_INTEN_MASK   (0x8U)
 
#define EWM_CTRL_INTEN_SHIFT   (3U)
 
#define EWM_CTRL_INTEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
 
#define EWM_CTRL_EWMEN_MASK   (0x1U)
 
#define EWM_CTRL_EWMEN_SHIFT   (0U)
 
#define EWM_CTRL_EWMEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
 
#define EWM_CTRL_ASSIN_MASK   (0x2U)
 
#define EWM_CTRL_ASSIN_SHIFT   (1U)
 
#define EWM_CTRL_ASSIN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
 
#define EWM_CTRL_INEN_MASK   (0x4U)
 
#define EWM_CTRL_INEN_SHIFT   (2U)
 
#define EWM_CTRL_INEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
 
#define EWM_CTRL_INTEN_MASK   (0x8U)
 
#define EWM_CTRL_INTEN_SHIFT   (3U)
 
#define EWM_CTRL_INTEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
 
#define EWM_CTRL_EWMEN_MASK   (0x1U)
 
#define EWM_CTRL_EWMEN_SHIFT   (0U)
 
#define EWM_CTRL_EWMEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
 
#define EWM_CTRL_ASSIN_MASK   (0x2U)
 
#define EWM_CTRL_ASSIN_SHIFT   (1U)
 
#define EWM_CTRL_ASSIN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
 
#define EWM_CTRL_INEN_MASK   (0x4U)
 
#define EWM_CTRL_INEN_SHIFT   (2U)
 
#define EWM_CTRL_INEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
 
#define EWM_CTRL_INTEN_MASK   (0x8U)
 
#define EWM_CTRL_INTEN_SHIFT   (3U)
 
#define EWM_CTRL_INTEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
 
#define EWM_CTRL_EWMEN_MASK   (0x1U)
 
#define EWM_CTRL_EWMEN_SHIFT   (0U)
 
#define EWM_CTRL_EWMEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_EWMEN_SHIFT)) & EWM_CTRL_EWMEN_MASK)
 
#define EWM_CTRL_ASSIN_MASK   (0x2U)
 
#define EWM_CTRL_ASSIN_SHIFT   (1U)
 
#define EWM_CTRL_ASSIN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_ASSIN_SHIFT)) & EWM_CTRL_ASSIN_MASK)
 
#define EWM_CTRL_INEN_MASK   (0x4U)
 
#define EWM_CTRL_INEN_SHIFT   (2U)
 
#define EWM_CTRL_INEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INEN_SHIFT)) & EWM_CTRL_INEN_MASK)
 
#define EWM_CTRL_INTEN_MASK   (0x8U)
 
#define EWM_CTRL_INTEN_SHIFT   (3U)
 
#define EWM_CTRL_INTEN(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CTRL_INTEN_SHIFT)) & EWM_CTRL_INTEN_MASK)
 

SERV - Service Register

#define EWM_SERV_SERVICE_MASK   (0xFFU)
 
#define EWM_SERV_SERVICE_SHIFT   (0U)
 
#define EWM_SERV_SERVICE(x)   (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
 
#define EWM_SERV_SERVICE_MASK   0xFFu
 
#define EWM_SERV_SERVICE_SHIFT   0
 
#define EWM_SERV_SERVICE(x)   (((uint8_t)(((uint8_t)(x))<<EWM_SERV_SERVICE_SHIFT))&EWM_SERV_SERVICE_MASK)
 
#define EWM_SERV_SERVICE_MASK   (0xFFU)
 
#define EWM_SERV_SERVICE_SHIFT   (0U)
 
#define EWM_SERV_SERVICE(x)   (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
 
#define EWM_SERV_SERVICE_MASK   (0xFFU)
 
#define EWM_SERV_SERVICE_SHIFT   (0U)
 
#define EWM_SERV_SERVICE(x)   (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
 
#define EWM_SERV_SERVICE_MASK   (0xFFU)
 
#define EWM_SERV_SERVICE_SHIFT   (0U)
 
#define EWM_SERV_SERVICE(x)   (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
 
#define EWM_SERV_SERVICE_MASK   (0xFFU)
 
#define EWM_SERV_SERVICE_SHIFT   (0U)
 
#define EWM_SERV_SERVICE(x)   (((uint8_t)(((uint8_t)(x)) << EWM_SERV_SERVICE_SHIFT)) & EWM_SERV_SERVICE_MASK)
 

CMPL - Compare Low Register

#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
 
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
 
#define EWM_CMPL_COMPAREL(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
 
#define EWM_CMPL_COMPAREL_MASK   0xFFu
 
#define EWM_CMPL_COMPAREL_SHIFT   0
 
#define EWM_CMPL_COMPAREL(x)   (((uint8_t)(((uint8_t)(x))<<EWM_CMPL_COMPAREL_SHIFT))&EWM_CMPL_COMPAREL_MASK)
 
#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
 
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
 
#define EWM_CMPL_COMPAREL(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
 
#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
 
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
 
#define EWM_CMPL_COMPAREL(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
 
#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
 
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
 
#define EWM_CMPL_COMPAREL(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
 
#define EWM_CMPL_COMPAREL_MASK   (0xFFU)
 
#define EWM_CMPL_COMPAREL_SHIFT   (0U)
 
#define EWM_CMPL_COMPAREL(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPL_COMPAREL_SHIFT)) & EWM_CMPL_COMPAREL_MASK)
 

CMPH - Compare High Register

#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
 
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
 
#define EWM_CMPH_COMPAREH(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
 
#define EWM_CMPH_COMPAREH_MASK   0xFFu
 
#define EWM_CMPH_COMPAREH_SHIFT   0
 
#define EWM_CMPH_COMPAREH(x)   (((uint8_t)(((uint8_t)(x))<<EWM_CMPH_COMPAREH_SHIFT))&EWM_CMPH_COMPAREH_MASK)
 
#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
 
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
 
#define EWM_CMPH_COMPAREH(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
 
#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
 
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
 
#define EWM_CMPH_COMPAREH(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
 
#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
 
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
 
#define EWM_CMPH_COMPAREH(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
 
#define EWM_CMPH_COMPAREH_MASK   (0xFFU)
 
#define EWM_CMPH_COMPAREH_SHIFT   (0U)
 
#define EWM_CMPH_COMPAREH(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CMPH_COMPAREH_SHIFT)) & EWM_CMPH_COMPAREH_MASK)
 

CLKPRESCALER - Clock Prescaler Register

#define EWM_CLKPRESCALER_CLK_DIV_MASK   (0xFFU)
 
#define EWM_CLKPRESCALER_CLK_DIV_SHIFT   (0U)
 
#define EWM_CLKPRESCALER_CLK_DIV(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)
 
#define EWM_CLKPRESCALER_CLK_DIV_MASK   (0xFFU)
 
#define EWM_CLKPRESCALER_CLK_DIV_SHIFT   (0U)
 
#define EWM_CLKPRESCALER_CLK_DIV(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CLKPRESCALER_CLK_DIV_SHIFT)) & EWM_CLKPRESCALER_CLK_DIV_MASK)
 

CLKCTRL - Clock Control Register

#define EWM_CLKCTRL_CLKSEL_MASK   (0x3U)
 
#define EWM_CLKCTRL_CLKSEL_SHIFT   (0U)
 
#define EWM_CLKCTRL_CLKSEL(x)   (((uint8_t)(((uint8_t)(x)) << EWM_CLKCTRL_CLKSEL_SHIFT)) & EWM_CLKCTRL_CLKSEL_MASK)
 

Macro Definition Documentation

◆ EWM

#define EWM   ((EWM_Type *)EWM_BASE)

Peripheral EWM base pointer

◆ EWM_BASE

#define EWM_BASE   (0x40061000u)

Peripheral EWM base address

◆ EWM_BASE_ADDRS

#define EWM_BASE_ADDRS   { EWM_BASE }

Array initializer of EWM peripheral base addresses

◆ EWM_BASE_PTRS

#define EWM_BASE_PTRS   { EWM }

Array initializer of EWM peripheral base pointers

◆ EWM_IRQS

#define EWM_IRQS   { WDOG_EWM_IRQn }

Interrupt vectors for the EWM peripheral type