mikroSDK Reference Manual

Topics

 LPTMR Register Masks
 
 MCG Peripheral Access Layer
 

Data Structures

struct  LPTMR_Type
 

Macros

#define LPTMR0_BASE   (0x40040000u)
 
#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)
 
#define LPTMR0_BASE   (0x40040000u)
 
#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)
 
#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }
 
#define LPTMR_BASE_PTRS   { LPTMR0 }
 
#define LPTMR_IRQS   { LPTMR0_IRQn }
 
#define LPTMR0_BASE   (0x40040000u)
 
#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)
 
#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }
 
#define LPTMR_BASE_PTRS   { LPTMR0 }
 
#define LPTMR_IRQS   { LPTMR0_IRQn }
 
#define LPTMR0_BASE   (0x40040000u)
 
#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)
 
#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }
 
#define LPTMR_BASE_PTRS   { LPTMR0 }
 
#define LPTMR_IRQS   { LPTMR0_IRQn }
 
#define LPTMR0_BASE   (0x40040000u)
 
#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)
 
#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }
 
#define LPTMR_BASE_PTRS   { LPTMR0 }
 
#define LPTMR_IRQS   { LPTMR0_IRQn }
 

Macro Definition Documentation

◆ LPTMR0 [1/5]

#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)

Peripheral LPTMR0 base pointer

◆ LPTMR0 [2/5]

#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)

Peripheral LPTMR0 base pointer

◆ LPTMR0 [3/5]

#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)

Peripheral LPTMR0 base pointer

◆ LPTMR0 [4/5]

#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)

Peripheral LPTMR0 base pointer

◆ LPTMR0 [5/5]

#define LPTMR0   ((LPTMR_Type *)LPTMR0_BASE)

Peripheral LPTMR0 base pointer

◆ LPTMR0_BASE [1/5]

#define LPTMR0_BASE   (0x40040000u)

Peripheral LPTMR0 base address

◆ LPTMR0_BASE [2/5]

#define LPTMR0_BASE   (0x40040000u)

Peripheral LPTMR0 base address

◆ LPTMR0_BASE [3/5]

#define LPTMR0_BASE   (0x40040000u)

Peripheral LPTMR0 base address

◆ LPTMR0_BASE [4/5]

#define LPTMR0_BASE   (0x40040000u)

Peripheral LPTMR0 base address

◆ LPTMR0_BASE [5/5]

#define LPTMR0_BASE   (0x40040000u)

Peripheral LPTMR0 base address

◆ LPTMR_BASE_ADDRS [1/4]

#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }

Array initializer of LPTMR peripheral base addresses

◆ LPTMR_BASE_ADDRS [2/4]

#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }

Array initializer of LPTMR peripheral base addresses

◆ LPTMR_BASE_ADDRS [3/4]

#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }

Array initializer of LPTMR peripheral base addresses

◆ LPTMR_BASE_ADDRS [4/4]

#define LPTMR_BASE_ADDRS   { LPTMR0_BASE }

Array initializer of LPTMR peripheral base addresses

◆ LPTMR_BASE_PTRS [1/4]

#define LPTMR_BASE_PTRS   { LPTMR0 }

Array initializer of LPTMR peripheral base pointers

◆ LPTMR_BASE_PTRS [2/4]

#define LPTMR_BASE_PTRS   { LPTMR0 }

Array initializer of LPTMR peripheral base pointers

◆ LPTMR_BASE_PTRS [3/4]

#define LPTMR_BASE_PTRS   { LPTMR0 }

Array initializer of LPTMR peripheral base pointers

◆ LPTMR_BASE_PTRS [4/4]

#define LPTMR_BASE_PTRS   { LPTMR0 }

Array initializer of LPTMR peripheral base pointers

◆ LPTMR_IRQS [1/4]

#define LPTMR_IRQS   { LPTMR0_IRQn }

Interrupt vectors for the LPTMR peripheral type

◆ LPTMR_IRQS [2/4]

#define LPTMR_IRQS   { LPTMR0_IRQn }

Interrupt vectors for the LPTMR peripheral type

◆ LPTMR_IRQS [3/4]

#define LPTMR_IRQS   { LPTMR0_IRQn }

Interrupt vectors for the LPTMR peripheral type

◆ LPTMR_IRQS [4/4]

#define LPTMR_IRQS   { LPTMR0_IRQn }

Interrupt vectors for the LPTMR peripheral type