mikroSDK Reference Manual

Topics

 PIT Register Masks
 
 PMC Peripheral Access Layer
 

Data Structures

struct  PIT_Type
 

Macros

#define PIT_BASE   (0x40037000u)
 
#define PIT   ((PIT_Type *)PIT_BASE)
 
#define PIT_BASE   (0x40037000u)
 
#define PIT   ((PIT_Type *)PIT_BASE)
 
#define PIT_BASE_ADDRS   { PIT_BASE }
 
#define PIT_BASE_PTRS   { PIT }
 
#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
 
#define PIT_BASE   (0x40037000u)
 
#define PIT   ((PIT_Type *)PIT_BASE)
 
#define PIT_BASE_ADDRS   { PIT_BASE }
 
#define PIT_BASE_PTRS   { PIT }
 
#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
 
#define PIT_BASE   (0x40037000u)
 
#define PIT   ((PIT_Type *)PIT_BASE)
 
#define PIT_BASE_ADDRS   { PIT_BASE }
 
#define PIT_BASE_PTRS   { PIT }
 
#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
 
#define PIT_BASE   (0x40037000u)
 
#define PIT   ((PIT_Type *)PIT_BASE)
 
#define PIT_BASE_ADDRS   { PIT_BASE }
 
#define PIT_BASE_PTRS   { PIT }
 
#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }
 

Macro Definition Documentation

◆ PIT [1/5]

#define PIT   ((PIT_Type *)PIT_BASE)

Peripheral PIT base pointer

◆ PIT [2/5]

#define PIT   ((PIT_Type *)PIT_BASE)

Peripheral PIT base pointer

◆ PIT [3/5]

#define PIT   ((PIT_Type *)PIT_BASE)

Peripheral PIT base pointer

◆ PIT [4/5]

#define PIT   ((PIT_Type *)PIT_BASE)

Peripheral PIT base pointer

◆ PIT [5/5]

#define PIT   ((PIT_Type *)PIT_BASE)

Peripheral PIT base pointer

◆ PIT_BASE [1/5]

#define PIT_BASE   (0x40037000u)

Peripheral PIT base address

◆ PIT_BASE [2/5]

#define PIT_BASE   (0x40037000u)

Peripheral PIT base address

◆ PIT_BASE [3/5]

#define PIT_BASE   (0x40037000u)

Peripheral PIT base address

◆ PIT_BASE [4/5]

#define PIT_BASE   (0x40037000u)

Peripheral PIT base address

◆ PIT_BASE [5/5]

#define PIT_BASE   (0x40037000u)

Peripheral PIT base address

◆ PIT_BASE_ADDRS [1/4]

#define PIT_BASE_ADDRS   { PIT_BASE }

Array initializer of PIT peripheral base addresses

◆ PIT_BASE_ADDRS [2/4]

#define PIT_BASE_ADDRS   { PIT_BASE }

Array initializer of PIT peripheral base addresses

◆ PIT_BASE_ADDRS [3/4]

#define PIT_BASE_ADDRS   { PIT_BASE }

Array initializer of PIT peripheral base addresses

◆ PIT_BASE_ADDRS [4/4]

#define PIT_BASE_ADDRS   { PIT_BASE }

Array initializer of PIT peripheral base addresses

◆ PIT_BASE_PTRS [1/4]

#define PIT_BASE_PTRS   { PIT }

Array initializer of PIT peripheral base pointers

◆ PIT_BASE_PTRS [2/4]

#define PIT_BASE_PTRS   { PIT }

Array initializer of PIT peripheral base pointers

◆ PIT_BASE_PTRS [3/4]

#define PIT_BASE_PTRS   { PIT }

Array initializer of PIT peripheral base pointers

◆ PIT_BASE_PTRS [4/4]

#define PIT_BASE_PTRS   { PIT }

Array initializer of PIT peripheral base pointers

◆ PIT_IRQS [1/4]

#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }

Interrupt vectors for the PIT peripheral type

◆ PIT_IRQS [2/4]

#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }

Interrupt vectors for the PIT peripheral type

◆ PIT_IRQS [3/4]

#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }

Interrupt vectors for the PIT peripheral type

◆ PIT_IRQS [4/4]

#define PIT_IRQS   { { PIT0_IRQn, PIT1_IRQn, PIT2_IRQn, PIT3_IRQn } }

Interrupt vectors for the PIT peripheral type