mikroSDK Reference Manual
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Macros | |
#define | PMC_BASE (0x4007D000u) |
#define | PMC ((PMC_Type *)PMC_BASE) |
#define | PMC_BASE_ADDRS { PMC_BASE } |
#define | PMC_BASE_PTRS { PMC } |
#define | PMC_IRQS { LVD_LVW_IRQn } |
#define | PMC_REGSC_VLPRS_MASK 0x8u |
#define | PMC_REGSC_VLPRS_SHIFT 3 |
#define | PMC_REGSC_TRAMPO_MASK 0x10u |
#define | PMC_REGSC_TRAMPO_SHIFT 4 |
LVDSC1 - Low Voltage Detect Status And Control 1 register | |
#define | PMC_LVDSC1_LVDV_MASK (0x3U) |
#define | PMC_LVDSC1_LVDV_SHIFT (0U) |
#define | PMC_LVDSC1_LVDV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
#define | PMC_LVDSC1_LVDRE_MASK (0x10U) |
#define | PMC_LVDSC1_LVDRE_SHIFT (4U) |
#define | PMC_LVDSC1_LVDRE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
#define | PMC_LVDSC1_LVDIE_MASK (0x20U) |
#define | PMC_LVDSC1_LVDIE_SHIFT (5U) |
#define | PMC_LVDSC1_LVDIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
#define | PMC_LVDSC1_LVDACK_MASK (0x40U) |
#define | PMC_LVDSC1_LVDACK_SHIFT (6U) |
#define | PMC_LVDSC1_LVDACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDACK_SHIFT)) & PMC_LVDSC1_LVDACK_MASK) |
#define | PMC_LVDSC1_LVDF_MASK (0x80U) |
#define | PMC_LVDSC1_LVDF_SHIFT (7U) |
#define | PMC_LVDSC1_LVDF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
#define | PMC_LVDSC1_LVDV_MASK 0x3u |
#define | PMC_LVDSC1_LVDV_SHIFT 0 |
#define | PMC_LVDSC1_LVDV(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC1_LVDV_SHIFT))&PMC_LVDSC1_LVDV_MASK) |
#define | PMC_LVDSC1_LVDRE_MASK 0x10u |
#define | PMC_LVDSC1_LVDRE_SHIFT 4 |
#define | PMC_LVDSC1_LVDIE_MASK 0x20u |
#define | PMC_LVDSC1_LVDIE_SHIFT 5 |
#define | PMC_LVDSC1_LVDACK_MASK 0x40u |
#define | PMC_LVDSC1_LVDACK_SHIFT 6 |
#define | PMC_LVDSC1_LVDF_MASK 0x80u |
#define | PMC_LVDSC1_LVDF_SHIFT 7 |
#define | PMC_LVDSC1_LVDV_MASK (0x3U) |
#define | PMC_LVDSC1_LVDV_SHIFT (0U) |
#define | PMC_LVDSC1_LVDV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
#define | PMC_LVDSC1_LVDRE_MASK (0x10U) |
#define | PMC_LVDSC1_LVDRE_SHIFT (4U) |
#define | PMC_LVDSC1_LVDRE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
#define | PMC_LVDSC1_LVDIE_MASK (0x20U) |
#define | PMC_LVDSC1_LVDIE_SHIFT (5U) |
#define | PMC_LVDSC1_LVDIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
#define | PMC_LVDSC1_LVDACK_MASK (0x40U) |
#define | PMC_LVDSC1_LVDACK_SHIFT (6U) |
#define | PMC_LVDSC1_LVDACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDACK_SHIFT)) & PMC_LVDSC1_LVDACK_MASK) |
#define | PMC_LVDSC1_LVDF_MASK (0x80U) |
#define | PMC_LVDSC1_LVDF_SHIFT (7U) |
#define | PMC_LVDSC1_LVDF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
#define | PMC_LVDSC1_LVDV_MASK (0x3U) |
#define | PMC_LVDSC1_LVDV_SHIFT (0U) |
#define | PMC_LVDSC1_LVDV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
#define | PMC_LVDSC1_LVDRE_MASK (0x10U) |
#define | PMC_LVDSC1_LVDRE_SHIFT (4U) |
#define | PMC_LVDSC1_LVDRE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
#define | PMC_LVDSC1_LVDIE_MASK (0x20U) |
#define | PMC_LVDSC1_LVDIE_SHIFT (5U) |
#define | PMC_LVDSC1_LVDIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
#define | PMC_LVDSC1_LVDACK_MASK (0x40U) |
#define | PMC_LVDSC1_LVDACK_SHIFT (6U) |
#define | PMC_LVDSC1_LVDACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDACK_SHIFT)) & PMC_LVDSC1_LVDACK_MASK) |
#define | PMC_LVDSC1_LVDF_MASK (0x80U) |
#define | PMC_LVDSC1_LVDF_SHIFT (7U) |
#define | PMC_LVDSC1_LVDF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
#define | PMC_LVDSC1_LVDV_MASK (0x3U) |
#define | PMC_LVDSC1_LVDV_SHIFT (0U) |
#define | PMC_LVDSC1_LVDV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
#define | PMC_LVDSC1_LVDRE_MASK (0x10U) |
#define | PMC_LVDSC1_LVDRE_SHIFT (4U) |
#define | PMC_LVDSC1_LVDRE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
#define | PMC_LVDSC1_LVDIE_MASK (0x20U) |
#define | PMC_LVDSC1_LVDIE_SHIFT (5U) |
#define | PMC_LVDSC1_LVDIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
#define | PMC_LVDSC1_LVDACK_MASK (0x40U) |
#define | PMC_LVDSC1_LVDACK_SHIFT (6U) |
#define | PMC_LVDSC1_LVDACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDACK_SHIFT)) & PMC_LVDSC1_LVDACK_MASK) |
#define | PMC_LVDSC1_LVDF_MASK (0x80U) |
#define | PMC_LVDSC1_LVDF_SHIFT (7U) |
#define | PMC_LVDSC1_LVDF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
#define | PMC_LVDSC1_LVDV_MASK (0x3U) |
#define | PMC_LVDSC1_LVDV_SHIFT (0U) |
#define | PMC_LVDSC1_LVDV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
#define | PMC_LVDSC1_LVDRE_MASK (0x10U) |
#define | PMC_LVDSC1_LVDRE_SHIFT (4U) |
#define | PMC_LVDSC1_LVDRE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
#define | PMC_LVDSC1_LVDIE_MASK (0x20U) |
#define | PMC_LVDSC1_LVDIE_SHIFT (5U) |
#define | PMC_LVDSC1_LVDIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
#define | PMC_LVDSC1_LVDACK_MASK (0x40U) |
#define | PMC_LVDSC1_LVDACK_SHIFT (6U) |
#define | PMC_LVDSC1_LVDACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDACK_SHIFT)) & PMC_LVDSC1_LVDACK_MASK) |
#define | PMC_LVDSC1_LVDF_MASK (0x80U) |
#define | PMC_LVDSC1_LVDF_SHIFT (7U) |
#define | PMC_LVDSC1_LVDF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
LVDSC2 - Low Voltage Detect Status And Control 2 register | |
#define | PMC_LVDSC2_LVWV_MASK (0x3U) |
#define | PMC_LVDSC2_LVWV_SHIFT (0U) |
#define | PMC_LVDSC2_LVWV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
#define | PMC_LVDSC2_LVWIE_MASK (0x20U) |
#define | PMC_LVDSC2_LVWIE_SHIFT (5U) |
#define | PMC_LVDSC2_LVWIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
#define | PMC_LVDSC2_LVWACK_MASK (0x40U) |
#define | PMC_LVDSC2_LVWACK_SHIFT (6U) |
#define | PMC_LVDSC2_LVWACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWACK_SHIFT)) & PMC_LVDSC2_LVWACK_MASK) |
#define | PMC_LVDSC2_LVWF_MASK (0x80U) |
#define | PMC_LVDSC2_LVWF_SHIFT (7U) |
#define | PMC_LVDSC2_LVWF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
#define | PMC_LVDSC2_LVWV_MASK 0x3u |
#define | PMC_LVDSC2_LVWV_SHIFT 0 |
#define | PMC_LVDSC2_LVWV(x) (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC2_LVWV_SHIFT))&PMC_LVDSC2_LVWV_MASK) |
#define | PMC_LVDSC2_LVWIE_MASK 0x20u |
#define | PMC_LVDSC2_LVWIE_SHIFT 5 |
#define | PMC_LVDSC2_LVWACK_MASK 0x40u |
#define | PMC_LVDSC2_LVWACK_SHIFT 6 |
#define | PMC_LVDSC2_LVWF_MASK 0x80u |
#define | PMC_LVDSC2_LVWF_SHIFT 7 |
#define | PMC_LVDSC2_LVWV_MASK (0x3U) |
#define | PMC_LVDSC2_LVWV_SHIFT (0U) |
#define | PMC_LVDSC2_LVWV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
#define | PMC_LVDSC2_LVWIE_MASK (0x20U) |
#define | PMC_LVDSC2_LVWIE_SHIFT (5U) |
#define | PMC_LVDSC2_LVWIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
#define | PMC_LVDSC2_LVWACK_MASK (0x40U) |
#define | PMC_LVDSC2_LVWACK_SHIFT (6U) |
#define | PMC_LVDSC2_LVWACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWACK_SHIFT)) & PMC_LVDSC2_LVWACK_MASK) |
#define | PMC_LVDSC2_LVWF_MASK (0x80U) |
#define | PMC_LVDSC2_LVWF_SHIFT (7U) |
#define | PMC_LVDSC2_LVWF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
#define | PMC_LVDSC2_LVWV_MASK (0x3U) |
#define | PMC_LVDSC2_LVWV_SHIFT (0U) |
#define | PMC_LVDSC2_LVWV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
#define | PMC_LVDSC2_LVWIE_MASK (0x20U) |
#define | PMC_LVDSC2_LVWIE_SHIFT (5U) |
#define | PMC_LVDSC2_LVWIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
#define | PMC_LVDSC2_LVWACK_MASK (0x40U) |
#define | PMC_LVDSC2_LVWACK_SHIFT (6U) |
#define | PMC_LVDSC2_LVWACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWACK_SHIFT)) & PMC_LVDSC2_LVWACK_MASK) |
#define | PMC_LVDSC2_LVWF_MASK (0x80U) |
#define | PMC_LVDSC2_LVWF_SHIFT (7U) |
#define | PMC_LVDSC2_LVWF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
#define | PMC_LVDSC2_LVWV_MASK (0x3U) |
#define | PMC_LVDSC2_LVWV_SHIFT (0U) |
#define | PMC_LVDSC2_LVWV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
#define | PMC_LVDSC2_LVWIE_MASK (0x20U) |
#define | PMC_LVDSC2_LVWIE_SHIFT (5U) |
#define | PMC_LVDSC2_LVWIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
#define | PMC_LVDSC2_LVWACK_MASK (0x40U) |
#define | PMC_LVDSC2_LVWACK_SHIFT (6U) |
#define | PMC_LVDSC2_LVWACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWACK_SHIFT)) & PMC_LVDSC2_LVWACK_MASK) |
#define | PMC_LVDSC2_LVWF_MASK (0x80U) |
#define | PMC_LVDSC2_LVWF_SHIFT (7U) |
#define | PMC_LVDSC2_LVWF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
#define | PMC_LVDSC2_LVWV_MASK (0x3U) |
#define | PMC_LVDSC2_LVWV_SHIFT (0U) |
#define | PMC_LVDSC2_LVWV(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
#define | PMC_LVDSC2_LVWIE_MASK (0x20U) |
#define | PMC_LVDSC2_LVWIE_SHIFT (5U) |
#define | PMC_LVDSC2_LVWIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
#define | PMC_LVDSC2_LVWACK_MASK (0x40U) |
#define | PMC_LVDSC2_LVWACK_SHIFT (6U) |
#define | PMC_LVDSC2_LVWACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWACK_SHIFT)) & PMC_LVDSC2_LVWACK_MASK) |
#define | PMC_LVDSC2_LVWF_MASK (0x80U) |
#define | PMC_LVDSC2_LVWF_SHIFT (7U) |
#define | PMC_LVDSC2_LVWF(x) (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
REGSC - Regulator Status And Control register | |
#define | PMC_REGSC_BGBE_MASK (0x1U) |
#define | PMC_REGSC_BGBE_SHIFT (0U) |
#define | PMC_REGSC_BGBE(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
#define | PMC_REGSC_REGONS_MASK (0x4U) |
#define | PMC_REGSC_REGONS_SHIFT (2U) |
#define | PMC_REGSC_REGONS(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
#define | PMC_REGSC_ACKISO_MASK (0x8U) |
#define | PMC_REGSC_ACKISO_SHIFT (3U) |
#define | PMC_REGSC_ACKISO(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
#define | PMC_REGSC_BGEN_MASK (0x10U) |
#define | PMC_REGSC_BGEN_SHIFT (4U) |
#define | PMC_REGSC_BGEN(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
#define | PMC_REGSC_BGBE_MASK 0x1u |
#define | PMC_REGSC_BGBE_SHIFT 0 |
#define | PMC_REGSC_REGONS_MASK 0x4u |
#define | PMC_REGSC_REGONS_SHIFT 2 |
#define | PMC_REGSC_BGBE_MASK (0x1U) |
#define | PMC_REGSC_BGBE_SHIFT (0U) |
#define | PMC_REGSC_BGBE(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
#define | PMC_REGSC_REGONS_MASK (0x4U) |
#define | PMC_REGSC_REGONS_SHIFT (2U) |
#define | PMC_REGSC_REGONS(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
#define | PMC_REGSC_ACKISO_MASK (0x8U) |
#define | PMC_REGSC_ACKISO_SHIFT (3U) |
#define | PMC_REGSC_ACKISO(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
#define | PMC_REGSC_BGEN_MASK (0x10U) |
#define | PMC_REGSC_BGEN_SHIFT (4U) |
#define | PMC_REGSC_BGEN(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
#define | PMC_REGSC_BGBE_MASK (0x1U) |
#define | PMC_REGSC_BGBE_SHIFT (0U) |
#define | PMC_REGSC_BGBE(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
#define | PMC_REGSC_REGONS_MASK (0x4U) |
#define | PMC_REGSC_REGONS_SHIFT (2U) |
#define | PMC_REGSC_REGONS(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
#define | PMC_REGSC_ACKISO_MASK (0x8U) |
#define | PMC_REGSC_ACKISO_SHIFT (3U) |
#define | PMC_REGSC_ACKISO(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
#define | PMC_REGSC_BGEN_MASK (0x10U) |
#define | PMC_REGSC_BGEN_SHIFT (4U) |
#define | PMC_REGSC_BGEN(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
#define | PMC_REGSC_BGBE_MASK (0x1U) |
#define | PMC_REGSC_BGBE_SHIFT (0U) |
#define | PMC_REGSC_BGBE(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
#define | PMC_REGSC_REGONS_MASK (0x4U) |
#define | PMC_REGSC_REGONS_SHIFT (2U) |
#define | PMC_REGSC_REGONS(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
#define | PMC_REGSC_ACKISO_MASK (0x8U) |
#define | PMC_REGSC_ACKISO_SHIFT (3U) |
#define | PMC_REGSC_ACKISO(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
#define | PMC_REGSC_BGEN_MASK (0x10U) |
#define | PMC_REGSC_BGEN_SHIFT (4U) |
#define | PMC_REGSC_BGEN(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
#define | PMC_REGSC_BGBE_MASK (0x1U) |
#define | PMC_REGSC_BGBE_SHIFT (0U) |
#define | PMC_REGSC_BGBE(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
#define | PMC_REGSC_REGONS_MASK (0x4U) |
#define | PMC_REGSC_REGONS_SHIFT (2U) |
#define | PMC_REGSC_REGONS(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
#define | PMC_REGSC_ACKISO_MASK (0x8U) |
#define | PMC_REGSC_ACKISO_SHIFT (3U) |
#define | PMC_REGSC_ACKISO(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
#define | PMC_REGSC_BGEN_MASK (0x10U) |
#define | PMC_REGSC_BGEN_SHIFT (4U) |
#define | PMC_REGSC_BGEN(x) (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
HVDSC1 - High Voltage Detect Status And Control 1 register | |
#define | PMC_HVDSC1_HVDV_MASK (0x1U) |
#define | PMC_HVDSC1_HVDV_SHIFT (0U) |
#define | PMC_HVDSC1_HVDV(x) (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDV_SHIFT)) & PMC_HVDSC1_HVDV_MASK) |
#define | PMC_HVDSC1_HVDRE_MASK (0x10U) |
#define | PMC_HVDSC1_HVDRE_SHIFT (4U) |
#define | PMC_HVDSC1_HVDRE(x) (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDRE_SHIFT)) & PMC_HVDSC1_HVDRE_MASK) |
#define | PMC_HVDSC1_HVDIE_MASK (0x20U) |
#define | PMC_HVDSC1_HVDIE_SHIFT (5U) |
#define | PMC_HVDSC1_HVDIE(x) (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDIE_SHIFT)) & PMC_HVDSC1_HVDIE_MASK) |
#define | PMC_HVDSC1_HVDACK_MASK (0x40U) |
#define | PMC_HVDSC1_HVDACK_SHIFT (6U) |
#define | PMC_HVDSC1_HVDACK(x) (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDACK_SHIFT)) & PMC_HVDSC1_HVDACK_MASK) |
#define | PMC_HVDSC1_HVDF_MASK (0x80U) |
#define | PMC_HVDSC1_HVDF_SHIFT (7U) |
#define | PMC_HVDSC1_HVDF(x) (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDF_SHIFT)) & PMC_HVDSC1_HVDF_MASK) |
#define PMC_BASE (0x4007D000u) |
Peripheral PMC base address
#define PMC_BASE_ADDRS { PMC_BASE } |
Array initializer of PMC peripheral base addresses
#define PMC_BASE_PTRS { PMC } |
Array initializer of PMC peripheral base pointers
#define PMC_HVDSC1_HVDF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDF_SHIFT)) & PMC_HVDSC1_HVDF_MASK) |
HVDF - High-Voltage Detect Flag 0b0..High-voltage event not detected 0b1..High-voltage event detected
#define PMC_HVDSC1_HVDIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDIE_SHIFT)) & PMC_HVDSC1_HVDIE_MASK) |
HVDIE - High-Voltage Detect Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when HVDF = 1
#define PMC_HVDSC1_HVDRE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDRE_SHIFT)) & PMC_HVDSC1_HVDRE_MASK) |
HVDRE - High-Voltage Detect Reset Enable 0b0..HVDF does not generate hardware resets 0b1..Force an MCU reset when HVDF = 1
#define PMC_HVDSC1_HVDV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_HVDSC1_HVDV_SHIFT)) & PMC_HVDSC1_HVDV_MASK) |
HVDV - High-Voltage Detect Voltage Select 0b0..Low trip point selected (V HVD = V HVDL ) 0b1..High trip point selected (V HVD = V HVDH )
#define PMC_IRQS { LVD_LVW_IRQn } |
Interrupt vectors for the PMC peripheral type
#define PMC_LVDSC1_LVDF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
LVDF - Low-Voltage Detect Flag 0b0..Low-voltage event not detected 0b1..Low-voltage event detected
#define PMC_LVDSC1_LVDF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
LVDF - Low-Voltage Detect Flag 0b0..Low-voltage event not detected 0b1..Low-voltage event detected
#define PMC_LVDSC1_LVDF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
LVDF - Low-Voltage Detect Flag 0b0..Low-voltage event not detected 0b1..Low-voltage event detected
#define PMC_LVDSC1_LVDF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
LVDF - Low-Voltage Detect Flag 0b0..Low-voltage event not detected 0b1..Low-voltage event detected
#define PMC_LVDSC1_LVDF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDF_SHIFT)) & PMC_LVDSC1_LVDF_MASK) |
LVDF - Low-Voltage Detect Flag 0b0..Low-voltage event not detected 0b1..Low-voltage event detected
#define PMC_LVDSC1_LVDIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
LVDIE - Low-Voltage Detect Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVDF = 1
#define PMC_LVDSC1_LVDIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
LVDIE - Low-Voltage Detect Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVDF = 1
#define PMC_LVDSC1_LVDIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
LVDIE - Low-Voltage Detect Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVDF = 1
#define PMC_LVDSC1_LVDIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
LVDIE - Low-Voltage Detect Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVDF = 1
#define PMC_LVDSC1_LVDIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDIE_SHIFT)) & PMC_LVDSC1_LVDIE_MASK) |
LVDIE - Low-Voltage Detect Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVDF = 1
#define PMC_LVDSC1_LVDRE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
LVDRE - Low-Voltage Detect Reset Enable 0b0..LVDF does not generate hardware resets 0b1..Force an MCU reset when LVDF = 1
#define PMC_LVDSC1_LVDRE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
LVDRE - Low-Voltage Detect Reset Enable 0b0..LVDF does not generate hardware resets 0b1..Force an MCU reset when LVDF = 1
#define PMC_LVDSC1_LVDRE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
LVDRE - Low-Voltage Detect Reset Enable 0b0..LVDF does not generate hardware resets 0b1..Force an MCU reset when LVDF = 1
#define PMC_LVDSC1_LVDRE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
LVDRE - Low-Voltage Detect Reset Enable 0b0..LVDF does not generate hardware resets 0b1..Force an MCU reset when LVDF = 1
#define PMC_LVDSC1_LVDRE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDRE_SHIFT)) & PMC_LVDSC1_LVDRE_MASK) |
LVDRE - Low-Voltage Detect Reset Enable 0b0..LVDF does not generate hardware resets 0b1..Force an MCU reset when LVDF = 1
#define PMC_LVDSC1_LVDV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
LVDV - Low-Voltage Detect Voltage Select 0b00..Low trip point selected (V LVD = V LVDL ) 0b01..High trip point selected (V LVD = V LVDH ) 0b10..Reserved 0b11..Reserved
#define PMC_LVDSC1_LVDV | ( | x | ) | (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC1_LVDV_SHIFT))&PMC_LVDSC1_LVDV_MASK) |
LVDV - Low-Voltage Detect Voltage Select 0b00..Low trip point selected (V LVD = V LVDL ) 0b01..High trip point selected (V LVD = V LVDH ) 0b10..Reserved 0b11..Reserved
#define PMC_LVDSC1_LVDV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
LVDV - Low-Voltage Detect Voltage Select 0b00..Low trip point selected (V LVD = V LVDL ) 0b01..High trip point selected (V LVD = V LVDH ) 0b10..Reserved 0b11..Reserved
#define PMC_LVDSC1_LVDV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
LVDV - Low-Voltage Detect Voltage Select 0b00..Low trip point selected (V LVD = V LVDL ) 0b01..High trip point selected (V LVD = V LVDH ) 0b10..Reserved 0b11..Reserved
#define PMC_LVDSC1_LVDV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
LVDV - Low-Voltage Detect Voltage Select 0b00..Low trip point selected (V LVD = V LVDL ) 0b01..High trip point selected (V LVD = V LVDH ) 0b10..Reserved 0b11..Reserved
#define PMC_LVDSC1_LVDV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC1_LVDV_SHIFT)) & PMC_LVDSC1_LVDV_MASK) |
LVDV - Low-Voltage Detect Voltage Select 0b00..Low trip point selected (V LVD = V LVDL ) 0b01..High trip point selected (V LVD = V LVDH ) 0b10..Reserved 0b11..Reserved
#define PMC_LVDSC2_LVWF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
LVWF - Low-Voltage Warning Flag 0b0..Low-voltage warning event not detected 0b1..Low-voltage warning event detected
#define PMC_LVDSC2_LVWF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
LVWF - Low-Voltage Warning Flag 0b0..Low-voltage warning event not detected 0b1..Low-voltage warning event detected
#define PMC_LVDSC2_LVWF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
LVWF - Low-Voltage Warning Flag 0b0..Low-voltage warning event not detected 0b1..Low-voltage warning event detected
#define PMC_LVDSC2_LVWF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
LVWF - Low-Voltage Warning Flag 0b0..Low-voltage warning event not detected 0b1..Low-voltage warning event detected
#define PMC_LVDSC2_LVWF | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWF_SHIFT)) & PMC_LVDSC2_LVWF_MASK) |
LVWF - Low-Voltage Warning Flag 0b0..Low-voltage warning event not detected 0b1..Low-voltage warning event detected
#define PMC_LVDSC2_LVWIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
LVWIE - Low-Voltage Warning Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVWF = 1
#define PMC_LVDSC2_LVWIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
LVWIE - Low-Voltage Warning Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVWF = 1
#define PMC_LVDSC2_LVWIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
LVWIE - Low-Voltage Warning Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVWF = 1
#define PMC_LVDSC2_LVWIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
LVWIE - Low-Voltage Warning Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVWF = 1
#define PMC_LVDSC2_LVWIE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWIE_SHIFT)) & PMC_LVDSC2_LVWIE_MASK) |
LVWIE - Low-Voltage Warning Interrupt Enable 0b0..Hardware interrupt disabled (use polling) 0b1..Request a hardware interrupt when LVWF = 1
#define PMC_LVDSC2_LVWV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
LVWV - Low-Voltage Warning Voltage Select 0b00..Low trip point selected (VLVW = VLVW1) 0b01..Mid 1 trip point selected (VLVW = VLVW2) 0b10..Mid 2 trip point selected (VLVW = VLVW3) 0b11..High trip point selected (VLVW = VLVW4)
#define PMC_LVDSC2_LVWV | ( | x | ) | (((uint8_t)(((uint8_t)(x))<<PMC_LVDSC2_LVWV_SHIFT))&PMC_LVDSC2_LVWV_MASK) |
LVWV - Low-Voltage Warning Voltage Select 0b00..Low trip point selected (VLVW = VLVW1) 0b01..Mid 1 trip point selected (VLVW = VLVW2) 0b10..Mid 2 trip point selected (VLVW = VLVW3) 0b11..High trip point selected (VLVW = VLVW4)
#define PMC_LVDSC2_LVWV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
LVWV - Low-Voltage Warning Voltage Select 0b00..Low trip point selected (VLVW = VLVW1) 0b01..Mid 1 trip point selected (VLVW = VLVW2) 0b10..Mid 2 trip point selected (VLVW = VLVW3) 0b11..High trip point selected (VLVW = VLVW4)
#define PMC_LVDSC2_LVWV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
LVWV - Low-Voltage Warning Voltage Select 0b00..Low trip point selected (VLVW = VLVW1) 0b01..Mid 1 trip point selected (VLVW = VLVW2) 0b10..Mid 2 trip point selected (VLVW = VLVW3) 0b11..High trip point selected (VLVW = VLVW4)
#define PMC_LVDSC2_LVWV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
LVWV - Low-Voltage Warning Voltage Select 0b00..Low trip point selected (VLVW = VLVW1) 0b01..Mid 1 trip point selected (VLVW = VLVW2) 0b10..Mid 2 trip point selected (VLVW = VLVW3) 0b11..High trip point selected (VLVW = VLVW4)
#define PMC_LVDSC2_LVWV | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_LVDSC2_LVWV_SHIFT)) & PMC_LVDSC2_LVWV_MASK) |
LVWV - Low-Voltage Warning Voltage Select 0b00..Low trip point selected (VLVW = VLVW1) 0b01..Mid 1 trip point selected (VLVW = VLVW2) 0b10..Mid 2 trip point selected (VLVW = VLVW3) 0b11..High trip point selected (VLVW = VLVW4)
#define PMC_REGSC_ACKISO | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
ACKISO - Acknowledge Isolation 0b0..Peripherals and I/O pads are in normal run state. 0b1..Certain peripherals and I/O pads are in an isolated and latched state.
#define PMC_REGSC_ACKISO | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
ACKISO - Acknowledge Isolation 0b0..Peripherals and I/O pads are in normal run state. 0b1..Certain peripherals and I/O pads are in an isolated and latched state.
#define PMC_REGSC_ACKISO | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
ACKISO - Acknowledge Isolation 0b0..Peripherals and I/O pads are in normal run state. 0b1..Certain peripherals and I/O pads are in an isolated and latched state.
#define PMC_REGSC_ACKISO | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
ACKISO - Acknowledge Isolation 0b0..Peripherals and I/O pads are in normal run state. 0b1..Certain peripherals and I/O pads are in an isolated and latched state.
#define PMC_REGSC_ACKISO | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_ACKISO_SHIFT)) & PMC_REGSC_ACKISO_MASK) |
ACKISO - Acknowledge Isolation 0b0..Peripherals and I/O pads are in normal run state. 0b1..Certain peripherals and I/O pads are in an isolated and latched state.
#define PMC_REGSC_BGBE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
BGBE - Bandgap Buffer Enable 0b0..Bandgap buffer not enabled 0b1..Bandgap buffer enabled
#define PMC_REGSC_BGBE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
BGBE - Bandgap Buffer Enable 0b0..Bandgap buffer not enabled 0b1..Bandgap buffer enabled
#define PMC_REGSC_BGBE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
BGBE - Bandgap Buffer Enable 0b0..Bandgap buffer not enabled 0b1..Bandgap buffer enabled
#define PMC_REGSC_BGBE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
BGBE - Bandgap Buffer Enable 0b0..Bandgap buffer not enabled 0b1..Bandgap buffer enabled
#define PMC_REGSC_BGBE | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGBE_SHIFT)) & PMC_REGSC_BGBE_MASK) |
BGBE - Bandgap Buffer Enable 0b0..Bandgap buffer not enabled 0b1..Bandgap buffer enabled
#define PMC_REGSC_BGEN | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , LLS , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , LLS , and VLLSx modes.
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , and VLLSx modes.
#define PMC_REGSC_BGEN | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , LLS , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , LLS , and VLLSx modes.
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , and VLLSx modes.
#define PMC_REGSC_BGEN | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , LLS , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , LLS , and VLLSx modes.
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , and VLLSx modes.
#define PMC_REGSC_BGEN | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , LLS , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , LLS , and VLLSx modes.
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , and VLLSx modes.
#define PMC_REGSC_BGEN | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_BGEN_SHIFT)) & PMC_REGSC_BGEN_MASK) |
BGEN - Bandgap Enable In VLPx Operation 0b0..Bandgap voltage reference is disabled in VLPx , and VLLSx modes. 0b1..Bandgap voltage reference is enabled in VLPx , and VLLSx modes.
#define PMC_REGSC_REGONS | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
REGONS - Regulator In Run Regulation Status 0b0..Regulator is in stop regulation or in transition to/from it 0b1..Regulator is in run regulation
#define PMC_REGSC_REGONS | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
REGONS - Regulator In Run Regulation Status 0b0..Regulator is in stop regulation or in transition to/from it 0b1..Regulator is in run regulation
#define PMC_REGSC_REGONS | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
REGONS - Regulator In Run Regulation Status 0b0..Regulator is in stop regulation or in transition to/from it 0b1..Regulator is in run regulation
#define PMC_REGSC_REGONS | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
REGONS - Regulator In Run Regulation Status 0b0..Regulator is in stop regulation or in transition to/from it 0b1..Regulator is in run regulation
#define PMC_REGSC_REGONS | ( | x | ) | (((uint8_t)(((uint8_t)(x)) << PMC_REGSC_REGONS_SHIFT)) & PMC_REGSC_REGONS_MASK) |
REGONS - Regulator In Run Regulation Status 0b0..Regulator is in stop regulation or in transition to/from it 0b1..Regulator is in run regulation