RCM Register Masks

Macros
#define	RCM_BASE   (0x4007F000u)
#define	RCM   ((RCM_Type *)RCM_BASE)
#define	RCM_BASE_ADDRS   { RCM_BASE }
#define	RCM_BASE_PTRS   { RCM }

SRS0 - System Reset Status Register 0
#define	RCM_SRS0_WAKEUP_MASK   (0x1U)
#define	RCM_SRS0_WAKEUP_SHIFT   (0U)
#define	RCM_SRS0_WAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)
#define	RCM_SRS0_LVD_MASK   (0x2U)
#define	RCM_SRS0_LVD_SHIFT   (1U)
#define	RCM_SRS0_LVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)
#define	RCM_SRS0_LOC_MASK   (0x4U)
#define	RCM_SRS0_LOC_SHIFT   (2U)
#define	RCM_SRS0_LOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)
#define	RCM_SRS0_LOL_MASK   (0x8U)
#define	RCM_SRS0_LOL_SHIFT   (3U)
#define	RCM_SRS0_LOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)
#define	RCM_SRS0_WDOG_MASK   (0x20U)
#define	RCM_SRS0_WDOG_SHIFT   (5U)
#define	RCM_SRS0_WDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)
#define	RCM_SRS0_PIN_MASK   (0x40U)
#define	RCM_SRS0_PIN_SHIFT   (6U)
#define	RCM_SRS0_PIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)
#define	RCM_SRS0_POR_MASK   (0x80U)
#define	RCM_SRS0_POR_SHIFT   (7U)
#define	RCM_SRS0_POR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)
#define	RCM_SRS0_WAKEUP_MASK   (0x1U)
#define	RCM_SRS0_WAKEUP_SHIFT   (0U)
#define	RCM_SRS0_WAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)
#define	RCM_SRS0_LVD_MASK   (0x2U)
#define	RCM_SRS0_LVD_SHIFT   (1U)
#define	RCM_SRS0_LVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)
#define	RCM_SRS0_LOC_MASK   (0x4U)
#define	RCM_SRS0_LOC_SHIFT   (2U)
#define	RCM_SRS0_LOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)
#define	RCM_SRS0_LOL_MASK   (0x8U)
#define	RCM_SRS0_LOL_SHIFT   (3U)
#define	RCM_SRS0_LOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)
#define	RCM_SRS0_WDOG_MASK   (0x20U)
#define	RCM_SRS0_WDOG_SHIFT   (5U)
#define	RCM_SRS0_WDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)
#define	RCM_SRS0_PIN_MASK   (0x40U)
#define	RCM_SRS0_PIN_SHIFT   (6U)
#define	RCM_SRS0_PIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)
#define	RCM_SRS0_POR_MASK   (0x80U)
#define	RCM_SRS0_POR_SHIFT   (7U)
#define	RCM_SRS0_POR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)
#define	RCM_SRS0_WAKEUP_MASK   (0x1U)
#define	RCM_SRS0_WAKEUP_SHIFT   (0U)
#define	RCM_SRS0_WAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)
#define	RCM_SRS0_LVD_MASK   (0x2U)
#define	RCM_SRS0_LVD_SHIFT   (1U)
#define	RCM_SRS0_LVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)
#define	RCM_SRS0_LOC_MASK   (0x4U)
#define	RCM_SRS0_LOC_SHIFT   (2U)
#define	RCM_SRS0_LOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)
#define	RCM_SRS0_LOL_MASK   (0x8U)
#define	RCM_SRS0_LOL_SHIFT   (3U)
#define	RCM_SRS0_LOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)
#define	RCM_SRS0_WDOG_MASK   (0x20U)
#define	RCM_SRS0_WDOG_SHIFT   (5U)
#define	RCM_SRS0_WDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)
#define	RCM_SRS0_PIN_MASK   (0x40U)
#define	RCM_SRS0_PIN_SHIFT   (6U)
#define	RCM_SRS0_PIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)
#define	RCM_SRS0_POR_MASK   (0x80U)
#define	RCM_SRS0_POR_SHIFT   (7U)
#define	RCM_SRS0_POR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)
#define	RCM_SRS0_WAKEUP_MASK   (0x1U)
#define	RCM_SRS0_WAKEUP_SHIFT   (0U)
#define	RCM_SRS0_WAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)
#define	RCM_SRS0_LVD_MASK   (0x2U)
#define	RCM_SRS0_LVD_SHIFT   (1U)
#define	RCM_SRS0_LVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)
#define	RCM_SRS0_LOC_MASK   (0x4U)
#define	RCM_SRS0_LOC_SHIFT   (2U)
#define	RCM_SRS0_LOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)
#define	RCM_SRS0_LOL_MASK   (0x8U)
#define	RCM_SRS0_LOL_SHIFT   (3U)
#define	RCM_SRS0_LOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)
#define	RCM_SRS0_WDOG_MASK   (0x20U)
#define	RCM_SRS0_WDOG_SHIFT   (5U)
#define	RCM_SRS0_WDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)
#define	RCM_SRS0_PIN_MASK   (0x40U)
#define	RCM_SRS0_PIN_SHIFT   (6U)
#define	RCM_SRS0_PIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)
#define	RCM_SRS0_POR_MASK   (0x80U)
#define	RCM_SRS0_POR_SHIFT   (7U)
#define	RCM_SRS0_POR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)
#define	RCM_SRS0_WAKEUP_MASK   (0x1U)
#define	RCM_SRS0_WAKEUP_SHIFT   (0U)
#define	RCM_SRS0_WAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)
#define	RCM_SRS0_LVD_MASK   (0x2U)
#define	RCM_SRS0_LVD_SHIFT   (1U)
#define	RCM_SRS0_LVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)
#define	RCM_SRS0_LOC_MASK   (0x4U)
#define	RCM_SRS0_LOC_SHIFT   (2U)
#define	RCM_SRS0_LOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)
#define	RCM_SRS0_LOL_MASK   (0x8U)
#define	RCM_SRS0_LOL_SHIFT   (3U)
#define	RCM_SRS0_LOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)
#define	RCM_SRS0_WDOG_MASK   (0x20U)
#define	RCM_SRS0_WDOG_SHIFT   (5U)
#define	RCM_SRS0_WDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)
#define	RCM_SRS0_PIN_MASK   (0x40U)
#define	RCM_SRS0_PIN_SHIFT   (6U)
#define	RCM_SRS0_PIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)
#define	RCM_SRS0_POR_MASK   (0x80U)
#define	RCM_SRS0_POR_SHIFT   (7U)
#define	RCM_SRS0_POR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)

SRS1 - System Reset Status Register 1
#define	RCM_SRS1_JTAG_MASK   (0x1U)
#define	RCM_SRS1_JTAG_SHIFT   (0U)
#define	RCM_SRS1_JTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)
#define	RCM_SRS1_LOCKUP_MASK   (0x2U)
#define	RCM_SRS1_LOCKUP_SHIFT   (1U)
#define	RCM_SRS1_LOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)
#define	RCM_SRS1_SW_MASK   (0x4U)
#define	RCM_SRS1_SW_SHIFT   (2U)
#define	RCM_SRS1_SW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)
#define	RCM_SRS1_MDM_AP_MASK   (0x8U)
#define	RCM_SRS1_MDM_AP_SHIFT   (3U)
#define	RCM_SRS1_MDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)
#define	RCM_SRS1_SACKERR_MASK   (0x20U)
#define	RCM_SRS1_SACKERR_SHIFT   (5U)
#define	RCM_SRS1_SACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)
#define	RCM_SRS1_JTAG_MASK   (0x1U)
#define	RCM_SRS1_JTAG_SHIFT   (0U)
#define	RCM_SRS1_JTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)
#define	RCM_SRS1_LOCKUP_MASK   (0x2U)
#define	RCM_SRS1_LOCKUP_SHIFT   (1U)
#define	RCM_SRS1_LOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)
#define	RCM_SRS1_SW_MASK   (0x4U)
#define	RCM_SRS1_SW_SHIFT   (2U)
#define	RCM_SRS1_SW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)
#define	RCM_SRS1_MDM_AP_MASK   (0x8U)
#define	RCM_SRS1_MDM_AP_SHIFT   (3U)
#define	RCM_SRS1_MDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)
#define	RCM_SRS1_SACKERR_MASK   (0x20U)
#define	RCM_SRS1_SACKERR_SHIFT   (5U)
#define	RCM_SRS1_SACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)
#define	RCM_SRS1_JTAG_MASK   (0x1U)
#define	RCM_SRS1_JTAG_SHIFT   (0U)
#define	RCM_SRS1_JTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)
#define	RCM_SRS1_LOCKUP_MASK   (0x2U)
#define	RCM_SRS1_LOCKUP_SHIFT   (1U)
#define	RCM_SRS1_LOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)
#define	RCM_SRS1_SW_MASK   (0x4U)
#define	RCM_SRS1_SW_SHIFT   (2U)
#define	RCM_SRS1_SW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)
#define	RCM_SRS1_MDM_AP_MASK   (0x8U)
#define	RCM_SRS1_MDM_AP_SHIFT   (3U)
#define	RCM_SRS1_MDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)
#define	RCM_SRS1_SACKERR_MASK   (0x20U)
#define	RCM_SRS1_SACKERR_SHIFT   (5U)
#define	RCM_SRS1_SACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)
#define	RCM_SRS1_JTAG_MASK   (0x1U)
#define	RCM_SRS1_JTAG_SHIFT   (0U)
#define	RCM_SRS1_JTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)
#define	RCM_SRS1_LOCKUP_MASK   (0x2U)
#define	RCM_SRS1_LOCKUP_SHIFT   (1U)
#define	RCM_SRS1_LOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)
#define	RCM_SRS1_SW_MASK   (0x4U)
#define	RCM_SRS1_SW_SHIFT   (2U)
#define	RCM_SRS1_SW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)
#define	RCM_SRS1_MDM_AP_MASK   (0x8U)
#define	RCM_SRS1_MDM_AP_SHIFT   (3U)
#define	RCM_SRS1_MDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)
#define	RCM_SRS1_SACKERR_MASK   (0x20U)
#define	RCM_SRS1_SACKERR_SHIFT   (5U)
#define	RCM_SRS1_SACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)
#define	RCM_SRS1_JTAG_MASK   (0x1U)
#define	RCM_SRS1_JTAG_SHIFT   (0U)
#define	RCM_SRS1_JTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)
#define	RCM_SRS1_LOCKUP_MASK   (0x2U)
#define	RCM_SRS1_LOCKUP_SHIFT   (1U)
#define	RCM_SRS1_LOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)
#define	RCM_SRS1_SW_MASK   (0x4U)
#define	RCM_SRS1_SW_SHIFT   (2U)
#define	RCM_SRS1_SW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)
#define	RCM_SRS1_MDM_AP_MASK   (0x8U)
#define	RCM_SRS1_MDM_AP_SHIFT   (3U)
#define	RCM_SRS1_MDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)
#define	RCM_SRS1_SACKERR_MASK   (0x20U)
#define	RCM_SRS1_SACKERR_SHIFT   (5U)
#define	RCM_SRS1_SACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)

SRS1 - System Reset Status Register 1
#define	RCM_SRS1_EZPT_MASK   (0x10U)
#define	RCM_SRS1_EZPT_SHIFT   (4U)
#define	RCM_SRS1_EZPT(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)
#define	RCM_SRS1_EZPT_MASK   (0x10U)
#define	RCM_SRS1_EZPT_SHIFT   (4U)
#define	RCM_SRS1_EZPT(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)
#define	RCM_SRS1_EZPT_MASK   (0x10U)
#define	RCM_SRS1_EZPT_SHIFT   (4U)
#define	RCM_SRS1_EZPT(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)
#define	RCM_SRS1_EZPT_MASK   (0x10U)
#define	RCM_SRS1_EZPT_SHIFT   (4U)
#define	RCM_SRS1_EZPT(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)

RPFC - Reset Pin Filter Control register
#define	RCM_RPFC_RSTFLTSRW_MASK   (0x3U)
#define	RCM_RPFC_RSTFLTSRW_SHIFT   (0U)
#define	RCM_RPFC_RSTFLTSRW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)
#define	RCM_RPFC_RSTFLTSS_MASK   (0x4U)
#define	RCM_RPFC_RSTFLTSS_SHIFT   (2U)
#define	RCM_RPFC_RSTFLTSS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)
#define	RCM_RPFC_RSTFLTSRW_MASK   (0x3U)
#define	RCM_RPFC_RSTFLTSRW_SHIFT   (0U)
#define	RCM_RPFC_RSTFLTSRW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)
#define	RCM_RPFC_RSTFLTSS_MASK   (0x4U)
#define	RCM_RPFC_RSTFLTSS_SHIFT   (2U)
#define	RCM_RPFC_RSTFLTSS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)
#define	RCM_RPFC_RSTFLTSRW_MASK   (0x3U)
#define	RCM_RPFC_RSTFLTSRW_SHIFT   (0U)
#define	RCM_RPFC_RSTFLTSRW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)
#define	RCM_RPFC_RSTFLTSS_MASK   (0x4U)
#define	RCM_RPFC_RSTFLTSS_SHIFT   (2U)
#define	RCM_RPFC_RSTFLTSS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)
#define	RCM_RPFC_RSTFLTSRW_MASK   (0x3U)
#define	RCM_RPFC_RSTFLTSRW_SHIFT   (0U)
#define	RCM_RPFC_RSTFLTSRW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)
#define	RCM_RPFC_RSTFLTSS_MASK   (0x4U)
#define	RCM_RPFC_RSTFLTSS_SHIFT   (2U)
#define	RCM_RPFC_RSTFLTSS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)
#define	RCM_RPFC_RSTFLTSRW_MASK   (0x3U)
#define	RCM_RPFC_RSTFLTSRW_SHIFT   (0U)
#define	RCM_RPFC_RSTFLTSRW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)
#define	RCM_RPFC_RSTFLTSS_MASK   (0x4U)
#define	RCM_RPFC_RSTFLTSS_SHIFT   (2U)
#define	RCM_RPFC_RSTFLTSS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)

RPFW - Reset Pin Filter Width register
#define	RCM_RPFW_RSTFLTSEL_MASK   (0x1FU)
#define	RCM_RPFW_RSTFLTSEL_SHIFT   (0U)
#define	RCM_RPFW_RSTFLTSEL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
#define	RCM_RPFW_RSTFLTSEL_MASK   (0x1FU)
#define	RCM_RPFW_RSTFLTSEL_SHIFT   (0U)
#define	RCM_RPFW_RSTFLTSEL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
#define	RCM_RPFW_RSTFLTSEL_MASK   (0x1FU)
#define	RCM_RPFW_RSTFLTSEL_SHIFT   (0U)
#define	RCM_RPFW_RSTFLTSEL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
#define	RCM_RPFW_RSTFLTSEL_MASK   (0x1FU)
#define	RCM_RPFW_RSTFLTSEL_SHIFT   (0U)
#define	RCM_RPFW_RSTFLTSEL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)
#define	RCM_RPFW_RSTFLTSEL_MASK   (0x1FU)
#define	RCM_RPFW_RSTFLTSEL_SHIFT   (0U)
#define	RCM_RPFW_RSTFLTSEL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)

MR - Mode Register
#define	RCM_MR_EZP_MS_MASK   (0x2U)
#define	RCM_MR_EZP_MS_SHIFT   (1U)
#define	RCM_MR_EZP_MS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)
#define	RCM_MR_EZP_MS_MASK   (0x2U)
#define	RCM_MR_EZP_MS_SHIFT   (1U)
#define	RCM_MR_EZP_MS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)
#define	RCM_MR_EZP_MS_MASK   (0x2U)
#define	RCM_MR_EZP_MS_SHIFT   (1U)
#define	RCM_MR_EZP_MS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)
#define	RCM_MR_EZP_MS_MASK   (0x2U)
#define	RCM_MR_EZP_MS_SHIFT   (1U)
#define	RCM_MR_EZP_MS(x)   (((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)

SSRS0 - Sticky System Reset Status Register 0
#define	RCM_SSRS0_SWAKEUP_MASK   (0x1U)
#define	RCM_SSRS0_SWAKEUP_SHIFT   (0U)
#define	RCM_SSRS0_SWAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWAKEUP_SHIFT)) & RCM_SSRS0_SWAKEUP_MASK)
#define	RCM_SSRS0_SLVD_MASK   (0x2U)
#define	RCM_SSRS0_SLVD_SHIFT   (1U)
#define	RCM_SSRS0_SLVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLVD_SHIFT)) & RCM_SSRS0_SLVD_MASK)
#define	RCM_SSRS0_SLOC_MASK   (0x4U)
#define	RCM_SSRS0_SLOC_SHIFT   (2U)
#define	RCM_SSRS0_SLOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOC_SHIFT)) & RCM_SSRS0_SLOC_MASK)
#define	RCM_SSRS0_SLOL_MASK   (0x8U)
#define	RCM_SSRS0_SLOL_SHIFT   (3U)
#define	RCM_SSRS0_SLOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOL_SHIFT)) & RCM_SSRS0_SLOL_MASK)
#define	RCM_SSRS0_SWDOG_MASK   (0x20U)
#define	RCM_SSRS0_SWDOG_SHIFT   (5U)
#define	RCM_SSRS0_SWDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWDOG_SHIFT)) & RCM_SSRS0_SWDOG_MASK)
#define	RCM_SSRS0_SPIN_MASK   (0x40U)
#define	RCM_SSRS0_SPIN_SHIFT   (6U)
#define	RCM_SSRS0_SPIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPIN_SHIFT)) & RCM_SSRS0_SPIN_MASK)
#define	RCM_SSRS0_SPOR_MASK   (0x80U)
#define	RCM_SSRS0_SPOR_SHIFT   (7U)
#define	RCM_SSRS0_SPOR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPOR_SHIFT)) & RCM_SSRS0_SPOR_MASK)
#define	RCM_SSRS0_SWAKEUP_MASK   (0x1U)
#define	RCM_SSRS0_SWAKEUP_SHIFT   (0U)
#define	RCM_SSRS0_SWAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWAKEUP_SHIFT)) & RCM_SSRS0_SWAKEUP_MASK)
#define	RCM_SSRS0_SLVD_MASK   (0x2U)
#define	RCM_SSRS0_SLVD_SHIFT   (1U)
#define	RCM_SSRS0_SLVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLVD_SHIFT)) & RCM_SSRS0_SLVD_MASK)
#define	RCM_SSRS0_SLOC_MASK   (0x4U)
#define	RCM_SSRS0_SLOC_SHIFT   (2U)
#define	RCM_SSRS0_SLOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOC_SHIFT)) & RCM_SSRS0_SLOC_MASK)
#define	RCM_SSRS0_SLOL_MASK   (0x8U)
#define	RCM_SSRS0_SLOL_SHIFT   (3U)
#define	RCM_SSRS0_SLOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOL_SHIFT)) & RCM_SSRS0_SLOL_MASK)
#define	RCM_SSRS0_SWDOG_MASK   (0x20U)
#define	RCM_SSRS0_SWDOG_SHIFT   (5U)
#define	RCM_SSRS0_SWDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWDOG_SHIFT)) & RCM_SSRS0_SWDOG_MASK)
#define	RCM_SSRS0_SPIN_MASK   (0x40U)
#define	RCM_SSRS0_SPIN_SHIFT   (6U)
#define	RCM_SSRS0_SPIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPIN_SHIFT)) & RCM_SSRS0_SPIN_MASK)
#define	RCM_SSRS0_SPOR_MASK   (0x80U)
#define	RCM_SSRS0_SPOR_SHIFT   (7U)
#define	RCM_SSRS0_SPOR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPOR_SHIFT)) & RCM_SSRS0_SPOR_MASK)
#define	RCM_SSRS0_SWAKEUP_MASK   (0x1U)
#define	RCM_SSRS0_SWAKEUP_SHIFT   (0U)
#define	RCM_SSRS0_SWAKEUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWAKEUP_SHIFT)) & RCM_SSRS0_SWAKEUP_MASK)
#define	RCM_SSRS0_SLVD_MASK   (0x2U)
#define	RCM_SSRS0_SLVD_SHIFT   (1U)
#define	RCM_SSRS0_SLVD(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLVD_SHIFT)) & RCM_SSRS0_SLVD_MASK)
#define	RCM_SSRS0_SLOC_MASK   (0x4U)
#define	RCM_SSRS0_SLOC_SHIFT   (2U)
#define	RCM_SSRS0_SLOC(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOC_SHIFT)) & RCM_SSRS0_SLOC_MASK)
#define	RCM_SSRS0_SLOL_MASK   (0x8U)
#define	RCM_SSRS0_SLOL_SHIFT   (3U)
#define	RCM_SSRS0_SLOL(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOL_SHIFT)) & RCM_SSRS0_SLOL_MASK)
#define	RCM_SSRS0_SWDOG_MASK   (0x20U)
#define	RCM_SSRS0_SWDOG_SHIFT   (5U)
#define	RCM_SSRS0_SWDOG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWDOG_SHIFT)) & RCM_SSRS0_SWDOG_MASK)
#define	RCM_SSRS0_SPIN_MASK   (0x40U)
#define	RCM_SSRS0_SPIN_SHIFT   (6U)
#define	RCM_SSRS0_SPIN(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPIN_SHIFT)) & RCM_SSRS0_SPIN_MASK)
#define	RCM_SSRS0_SPOR_MASK   (0x80U)
#define	RCM_SSRS0_SPOR_SHIFT   (7U)
#define	RCM_SSRS0_SPOR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPOR_SHIFT)) & RCM_SSRS0_SPOR_MASK)

SSRS1 - Sticky System Reset Status Register 1
#define	RCM_SSRS1_SJTAG_MASK   (0x1U)
#define	RCM_SSRS1_SJTAG_SHIFT   (0U)
#define	RCM_SSRS1_SJTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SJTAG_SHIFT)) & RCM_SSRS1_SJTAG_MASK)
#define	RCM_SSRS1_SLOCKUP_MASK   (0x2U)
#define	RCM_SSRS1_SLOCKUP_SHIFT   (1U)
#define	RCM_SSRS1_SLOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SLOCKUP_SHIFT)) & RCM_SSRS1_SLOCKUP_MASK)
#define	RCM_SSRS1_SSW_MASK   (0x4U)
#define	RCM_SSRS1_SSW_SHIFT   (2U)
#define	RCM_SSRS1_SSW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSW_SHIFT)) & RCM_SSRS1_SSW_MASK)
#define	RCM_SSRS1_SMDM_AP_MASK   (0x8U)
#define	RCM_SSRS1_SMDM_AP_SHIFT   (3U)
#define	RCM_SSRS1_SMDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SMDM_AP_SHIFT)) & RCM_SSRS1_SMDM_AP_MASK)
#define	RCM_SSRS1_SSACKERR_MASK   (0x20U)
#define	RCM_SSRS1_SSACKERR_SHIFT   (5U)
#define	RCM_SSRS1_SSACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSACKERR_SHIFT)) & RCM_SSRS1_SSACKERR_MASK)
#define	RCM_SSRS1_SJTAG_MASK   (0x1U)
#define	RCM_SSRS1_SJTAG_SHIFT   (0U)
#define	RCM_SSRS1_SJTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SJTAG_SHIFT)) & RCM_SSRS1_SJTAG_MASK)
#define	RCM_SSRS1_SLOCKUP_MASK   (0x2U)
#define	RCM_SSRS1_SLOCKUP_SHIFT   (1U)
#define	RCM_SSRS1_SLOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SLOCKUP_SHIFT)) & RCM_SSRS1_SLOCKUP_MASK)
#define	RCM_SSRS1_SSW_MASK   (0x4U)
#define	RCM_SSRS1_SSW_SHIFT   (2U)
#define	RCM_SSRS1_SSW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSW_SHIFT)) & RCM_SSRS1_SSW_MASK)
#define	RCM_SSRS1_SMDM_AP_MASK   (0x8U)
#define	RCM_SSRS1_SMDM_AP_SHIFT   (3U)
#define	RCM_SSRS1_SMDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SMDM_AP_SHIFT)) & RCM_SSRS1_SMDM_AP_MASK)
#define	RCM_SSRS1_SSACKERR_MASK   (0x20U)
#define	RCM_SSRS1_SSACKERR_SHIFT   (5U)
#define	RCM_SSRS1_SSACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSACKERR_SHIFT)) & RCM_SSRS1_SSACKERR_MASK)
#define	RCM_SSRS1_SJTAG_MASK   (0x1U)
#define	RCM_SSRS1_SJTAG_SHIFT   (0U)
#define	RCM_SSRS1_SJTAG(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SJTAG_SHIFT)) & RCM_SSRS1_SJTAG_MASK)
#define	RCM_SSRS1_SLOCKUP_MASK   (0x2U)
#define	RCM_SSRS1_SLOCKUP_SHIFT   (1U)
#define	RCM_SSRS1_SLOCKUP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SLOCKUP_SHIFT)) & RCM_SSRS1_SLOCKUP_MASK)
#define	RCM_SSRS1_SSW_MASK   (0x4U)
#define	RCM_SSRS1_SSW_SHIFT   (2U)
#define	RCM_SSRS1_SSW(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSW_SHIFT)) & RCM_SSRS1_SSW_MASK)
#define	RCM_SSRS1_SMDM_AP_MASK   (0x8U)
#define	RCM_SSRS1_SMDM_AP_SHIFT   (3U)
#define	RCM_SSRS1_SMDM_AP(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SMDM_AP_SHIFT)) & RCM_SSRS1_SMDM_AP_MASK)
#define	RCM_SSRS1_SSACKERR_MASK   (0x20U)
#define	RCM_SSRS1_SSACKERR_SHIFT   (5U)
#define	RCM_SSRS1_SSACKERR(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSACKERR_SHIFT)) & RCM_SSRS1_SSACKERR_MASK)

SSRS1 - Sticky System Reset Status Register 1
#define	RCM_SSRS1_SEZPT_MASK   (0x10U)
#define	RCM_SSRS1_SEZPT_SHIFT   (4U)
#define	RCM_SSRS1_SEZPT(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SEZPT_SHIFT)) & RCM_SSRS1_SEZPT_MASK)
#define	RCM_SSRS1_SEZPT_MASK   (0x10U)
#define	RCM_SSRS1_SEZPT_SHIFT   (4U)
#define	RCM_SSRS1_SEZPT(x)   (((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SEZPT_SHIFT)) & RCM_SSRS1_SEZPT_MASK)

Macro Definition Documentation

RCM

#define RCM   ((RCM_Type *)RCM_BASE)

Peripheral RCM base pointer

RCM_BASE

#define RCM_BASE   (0x4007F000u)

Peripheral RCM base address

RCM_BASE_ADDRS

#define RCM_BASE_ADDRS   { RCM_BASE }

Array initializer of RCM peripheral base addresses

RCM_BASE_PTRS

#define RCM_BASE_PTRS   { RCM }

Array initializer of RCM peripheral base pointers

RCM_MR_EZP_MS [1/4]

#define RCM_MR_EZP_MS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)

EZP_MS - EZP_MS_B pin state 0b0..Pin deasserted (logic 1) 0b1..Pin asserted (logic 0)

RCM_MR_EZP_MS [2/4]

#define RCM_MR_EZP_MS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)

EZP_MS - EZP_MS_B pin state 0b0..Pin deasserted (logic 1) 0b1..Pin asserted (logic 0)

RCM_MR_EZP_MS [3/4]

#define RCM_MR_EZP_MS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)

EZP_MS - EZP_MS_B pin state 0b0..Pin deasserted (logic 1) 0b1..Pin asserted (logic 0)

RCM_MR_EZP_MS [4/4]

#define RCM_MR_EZP_MS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_MR_EZP_MS_SHIFT)) & RCM_MR_EZP_MS_MASK)

EZP_MS - EZP_MS_B pin state 0b0..Pin deasserted (logic 1) 0b1..Pin asserted (logic 0)

RCM_RPFC_RSTFLTSRW [1/5]

#define RCM_RPFC_RSTFLTSRW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)

RSTFLTSRW - Reset Pin Filter Select in Run and Wait Modes 0b00..All filtering disabled 0b01..Bus clock filter enabled for normal operation 0b10..LPO clock filter enabled for normal operation 0b11..Reserved

RCM_RPFC_RSTFLTSRW [2/5]

#define RCM_RPFC_RSTFLTSRW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)

RSTFLTSRW - Reset Pin Filter Select in Run and Wait Modes 0b00..All filtering disabled 0b01..Bus clock filter enabled for normal operation 0b10..LPO clock filter enabled for normal operation 0b11..Reserved

RCM_RPFC_RSTFLTSRW [3/5]

#define RCM_RPFC_RSTFLTSRW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)

RSTFLTSRW - Reset Pin Filter Select in Run and Wait Modes 0b00..All filtering disabled 0b01..Bus clock filter enabled for normal operation 0b10..LPO clock filter enabled for normal operation 0b11..Reserved

RCM_RPFC_RSTFLTSRW [4/5]

#define RCM_RPFC_RSTFLTSRW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)

RSTFLTSRW - Reset Pin Filter Select in Run and Wait Modes 0b00..All filtering disabled 0b01..Bus clock filter enabled for normal operation 0b10..LPO clock filter enabled for normal operation 0b11..Reserved

RCM_RPFC_RSTFLTSRW [5/5]

#define RCM_RPFC_RSTFLTSRW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSRW_SHIFT)) & RCM_RPFC_RSTFLTSRW_MASK)

RSTFLTSRW - Reset Pin Filter Select in Run and Wait Modes 0b00..All filtering disabled 0b01..Bus clock filter enabled for normal operation 0b10..LPO clock filter enabled for normal operation 0b11..Reserved

RCM_RPFC_RSTFLTSS [1/5]

#define RCM_RPFC_RSTFLTSS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)

RSTFLTSS - Reset Pin Filter Select in Stop Mode 0b0..All filtering disabled 0b1..LPO clock filter enabled

RCM_RPFC_RSTFLTSS [2/5]

#define RCM_RPFC_RSTFLTSS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)

RSTFLTSS - Reset Pin Filter Select in Stop Mode 0b0..All filtering disabled 0b1..LPO clock filter enabled

RCM_RPFC_RSTFLTSS [3/5]

#define RCM_RPFC_RSTFLTSS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)

RSTFLTSS - Reset Pin Filter Select in Stop Mode 0b0..All filtering disabled 0b1..LPO clock filter enabled

RCM_RPFC_RSTFLTSS [4/5]

#define RCM_RPFC_RSTFLTSS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)

RSTFLTSS - Reset Pin Filter Select in Stop Mode 0b0..All filtering disabled 0b1..LPO clock filter enabled

RCM_RPFC_RSTFLTSS [5/5]

#define RCM_RPFC_RSTFLTSS

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFC_RSTFLTSS_SHIFT)) & RCM_RPFC_RSTFLTSS_MASK)

RSTFLTSS - Reset Pin Filter Select in Stop Mode 0b0..All filtering disabled 0b1..LPO clock filter enabled

RCM_RPFW_RSTFLTSEL [1/5]

#define RCM_RPFW_RSTFLTSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)

RSTFLTSEL - Reset Pin Filter Bus Clock Select 0b00000..Bus clock filter count is 1 0b00001..Bus clock filter count is 2 0b00010..Bus clock filter count is 3 0b00011..Bus clock filter count is 4 0b00100..Bus clock filter count is 5 0b00101..Bus clock filter count is 6 0b00110..Bus clock filter count is 7 0b00111..Bus clock filter count is 8 0b01000..Bus clock filter count is 9 0b01001..Bus clock filter count is 10 0b01010..Bus clock filter count is 11 0b01011..Bus clock filter count is 12 0b01100..Bus clock filter count is 13 0b01101..Bus clock filter count is 14 0b01110..Bus clock filter count is 15 0b01111..Bus clock filter count is 16 0b10000..Bus clock filter count is 17 0b10001..Bus clock filter count is 18 0b10010..Bus clock filter count is 19 0b10011..Bus clock filter count is 20 0b10100..Bus clock filter count is 21 0b10101..Bus clock filter count is 22 0b10110..Bus clock filter count is 23 0b10111..Bus clock filter count is 24 0b11000..Bus clock filter count is 25 0b11001..Bus clock filter count is 26 0b11010..Bus clock filter count is 27 0b11011..Bus clock filter count is 28 0b11100..Bus clock filter count is 29 0b11101..Bus clock filter count is 30 0b11110..Bus clock filter count is 31 0b11111..Bus clock filter count is 32

RCM_RPFW_RSTFLTSEL [2/5]

#define RCM_RPFW_RSTFLTSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)

RSTFLTSEL - Reset Pin Filter Bus Clock Select 0b00000..Bus clock filter count is 1 0b00001..Bus clock filter count is 2 0b00010..Bus clock filter count is 3 0b00011..Bus clock filter count is 4 0b00100..Bus clock filter count is 5 0b00101..Bus clock filter count is 6 0b00110..Bus clock filter count is 7 0b00111..Bus clock filter count is 8 0b01000..Bus clock filter count is 9 0b01001..Bus clock filter count is 10 0b01010..Bus clock filter count is 11 0b01011..Bus clock filter count is 12 0b01100..Bus clock filter count is 13 0b01101..Bus clock filter count is 14 0b01110..Bus clock filter count is 15 0b01111..Bus clock filter count is 16 0b10000..Bus clock filter count is 17 0b10001..Bus clock filter count is 18 0b10010..Bus clock filter count is 19 0b10011..Bus clock filter count is 20 0b10100..Bus clock filter count is 21 0b10101..Bus clock filter count is 22 0b10110..Bus clock filter count is 23 0b10111..Bus clock filter count is 24 0b11000..Bus clock filter count is 25 0b11001..Bus clock filter count is 26 0b11010..Bus clock filter count is 27 0b11011..Bus clock filter count is 28 0b11100..Bus clock filter count is 29 0b11101..Bus clock filter count is 30 0b11110..Bus clock filter count is 31 0b11111..Bus clock filter count is 32

RCM_RPFW_RSTFLTSEL [3/5]

#define RCM_RPFW_RSTFLTSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)

RSTFLTSEL - Reset Pin Filter Bus Clock Select 0b00000..Bus clock filter count is 1 0b00001..Bus clock filter count is 2 0b00010..Bus clock filter count is 3 0b00011..Bus clock filter count is 4 0b00100..Bus clock filter count is 5 0b00101..Bus clock filter count is 6 0b00110..Bus clock filter count is 7 0b00111..Bus clock filter count is 8 0b01000..Bus clock filter count is 9 0b01001..Bus clock filter count is 10 0b01010..Bus clock filter count is 11 0b01011..Bus clock filter count is 12 0b01100..Bus clock filter count is 13 0b01101..Bus clock filter count is 14 0b01110..Bus clock filter count is 15 0b01111..Bus clock filter count is 16 0b10000..Bus clock filter count is 17 0b10001..Bus clock filter count is 18 0b10010..Bus clock filter count is 19 0b10011..Bus clock filter count is 20 0b10100..Bus clock filter count is 21 0b10101..Bus clock filter count is 22 0b10110..Bus clock filter count is 23 0b10111..Bus clock filter count is 24 0b11000..Bus clock filter count is 25 0b11001..Bus clock filter count is 26 0b11010..Bus clock filter count is 27 0b11011..Bus clock filter count is 28 0b11100..Bus clock filter count is 29 0b11101..Bus clock filter count is 30 0b11110..Bus clock filter count is 31 0b11111..Bus clock filter count is 32

RCM_RPFW_RSTFLTSEL [4/5]

#define RCM_RPFW_RSTFLTSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)

RSTFLTSEL - Reset Pin Filter Bus Clock Select 0b00000..Bus clock filter count is 1 0b00001..Bus clock filter count is 2 0b00010..Bus clock filter count is 3 0b00011..Bus clock filter count is 4 0b00100..Bus clock filter count is 5 0b00101..Bus clock filter count is 6 0b00110..Bus clock filter count is 7 0b00111..Bus clock filter count is 8 0b01000..Bus clock filter count is 9 0b01001..Bus clock filter count is 10 0b01010..Bus clock filter count is 11 0b01011..Bus clock filter count is 12 0b01100..Bus clock filter count is 13 0b01101..Bus clock filter count is 14 0b01110..Bus clock filter count is 15 0b01111..Bus clock filter count is 16 0b10000..Bus clock filter count is 17 0b10001..Bus clock filter count is 18 0b10010..Bus clock filter count is 19 0b10011..Bus clock filter count is 20 0b10100..Bus clock filter count is 21 0b10101..Bus clock filter count is 22 0b10110..Bus clock filter count is 23 0b10111..Bus clock filter count is 24 0b11000..Bus clock filter count is 25 0b11001..Bus clock filter count is 26 0b11010..Bus clock filter count is 27 0b11011..Bus clock filter count is 28 0b11100..Bus clock filter count is 29 0b11101..Bus clock filter count is 30 0b11110..Bus clock filter count is 31 0b11111..Bus clock filter count is 32

RCM_RPFW_RSTFLTSEL [5/5]

#define RCM_RPFW_RSTFLTSEL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_RPFW_RSTFLTSEL_SHIFT)) & RCM_RPFW_RSTFLTSEL_MASK)

RSTFLTSEL - Reset Pin Filter Bus Clock Select 0b00000..Bus clock filter count is 1 0b00001..Bus clock filter count is 2 0b00010..Bus clock filter count is 3 0b00011..Bus clock filter count is 4 0b00100..Bus clock filter count is 5 0b00101..Bus clock filter count is 6 0b00110..Bus clock filter count is 7 0b00111..Bus clock filter count is 8 0b01000..Bus clock filter count is 9 0b01001..Bus clock filter count is 10 0b01010..Bus clock filter count is 11 0b01011..Bus clock filter count is 12 0b01100..Bus clock filter count is 13 0b01101..Bus clock filter count is 14 0b01110..Bus clock filter count is 15 0b01111..Bus clock filter count is 16 0b10000..Bus clock filter count is 17 0b10001..Bus clock filter count is 18 0b10010..Bus clock filter count is 19 0b10011..Bus clock filter count is 20 0b10100..Bus clock filter count is 21 0b10101..Bus clock filter count is 22 0b10110..Bus clock filter count is 23 0b10111..Bus clock filter count is 24 0b11000..Bus clock filter count is 25 0b11001..Bus clock filter count is 26 0b11010..Bus clock filter count is 27 0b11011..Bus clock filter count is 28 0b11100..Bus clock filter count is 29 0b11101..Bus clock filter count is 30 0b11110..Bus clock filter count is 31 0b11111..Bus clock filter count is 32

RCM_SRS0_LOC [1/5]

#define RCM_SRS0_LOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)

LOC - Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SRS0_LOC [2/5]

#define RCM_SRS0_LOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)

LOC - Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SRS0_LOC [3/5]

#define RCM_SRS0_LOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)

LOC - Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SRS0_LOC [4/5]

#define RCM_SRS0_LOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)

LOC - Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SRS0_LOC [5/5]

#define RCM_SRS0_LOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOC_SHIFT)) & RCM_SRS0_LOC_MASK)

LOC - Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SRS0_LOL [1/5]

#define RCM_SRS0_LOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)

LOL - Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SRS0_LOL [2/5]

#define RCM_SRS0_LOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)

LOL - Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SRS0_LOL [3/5]

#define RCM_SRS0_LOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)

LOL - Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SRS0_LOL [4/5]

#define RCM_SRS0_LOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)

LOL - Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SRS0_LOL [5/5]

#define RCM_SRS0_LOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LOL_SHIFT)) & RCM_SRS0_LOL_MASK)

LOL - Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SRS0_LVD [1/5]

#define RCM_SRS0_LVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)

LVD - Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SRS0_LVD [2/5]

#define RCM_SRS0_LVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)

LVD - Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SRS0_LVD [3/5]

#define RCM_SRS0_LVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)

LVD - Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SRS0_LVD [4/5]

#define RCM_SRS0_LVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)

LVD - Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SRS0_LVD [5/5]

#define RCM_SRS0_LVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_LVD_SHIFT)) & RCM_SRS0_LVD_MASK)

LVD - Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SRS0_PIN [1/5]

#define RCM_SRS0_PIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)

PIN - External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SRS0_PIN [2/5]

#define RCM_SRS0_PIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)

PIN - External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SRS0_PIN [3/5]

#define RCM_SRS0_PIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)

PIN - External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SRS0_PIN [4/5]

#define RCM_SRS0_PIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)

PIN - External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SRS0_PIN [5/5]

#define RCM_SRS0_PIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_PIN_SHIFT)) & RCM_SRS0_PIN_MASK)

PIN - External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SRS0_POR [1/5]

#define RCM_SRS0_POR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)

POR - Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SRS0_POR [2/5]

#define RCM_SRS0_POR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)

POR - Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SRS0_POR [3/5]

#define RCM_SRS0_POR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)

POR - Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SRS0_POR [4/5]

#define RCM_SRS0_POR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)

POR - Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SRS0_POR [5/5]

#define RCM_SRS0_POR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_POR_SHIFT)) & RCM_SRS0_POR_MASK)

POR - Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SRS0_WAKEUP [1/5]

#define RCM_SRS0_WAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)

WAKEUP - Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SRS0_WAKEUP [2/5]

#define RCM_SRS0_WAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)

WAKEUP - Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SRS0_WAKEUP [3/5]

#define RCM_SRS0_WAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)

WAKEUP - Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SRS0_WAKEUP [4/5]

#define RCM_SRS0_WAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)

WAKEUP - Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SRS0_WAKEUP [5/5]

#define RCM_SRS0_WAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WAKEUP_SHIFT)) & RCM_SRS0_WAKEUP_MASK)

WAKEUP - Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SRS0_WDOG [1/5]

#define RCM_SRS0_WDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)

WDOG - Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SRS0_WDOG [2/5]

#define RCM_SRS0_WDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)

WDOG - Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SRS0_WDOG [3/5]

#define RCM_SRS0_WDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)

WDOG - Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SRS0_WDOG [4/5]

#define RCM_SRS0_WDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)

WDOG - Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SRS0_WDOG [5/5]

#define RCM_SRS0_WDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS0_WDOG_SHIFT)) & RCM_SRS0_WDOG_MASK)

WDOG - Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SRS1_EZPT [1/4]

#define RCM_SRS1_EZPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)

EZPT - EzPort Reset 0b0..Reset not caused by EzPort receiving the RESET command while the device is in EzPort mode 0b1..Reset caused by EzPort receiving the RESET command while the device is in EzPort mode

RCM_SRS1_EZPT [2/4]

#define RCM_SRS1_EZPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)

EZPT - EzPort Reset 0b0..Reset not caused by EzPort receiving the RESET command while the device is in EzPort mode 0b1..Reset caused by EzPort receiving the RESET command while the device is in EzPort mode

RCM_SRS1_EZPT [3/4]

#define RCM_SRS1_EZPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)

EZPT - EzPort Reset 0b0..Reset not caused by EzPort receiving the RESET command while the device is in EzPort mode 0b1..Reset caused by EzPort receiving the RESET command while the device is in EzPort mode

RCM_SRS1_EZPT [4/4]

#define RCM_SRS1_EZPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_EZPT_SHIFT)) & RCM_SRS1_EZPT_MASK)

EZPT - EzPort Reset 0b0..Reset not caused by EzPort receiving the RESET command while the device is in EzPort mode 0b1..Reset caused by EzPort receiving the RESET command while the device is in EzPort mode

RCM_SRS1_JTAG [1/5]

#define RCM_SRS1_JTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)

JTAG - JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SRS1_JTAG [2/5]

#define RCM_SRS1_JTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)

JTAG - JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SRS1_JTAG [3/5]

#define RCM_SRS1_JTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)

JTAG - JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SRS1_JTAG [4/5]

#define RCM_SRS1_JTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)

JTAG - JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SRS1_JTAG [5/5]

#define RCM_SRS1_JTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_JTAG_SHIFT)) & RCM_SRS1_JTAG_MASK)

JTAG - JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SRS1_LOCKUP [1/5]

#define RCM_SRS1_LOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)

LOCKUP - Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SRS1_LOCKUP [2/5]

#define RCM_SRS1_LOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)

LOCKUP - Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SRS1_LOCKUP [3/5]

#define RCM_SRS1_LOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)

LOCKUP - Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SRS1_LOCKUP [4/5]

#define RCM_SRS1_LOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)

LOCKUP - Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SRS1_LOCKUP [5/5]

#define RCM_SRS1_LOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_LOCKUP_SHIFT)) & RCM_SRS1_LOCKUP_MASK)

LOCKUP - Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SRS1_MDM_AP [1/5]

#define RCM_SRS1_MDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)

MDM_AP - MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SRS1_MDM_AP [2/5]

#define RCM_SRS1_MDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)

MDM_AP - MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SRS1_MDM_AP [3/5]

#define RCM_SRS1_MDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)

MDM_AP - MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SRS1_MDM_AP [4/5]

#define RCM_SRS1_MDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)

MDM_AP - MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SRS1_MDM_AP [5/5]

#define RCM_SRS1_MDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_MDM_AP_SHIFT)) & RCM_SRS1_MDM_AP_MASK)

MDM_AP - MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SRS1_SACKERR [1/5]

#define RCM_SRS1_SACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)

SACKERR - Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SRS1_SACKERR [2/5]

#define RCM_SRS1_SACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)

SACKERR - Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SRS1_SACKERR [3/5]

#define RCM_SRS1_SACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)

SACKERR - Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SRS1_SACKERR [4/5]

#define RCM_SRS1_SACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)

SACKERR - Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SRS1_SACKERR [5/5]

#define RCM_SRS1_SACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SACKERR_SHIFT)) & RCM_SRS1_SACKERR_MASK)

SACKERR - Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SRS1_SW [1/5]

#define RCM_SRS1_SW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)

SW - Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit

RCM_SRS1_SW [2/5]

#define RCM_SRS1_SW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)

SW - Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit

RCM_SRS1_SW [3/5]

#define RCM_SRS1_SW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)

SW - Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit

RCM_SRS1_SW [4/5]

#define RCM_SRS1_SW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)

SW - Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit

RCM_SRS1_SW [5/5]

#define RCM_SRS1_SW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SRS1_SW_SHIFT)) & RCM_SRS1_SW_MASK)

SW - Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit

RCM_SSRS0_SLOC [1/3]

#define RCM_SSRS0_SLOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOC_SHIFT)) & RCM_SSRS0_SLOC_MASK)

SLOC - Sticky Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SSRS0_SLOC [2/3]

#define RCM_SSRS0_SLOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOC_SHIFT)) & RCM_SSRS0_SLOC_MASK)

SLOC - Sticky Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SSRS0_SLOC [3/3]

#define RCM_SSRS0_SLOC

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOC_SHIFT)) & RCM_SSRS0_SLOC_MASK)

SLOC - Sticky Loss-of-Clock Reset 0b0..Reset not caused by a loss of external clock. 0b1..Reset caused by a loss of external clock.

RCM_SSRS0_SLOL [1/3]

#define RCM_SSRS0_SLOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOL_SHIFT)) & RCM_SSRS0_SLOL_MASK)

SLOL - Sticky Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SSRS0_SLOL [2/3]

#define RCM_SSRS0_SLOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOL_SHIFT)) & RCM_SSRS0_SLOL_MASK)

SLOL - Sticky Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SSRS0_SLOL [3/3]

#define RCM_SSRS0_SLOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLOL_SHIFT)) & RCM_SSRS0_SLOL_MASK)

SLOL - Sticky Loss-of-Lock Reset 0b0..Reset not caused by a loss of lock in the PLL 0b1..Reset caused by a loss of lock in the PLL

RCM_SSRS0_SLVD [1/3]

#define RCM_SSRS0_SLVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLVD_SHIFT)) & RCM_SSRS0_SLVD_MASK)

SLVD - Sticky Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SSRS0_SLVD [2/3]

#define RCM_SSRS0_SLVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLVD_SHIFT)) & RCM_SSRS0_SLVD_MASK)

SLVD - Sticky Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SSRS0_SLVD [3/3]

#define RCM_SSRS0_SLVD

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SLVD_SHIFT)) & RCM_SSRS0_SLVD_MASK)

SLVD - Sticky Low-Voltage Detect Reset 0b0..Reset not caused by LVD trip or POR 0b1..Reset caused by LVD trip or POR

RCM_SSRS0_SPIN [1/3]

#define RCM_SSRS0_SPIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPIN_SHIFT)) & RCM_SSRS0_SPIN_MASK)

SPIN - Sticky External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SSRS0_SPIN [2/3]

#define RCM_SSRS0_SPIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPIN_SHIFT)) & RCM_SSRS0_SPIN_MASK)

SPIN - Sticky External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SSRS0_SPIN [3/3]

#define RCM_SSRS0_SPIN

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPIN_SHIFT)) & RCM_SSRS0_SPIN_MASK)

SPIN - Sticky External Reset Pin 0b0..Reset not caused by external reset pin 0b1..Reset caused by external reset pin

RCM_SSRS0_SPOR [1/3]

#define RCM_SSRS0_SPOR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPOR_SHIFT)) & RCM_SSRS0_SPOR_MASK)

SPOR - Sticky Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SSRS0_SPOR [2/3]

#define RCM_SSRS0_SPOR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPOR_SHIFT)) & RCM_SSRS0_SPOR_MASK)

SPOR - Sticky Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SSRS0_SPOR [3/3]

#define RCM_SSRS0_SPOR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SPOR_SHIFT)) & RCM_SSRS0_SPOR_MASK)

SPOR - Sticky Power-On Reset 0b0..Reset not caused by POR 0b1..Reset caused by POR

RCM_SSRS0_SWAKEUP [1/3]

#define RCM_SSRS0_SWAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWAKEUP_SHIFT)) & RCM_SSRS0_SWAKEUP_MASK)

SWAKEUP - Sticky Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SSRS0_SWAKEUP [2/3]

#define RCM_SSRS0_SWAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWAKEUP_SHIFT)) & RCM_SSRS0_SWAKEUP_MASK)

SWAKEUP - Sticky Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SSRS0_SWAKEUP [3/3]

#define RCM_SSRS0_SWAKEUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWAKEUP_SHIFT)) & RCM_SSRS0_SWAKEUP_MASK)

SWAKEUP - Sticky Low Leakage Wakeup Reset 0b0..Reset not caused by LLWU module wakeup source 0b1..Reset caused by LLWU module wakeup source

RCM_SSRS0_SWDOG [1/3]

#define RCM_SSRS0_SWDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWDOG_SHIFT)) & RCM_SSRS0_SWDOG_MASK)

SWDOG - Sticky Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SSRS0_SWDOG [2/3]

#define RCM_SSRS0_SWDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWDOG_SHIFT)) & RCM_SSRS0_SWDOG_MASK)

SWDOG - Sticky Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SSRS0_SWDOG [3/3]

#define RCM_SSRS0_SWDOG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS0_SWDOG_SHIFT)) & RCM_SSRS0_SWDOG_MASK)

SWDOG - Sticky Watchdog 0b0..Reset not caused by watchdog timeout 0b1..Reset caused by watchdog timeout

RCM_SSRS1_SEZPT [1/2]

#define RCM_SSRS1_SEZPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SEZPT_SHIFT)) & RCM_SSRS1_SEZPT_MASK)

SEZPT - Sticky EzPort Reset 0b0..Reset not caused by EzPort receiving the RESET command while the device is in EzPort mode 0b1..Reset caused by EzPort receiving the RESET command while the device is in EzPort mode

RCM_SSRS1_SEZPT [2/2]

#define RCM_SSRS1_SEZPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SEZPT_SHIFT)) & RCM_SSRS1_SEZPT_MASK)

SEZPT - Sticky EzPort Reset 0b0..Reset not caused by EzPort receiving the RESET command while the device is in EzPort mode 0b1..Reset caused by EzPort receiving the RESET command while the device is in EzPort mode

RCM_SSRS1_SJTAG [1/3]

#define RCM_SSRS1_SJTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SJTAG_SHIFT)) & RCM_SSRS1_SJTAG_MASK)

SJTAG - Sticky JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SSRS1_SJTAG [2/3]

#define RCM_SSRS1_SJTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SJTAG_SHIFT)) & RCM_SSRS1_SJTAG_MASK)

SJTAG - Sticky JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SSRS1_SJTAG [3/3]

#define RCM_SSRS1_SJTAG

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SJTAG_SHIFT)) & RCM_SSRS1_SJTAG_MASK)

SJTAG - Sticky JTAG Generated Reset 0b0..Reset not caused by JTAG 0b1..Reset caused by JTAG

RCM_SSRS1_SLOCKUP [1/3]

#define RCM_SSRS1_SLOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SLOCKUP_SHIFT)) & RCM_SSRS1_SLOCKUP_MASK)

SLOCKUP - Sticky Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SSRS1_SLOCKUP [2/3]

#define RCM_SSRS1_SLOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SLOCKUP_SHIFT)) & RCM_SSRS1_SLOCKUP_MASK)

SLOCKUP - Sticky Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SSRS1_SLOCKUP [3/3]

#define RCM_SSRS1_SLOCKUP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SLOCKUP_SHIFT)) & RCM_SSRS1_SLOCKUP_MASK)

SLOCKUP - Sticky Core Lockup 0b0..Reset not caused by core LOCKUP event 0b1..Reset caused by core LOCKUP event

RCM_SSRS1_SMDM_AP [1/3]

#define RCM_SSRS1_SMDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SMDM_AP_SHIFT)) & RCM_SSRS1_SMDM_AP_MASK)

SMDM_AP - Sticky MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SSRS1_SMDM_AP [2/3]

#define RCM_SSRS1_SMDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SMDM_AP_SHIFT)) & RCM_SSRS1_SMDM_AP_MASK)

SMDM_AP - Sticky MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SSRS1_SMDM_AP [3/3]

#define RCM_SSRS1_SMDM_AP

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SMDM_AP_SHIFT)) & RCM_SSRS1_SMDM_AP_MASK)

SMDM_AP - Sticky MDM-AP System Reset Request 0b0..Reset not caused by host debugger system setting of the System Reset Request bit 0b1..Reset caused by host debugger system setting of the System Reset Request bit

RCM_SSRS1_SSACKERR [1/3]

#define RCM_SSRS1_SSACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSACKERR_SHIFT)) & RCM_SSRS1_SSACKERR_MASK)

SSACKERR - Sticky Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SSRS1_SSACKERR [2/3]

#define RCM_SSRS1_SSACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSACKERR_SHIFT)) & RCM_SSRS1_SSACKERR_MASK)

SSACKERR - Sticky Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SSRS1_SSACKERR [3/3]

#define RCM_SSRS1_SSACKERR

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSACKERR_SHIFT)) & RCM_SSRS1_SSACKERR_MASK)

SSACKERR - Sticky Stop Mode Acknowledge Error Reset 0b0..Reset not caused by peripheral failure to acknowledge attempt to enter stop mode 0b1..Reset caused by peripheral failure to acknowledge attempt to enter stop mode

RCM_SSRS1_SSW [1/3]

#define RCM_SSRS1_SSW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSW_SHIFT)) & RCM_SSRS1_SSW_MASK)

SSW - Sticky Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit

RCM_SSRS1_SSW [2/3]

#define RCM_SSRS1_SSW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSW_SHIFT)) & RCM_SSRS1_SSW_MASK)

SSW - Sticky Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit

RCM_SSRS1_SSW [3/3]

#define RCM_SSRS1_SSW

(

x

)

(((uint8_t)(((uint8_t)(x)) << RCM_SSRS1_SSW_SHIFT)) & RCM_SSRS1_SSW_MASK)

SSW - Sticky Software 0b0..Reset not caused by software setting of SYSRESETREQ bit 0b1..Reset caused by software setting of SYSRESETREQ bit