mikroSDK Reference Manual
Macros
SMC Register Masks
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Macros

#define SMC_BASE   (0x4007E000u)
 
#define SMC   ((SMC_Type *)SMC_BASE)
 
#define SMC_BASE_ADDRS   { SMC_BASE }
 
#define SMC_BASE_PTRS   { SMC }
 

PMPROT - Power Mode Protection register

#define SMC_PMPROT_AVLLS_MASK   (0x2U)
 
#define SMC_PMPROT_AVLLS_SHIFT   (1U)
 
#define SMC_PMPROT_AVLLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)
 
#define SMC_PMPROT_AVLP_MASK   (0x20U)
 
#define SMC_PMPROT_AVLP_SHIFT   (5U)
 
#define SMC_PMPROT_AVLP(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)
 
#define SMC_PMPROT_AVLLS_MASK   (0x2U)
 
#define SMC_PMPROT_AVLLS_SHIFT   (1U)
 
#define SMC_PMPROT_AVLLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)
 
#define SMC_PMPROT_AVLP_MASK   (0x20U)
 
#define SMC_PMPROT_AVLP_SHIFT   (5U)
 
#define SMC_PMPROT_AVLP(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)
 
#define SMC_PMPROT_AVLLS_MASK   (0x2U)
 
#define SMC_PMPROT_AVLLS_SHIFT   (1U)
 
#define SMC_PMPROT_AVLLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)
 
#define SMC_PMPROT_AVLP_MASK   (0x20U)
 
#define SMC_PMPROT_AVLP_SHIFT   (5U)
 
#define SMC_PMPROT_AVLP(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)
 
#define SMC_PMPROT_AHSRUN_MASK   (0x80U)
 
#define SMC_PMPROT_AHSRUN_SHIFT   (7U)
 
#define SMC_PMPROT_AHSRUN(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AHSRUN_SHIFT)) & SMC_PMPROT_AHSRUN_MASK)
 
#define SMC_PMPROT_AVLLS_MASK   (0x2U)
 
#define SMC_PMPROT_AVLLS_SHIFT   (1U)
 
#define SMC_PMPROT_AVLLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)
 
#define SMC_PMPROT_AVLP_MASK   (0x20U)
 
#define SMC_PMPROT_AVLP_SHIFT   (5U)
 
#define SMC_PMPROT_AVLP(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)
 
#define SMC_PMPROT_AHSRUN_MASK   (0x80U)
 
#define SMC_PMPROT_AHSRUN_SHIFT   (7U)
 
#define SMC_PMPROT_AHSRUN(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AHSRUN_SHIFT)) & SMC_PMPROT_AHSRUN_MASK)
 
#define SMC_PMPROT_AVLLS_MASK   (0x2U)
 
#define SMC_PMPROT_AVLLS_SHIFT   (1U)
 
#define SMC_PMPROT_AVLLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)
 
#define SMC_PMPROT_AVLP_MASK   (0x20U)
 
#define SMC_PMPROT_AVLP_SHIFT   (5U)
 
#define SMC_PMPROT_AVLP(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)
 
#define SMC_PMPROT_AHSRUN_MASK   (0x80U)
 
#define SMC_PMPROT_AHSRUN_SHIFT   (7U)
 
#define SMC_PMPROT_AHSRUN(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AHSRUN_SHIFT)) & SMC_PMPROT_AHSRUN_MASK)
 

PMPROT - Power Mode Protection register

#define SMC_PMPROT_ALLS_MASK   (0x8U)
 
#define SMC_PMPROT_ALLS_SHIFT   (3U)
 
#define SMC_PMPROT_ALLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)
 
#define SMC_PMPROT_ALLS_MASK   (0x8U)
 
#define SMC_PMPROT_ALLS_SHIFT   (3U)
 
#define SMC_PMPROT_ALLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)
 
#define SMC_PMPROT_ALLS_MASK   (0x8U)
 
#define SMC_PMPROT_ALLS_SHIFT   (3U)
 
#define SMC_PMPROT_ALLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)
 
#define SMC_PMPROT_ALLS_MASK   (0x8U)
 
#define SMC_PMPROT_ALLS_SHIFT   (3U)
 
#define SMC_PMPROT_ALLS(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)
 

PMCTRL - Power Mode Control register

#define SMC_PMCTRL_STOPM_MASK   (0x7U)
 
#define SMC_PMCTRL_STOPM_SHIFT   (0U)
 
#define SMC_PMCTRL_STOPM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)
 
#define SMC_PMCTRL_STOPA_MASK   (0x8U)
 
#define SMC_PMCTRL_STOPA_SHIFT   (3U)
 
#define SMC_PMCTRL_STOPA(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)
 
#define SMC_PMCTRL_RUNM_MASK   (0x60U)
 
#define SMC_PMCTRL_RUNM_SHIFT   (5U)
 
#define SMC_PMCTRL_RUNM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)
 
#define SMC_PMCTRL_STOPM_MASK   (0x7U)
 
#define SMC_PMCTRL_STOPM_SHIFT   (0U)
 
#define SMC_PMCTRL_STOPM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)
 
#define SMC_PMCTRL_STOPA_MASK   (0x8U)
 
#define SMC_PMCTRL_STOPA_SHIFT   (3U)
 
#define SMC_PMCTRL_STOPA(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)
 
#define SMC_PMCTRL_RUNM_MASK   (0x60U)
 
#define SMC_PMCTRL_RUNM_SHIFT   (5U)
 
#define SMC_PMCTRL_RUNM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)
 
#define SMC_PMCTRL_STOPM_MASK   (0x7U)
 
#define SMC_PMCTRL_STOPM_SHIFT   (0U)
 
#define SMC_PMCTRL_STOPM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)
 
#define SMC_PMCTRL_STOPA_MASK   (0x8U)
 
#define SMC_PMCTRL_STOPA_SHIFT   (3U)
 
#define SMC_PMCTRL_STOPA(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)
 
#define SMC_PMCTRL_RUNM_MASK   (0x60U)
 
#define SMC_PMCTRL_RUNM_SHIFT   (5U)
 
#define SMC_PMCTRL_RUNM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)
 
#define SMC_PMCTRL_STOPM_MASK   (0x7U)
 
#define SMC_PMCTRL_STOPM_SHIFT   (0U)
 
#define SMC_PMCTRL_STOPM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)
 
#define SMC_PMCTRL_STOPA_MASK   (0x8U)
 
#define SMC_PMCTRL_STOPA_SHIFT   (3U)
 
#define SMC_PMCTRL_STOPA(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)
 
#define SMC_PMCTRL_RUNM_MASK   (0x60U)
 
#define SMC_PMCTRL_RUNM_SHIFT   (5U)
 
#define SMC_PMCTRL_RUNM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)
 
#define SMC_PMCTRL_STOPM_MASK   (0x7U)
 
#define SMC_PMCTRL_STOPM_SHIFT   (0U)
 
#define SMC_PMCTRL_STOPM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)
 
#define SMC_PMCTRL_STOPA_MASK   (0x8U)
 
#define SMC_PMCTRL_STOPA_SHIFT   (3U)
 
#define SMC_PMCTRL_STOPA(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)
 
#define SMC_PMCTRL_RUNM_MASK   (0x60U)
 
#define SMC_PMCTRL_RUNM_SHIFT   (5U)
 
#define SMC_PMCTRL_RUNM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)
 

PMCTRL - Power Mode Control register

#define SMC_PMCTRL_LPWUI_MASK   (0x80U)
 
#define SMC_PMCTRL_LPWUI_SHIFT   (7U)
 
#define SMC_PMCTRL_LPWUI(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_LPWUI_SHIFT)) & SMC_PMCTRL_LPWUI_MASK)
 
#define SMC_PMCTRL_LPWUI_MASK   (0x80U)
 
#define SMC_PMCTRL_LPWUI_SHIFT   (7U)
 
#define SMC_PMCTRL_LPWUI(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_LPWUI_SHIFT)) & SMC_PMCTRL_LPWUI_MASK)
 

VLLSCTRL - VLLS Control register

#define SMC_VLLSCTRL_VLLSM_MASK   (0x7U)
 
#define SMC_VLLSCTRL_VLLSM_SHIFT   (0U)
 
#define SMC_VLLSCTRL_VLLSM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_VLLSCTRL_VLLSM_SHIFT)) & SMC_VLLSCTRL_VLLSM_MASK)
 
#define SMC_VLLSCTRL_VLLSM_MASK   (0x7U)
 
#define SMC_VLLSCTRL_VLLSM_SHIFT   (0U)
 
#define SMC_VLLSCTRL_VLLSM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_VLLSCTRL_VLLSM_SHIFT)) & SMC_VLLSCTRL_VLLSM_MASK)
 
#define SMC_VLLSCTRL_PORPO_MASK   (0x20U)
 
#define SMC_VLLSCTRL_PORPO_SHIFT   (5U)
 
#define SMC_VLLSCTRL_PORPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_VLLSCTRL_PORPO_SHIFT)) & SMC_VLLSCTRL_PORPO_MASK)
 

VLLSCTRL - VLLS Control register

#define SMC_VLLSCTRL_RAM2PO_MASK   (0x10U)
 
#define SMC_VLLSCTRL_RAM2PO_SHIFT   (4U)
 
#define SMC_VLLSCTRL_RAM2PO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_VLLSCTRL_RAM2PO_SHIFT)) & SMC_VLLSCTRL_RAM2PO_MASK)
 

PMSTAT - Power Mode Status register

#define SMC_PMSTAT_PMSTAT_MASK   (0x7FU)
 
#define SMC_PMSTAT_PMSTAT_SHIFT   (0U)
 
#define SMC_PMSTAT_PMSTAT(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMSTAT_PMSTAT_SHIFT)) & SMC_PMSTAT_PMSTAT_MASK)
 
#define SMC_PMSTAT_PMSTAT_MASK   (0x7FU)
 
#define SMC_PMSTAT_PMSTAT_SHIFT   (0U)
 
#define SMC_PMSTAT_PMSTAT(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMSTAT_PMSTAT_SHIFT)) & SMC_PMSTAT_PMSTAT_MASK)
 
#define SMC_PMSTAT_PMSTAT_MASK   (0xFFU)
 
#define SMC_PMSTAT_PMSTAT_SHIFT   (0U)
 
#define SMC_PMSTAT_PMSTAT(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMSTAT_PMSTAT_SHIFT)) & SMC_PMSTAT_PMSTAT_MASK)
 
#define SMC_PMSTAT_PMSTAT_MASK   (0xFFU)
 
#define SMC_PMSTAT_PMSTAT_SHIFT   (0U)
 
#define SMC_PMSTAT_PMSTAT(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMSTAT_PMSTAT_SHIFT)) & SMC_PMSTAT_PMSTAT_MASK)
 
#define SMC_PMSTAT_PMSTAT_MASK   (0xFFU)
 
#define SMC_PMSTAT_PMSTAT_SHIFT   (0U)
 
#define SMC_PMSTAT_PMSTAT(x)   (((uint8_t)(((uint8_t)(x)) << SMC_PMSTAT_PMSTAT_SHIFT)) & SMC_PMSTAT_PMSTAT_MASK)
 

STOPCTRL - Stop Control Register

#define SMC_STOPCTRL_LLSM_MASK   (0x7U)
 
#define SMC_STOPCTRL_LLSM_SHIFT   (0U)
 
#define SMC_STOPCTRL_LLSM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_LLSM_SHIFT)) & SMC_STOPCTRL_LLSM_MASK)
 
#define SMC_STOPCTRL_LLSM_MASK   (0x7U)
 
#define SMC_STOPCTRL_LLSM_SHIFT   (0U)
 
#define SMC_STOPCTRL_LLSM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_LLSM_SHIFT)) & SMC_STOPCTRL_LLSM_MASK)
 

STOPCTRL - Stop Control Register

#define SMC_STOPCTRL_RAM2PO_MASK   (0x10U)
 
#define SMC_STOPCTRL_RAM2PO_SHIFT   (4U)
 
#define SMC_STOPCTRL_RAM2PO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_RAM2PO_SHIFT)) & SMC_STOPCTRL_RAM2PO_MASK)
 
#define SMC_STOPCTRL_PORPO_MASK   (0x20U)
 
#define SMC_STOPCTRL_PORPO_SHIFT   (5U)
 
#define SMC_STOPCTRL_PORPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PORPO_SHIFT)) & SMC_STOPCTRL_PORPO_MASK)
 
#define SMC_STOPCTRL_PSTOPO_MASK   (0xC0U)
 
#define SMC_STOPCTRL_PSTOPO_SHIFT   (6U)
 
#define SMC_STOPCTRL_PSTOPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PSTOPO_SHIFT)) & SMC_STOPCTRL_PSTOPO_MASK)
 
#define SMC_STOPCTRL_RAM2PO_MASK   (0x10U)
 
#define SMC_STOPCTRL_RAM2PO_SHIFT   (4U)
 
#define SMC_STOPCTRL_RAM2PO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_RAM2PO_SHIFT)) & SMC_STOPCTRL_RAM2PO_MASK)
 
#define SMC_STOPCTRL_PORPO_MASK   (0x20U)
 
#define SMC_STOPCTRL_PORPO_SHIFT   (5U)
 
#define SMC_STOPCTRL_PORPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PORPO_SHIFT)) & SMC_STOPCTRL_PORPO_MASK)
 
#define SMC_STOPCTRL_PSTOPO_MASK   (0xC0U)
 
#define SMC_STOPCTRL_PSTOPO_SHIFT   (6U)
 
#define SMC_STOPCTRL_PSTOPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PSTOPO_SHIFT)) & SMC_STOPCTRL_PSTOPO_MASK)
 
#define SMC_STOPCTRL_VLLSM_MASK   (0x7U)
 
#define SMC_STOPCTRL_VLLSM_SHIFT   (0U)
 
#define SMC_STOPCTRL_VLLSM(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_VLLSM_SHIFT)) & SMC_STOPCTRL_VLLSM_MASK)
 
#define SMC_STOPCTRL_LPOPO_MASK   (0x8U)
 
#define SMC_STOPCTRL_LPOPO_SHIFT   (3U)
 
#define SMC_STOPCTRL_LPOPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_LPOPO_SHIFT)) & SMC_STOPCTRL_LPOPO_MASK)
 
#define SMC_STOPCTRL_RAM2PO_MASK   (0x10U)
 
#define SMC_STOPCTRL_RAM2PO_SHIFT   (4U)
 
#define SMC_STOPCTRL_RAM2PO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_RAM2PO_SHIFT)) & SMC_STOPCTRL_RAM2PO_MASK)
 
#define SMC_STOPCTRL_PORPO_MASK   (0x20U)
 
#define SMC_STOPCTRL_PORPO_SHIFT   (5U)
 
#define SMC_STOPCTRL_PORPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PORPO_SHIFT)) & SMC_STOPCTRL_PORPO_MASK)
 
#define SMC_STOPCTRL_PSTOPO_MASK   (0xC0U)
 
#define SMC_STOPCTRL_PSTOPO_SHIFT   (6U)
 
#define SMC_STOPCTRL_PSTOPO(x)   (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PSTOPO_SHIFT)) & SMC_STOPCTRL_PSTOPO_MASK)
 

Macro Definition Documentation

◆ SMC

#define SMC   ((SMC_Type *)SMC_BASE)

Peripheral SMC base pointer

◆ SMC_BASE

#define SMC_BASE   (0x4007E000u)

Peripheral SMC base address

◆ SMC_BASE_ADDRS

#define SMC_BASE_ADDRS   { SMC_BASE }

Array initializer of SMC peripheral base addresses

◆ SMC_BASE_PTRS

#define SMC_BASE_PTRS   { SMC }

Array initializer of SMC peripheral base pointers

◆ SMC_PMCTRL_LPWUI [1/2]

#define SMC_PMCTRL_LPWUI ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_LPWUI_SHIFT)) & SMC_PMCTRL_LPWUI_MASK)

LPWUI - Low-Power Wake Up On Interrupt 0b0..The system remains in a VLP mode on an interrupt 0b1..The system exits to Normal RUN mode on an interrupt

◆ SMC_PMCTRL_LPWUI [2/2]

#define SMC_PMCTRL_LPWUI ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_LPWUI_SHIFT)) & SMC_PMCTRL_LPWUI_MASK)

LPWUI - Low-Power Wake Up On Interrupt 0b0..The system remains in a VLP mode on an interrupt 0b1..The system exits to Normal RUN mode on an interrupt

◆ SMC_PMCTRL_RUNM [1/5]

#define SMC_PMCTRL_RUNM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)

RUNM - Run Mode Control 0b00..Normal Run mode (RUN) 0b01..Reserved 0b10..Very-Low-Power Run mode (VLPR) 0b11..Reserved

RUNM - Run Mode Control 0b00..Normal Run mode (RUN) 0b01..Reserved 0b10..Very-Low-Power Run mode (VLPR) 0b11..High Speed Run mode (HSRUN)

◆ SMC_PMCTRL_RUNM [2/5]

#define SMC_PMCTRL_RUNM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)

RUNM - Run Mode Control 0b00..Normal Run mode (RUN) 0b01..Reserved 0b10..Very-Low-Power Run mode (VLPR) 0b11..Reserved

RUNM - Run Mode Control 0b00..Normal Run mode (RUN) 0b01..Reserved 0b10..Very-Low-Power Run mode (VLPR) 0b11..High Speed Run mode (HSRUN)

◆ SMC_PMCTRL_RUNM [3/5]

#define SMC_PMCTRL_RUNM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)

RUNM - Run Mode Control 0b00..Normal Run mode (RUN) 0b01..Reserved 0b10..Very-Low-Power Run mode (VLPR) 0b11..High Speed Run mode (HSRUN)

◆ SMC_PMCTRL_RUNM [4/5]

#define SMC_PMCTRL_RUNM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)

RUNM - Run Mode Control 0b00..Normal Run mode (RUN) 0b01..Reserved 0b10..Very-Low-Power Run mode (VLPR) 0b11..High Speed Run mode (HSRUN)

◆ SMC_PMCTRL_RUNM [5/5]

#define SMC_PMCTRL_RUNM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_RUNM_SHIFT)) & SMC_PMCTRL_RUNM_MASK)

RUNM - Run Mode Control 0b00..Normal Run mode (RUN) 0b01..Reserved 0b10..Very-Low-Power Run mode (VLPR) 0b11..High Speed Run mode (HSRUN)

◆ SMC_PMCTRL_STOPA [1/5]

#define SMC_PMCTRL_STOPA ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)

STOPA - Stop Aborted 0b0..The previous stop mode entry was successsful. 0b1..The previous stop mode entry was aborted.

STOPA - Stop Aborted 0b0..The previous stop mode entry was successful. 0b1..The previous stop mode entry was aborted.

◆ SMC_PMCTRL_STOPA [2/5]

#define SMC_PMCTRL_STOPA ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)

STOPA - Stop Aborted 0b0..The previous stop mode entry was successsful. 0b1..The previous stop mode entry was aborted.

STOPA - Stop Aborted 0b0..The previous stop mode entry was successful. 0b1..The previous stop mode entry was aborted.

◆ SMC_PMCTRL_STOPA [3/5]

#define SMC_PMCTRL_STOPA ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)

STOPA - Stop Aborted 0b0..The previous stop mode entry was successsful. 0b1..The previous stop mode entry was aborted.

STOPA - Stop Aborted 0b0..The previous stop mode entry was successful. 0b1..The previous stop mode entry was aborted.

◆ SMC_PMCTRL_STOPA [4/5]

#define SMC_PMCTRL_STOPA ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)

STOPA - Stop Aborted 0b0..The previous stop mode entry was successsful. 0b1..The previous stop mode entry was aborted.

STOPA - Stop Aborted 0b0..The previous stop mode entry was successful. 0b1..The previous stop mode entry was aborted.

◆ SMC_PMCTRL_STOPA [5/5]

#define SMC_PMCTRL_STOPA ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPA_SHIFT)) & SMC_PMCTRL_STOPA_MASK)

STOPA - Stop Aborted 0b0..The previous stop mode entry was successful. 0b1..The previous stop mode entry was aborted.

◆ SMC_PMCTRL_STOPM [1/5]

#define SMC_PMCTRL_STOPM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Low-Leakage Stop (LLS) 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Low-Leakage Stop (LLSx) 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Reserved 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

◆ SMC_PMCTRL_STOPM [2/5]

#define SMC_PMCTRL_STOPM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Low-Leakage Stop (LLS) 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Low-Leakage Stop (LLSx) 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Reserved 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

◆ SMC_PMCTRL_STOPM [3/5]

#define SMC_PMCTRL_STOPM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Low-Leakage Stop (LLSx) 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Reserved 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

◆ SMC_PMCTRL_STOPM [4/5]

#define SMC_PMCTRL_STOPM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Low-Leakage Stop (LLSx) 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Reserved 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

◆ SMC_PMCTRL_STOPM [5/5]

#define SMC_PMCTRL_STOPM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMCTRL_STOPM_SHIFT)) & SMC_PMCTRL_STOPM_MASK)

STOPM - Stop Mode Control 0b000..Normal Stop (STOP) 0b001..Reserved 0b010..Very-Low-Power Stop (VLPS) 0b011..Reserved 0b100..Very-Low-Leakage Stop (VLLSx) 0b101..Reserved 0b110..Reseved 0b111..Reserved

◆ SMC_PMPROT_AHSRUN [1/3]

#define SMC_PMPROT_AHSRUN ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AHSRUN_SHIFT)) & SMC_PMPROT_AHSRUN_MASK)

AHSRUN - Allow High Speed Run mode 0b0..HSRUN is not allowed 0b1..HSRUN is allowed

◆ SMC_PMPROT_AHSRUN [2/3]

#define SMC_PMPROT_AHSRUN ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AHSRUN_SHIFT)) & SMC_PMPROT_AHSRUN_MASK)

AHSRUN - Allow High Speed Run mode 0b0..HSRUN is not allowed 0b1..HSRUN is allowed

◆ SMC_PMPROT_AHSRUN [3/3]

#define SMC_PMPROT_AHSRUN ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AHSRUN_SHIFT)) & SMC_PMPROT_AHSRUN_MASK)

AHSRUN - Allow High Speed Run mode 0b0..HSRUN is not allowed 0b1..HSRUN is allowed

◆ SMC_PMPROT_ALLS [1/4]

#define SMC_PMPROT_ALLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)

ALLS - Allow Low-Leakage Stop Mode 0b0..LLS is not allowed 0b1..LLS is allowed

ALLS - Allow Low-Leakage Stop Mode 0b0..Any LLSx mode is not allowed 0b1..Any LLSx mode is allowed

◆ SMC_PMPROT_ALLS [2/4]

#define SMC_PMPROT_ALLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)

ALLS - Allow Low-Leakage Stop Mode 0b0..LLS is not allowed 0b1..LLS is allowed

ALLS - Allow Low-Leakage Stop Mode 0b0..Any LLSx mode is not allowed 0b1..Any LLSx mode is allowed

◆ SMC_PMPROT_ALLS [3/4]

#define SMC_PMPROT_ALLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)

ALLS - Allow Low-Leakage Stop Mode 0b0..Any LLSx mode is not allowed 0b1..Any LLSx mode is allowed

◆ SMC_PMPROT_ALLS [4/4]

#define SMC_PMPROT_ALLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_ALLS_SHIFT)) & SMC_PMPROT_ALLS_MASK)

ALLS - Allow Low-Leakage Stop Mode 0b0..Any LLSx mode is not allowed 0b1..Any LLSx mode is allowed

◆ SMC_PMPROT_AVLLS [1/5]

#define SMC_PMPROT_AVLLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)

AVLLS - Allow Very-Low-Leakage Stop Mode 0b0..Any VLLSx mode is not allowed 0b1..Any VLLSx mode is allowed

◆ SMC_PMPROT_AVLLS [2/5]

#define SMC_PMPROT_AVLLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)

AVLLS - Allow Very-Low-Leakage Stop Mode 0b0..Any VLLSx mode is not allowed 0b1..Any VLLSx mode is allowed

◆ SMC_PMPROT_AVLLS [3/5]

#define SMC_PMPROT_AVLLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)

AVLLS - Allow Very-Low-Leakage Stop Mode 0b0..Any VLLSx mode is not allowed 0b1..Any VLLSx mode is allowed

◆ SMC_PMPROT_AVLLS [4/5]

#define SMC_PMPROT_AVLLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)

AVLLS - Allow Very-Low-Leakage Stop Mode 0b0..Any VLLSx mode is not allowed 0b1..Any VLLSx mode is allowed

◆ SMC_PMPROT_AVLLS [5/5]

#define SMC_PMPROT_AVLLS ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLLS_SHIFT)) & SMC_PMPROT_AVLLS_MASK)

AVLLS - Allow Very-Low-Leakage Stop Mode 0b0..Any VLLSx mode is not allowed 0b1..Any VLLSx mode is allowed

◆ SMC_PMPROT_AVLP [1/5]

#define SMC_PMPROT_AVLP ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)

AVLP - Allow Very-Low-Power Modes 0b0..VLPR, VLPW, and VLPS are not allowed. 0b1..VLPR, VLPW, and VLPS are allowed.

◆ SMC_PMPROT_AVLP [2/5]

#define SMC_PMPROT_AVLP ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)

AVLP - Allow Very-Low-Power Modes 0b0..VLPR, VLPW, and VLPS are not allowed. 0b1..VLPR, VLPW, and VLPS are allowed.

◆ SMC_PMPROT_AVLP [3/5]

#define SMC_PMPROT_AVLP ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)

AVLP - Allow Very-Low-Power Modes 0b0..VLPR, VLPW, and VLPS are not allowed. 0b1..VLPR, VLPW, and VLPS are allowed.

◆ SMC_PMPROT_AVLP [4/5]

#define SMC_PMPROT_AVLP ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)

AVLP - Allow Very-Low-Power Modes 0b0..VLPR, VLPW, and VLPS are not allowed. 0b1..VLPR, VLPW, and VLPS are allowed.

◆ SMC_PMPROT_AVLP [5/5]

#define SMC_PMPROT_AVLP ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_PMPROT_AVLP_SHIFT)) & SMC_PMPROT_AVLP_MASK)

AVLP - Allow Very-Low-Power Modes 0b0..VLPR, VLPW, and VLPS are not allowed. 0b1..VLPR, VLPW, and VLPS are allowed.

◆ SMC_STOPCTRL_LLSM [1/2]

#define SMC_STOPCTRL_LLSM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_LLSM_SHIFT)) & SMC_STOPCTRL_LLSM_MASK)

LLSM - LLS or VLLS Mode Control 0b000..VLLS0 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx 0b001..VLLS1 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx 0b010..VLLS2 if PMCTRL[STOPM]=VLLSx, LLS2 if PMCTRL[STOPM]=LLSx 0b011..VLLS3 if PMCTRL[STOPM]=VLLSx, LLS3 if PMCTRL[STOPM]=LLSx 0b100..Reserved 0b101..Reserved 0b110..Reserved 0b111..Reserved

◆ SMC_STOPCTRL_LLSM [2/2]

#define SMC_STOPCTRL_LLSM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_LLSM_SHIFT)) & SMC_STOPCTRL_LLSM_MASK)

LLSM - LLS or VLLS Mode Control 0b000..VLLS0 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx 0b001..VLLS1 if PMCTRL[STOPM]=VLLSx, reserved if PMCTRL[STOPM]=LLSx 0b010..VLLS2 if PMCTRL[STOPM]=VLLSx, LLS2 if PMCTRL[STOPM]=LLSx 0b011..VLLS3 if PMCTRL[STOPM]=VLLSx, LLS3 if PMCTRL[STOPM]=LLSx 0b100..Reserved 0b101..Reserved 0b110..Reserved 0b111..Reserved

◆ SMC_STOPCTRL_LPOPO

#define SMC_STOPCTRL_LPOPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_LPOPO_SHIFT)) & SMC_STOPCTRL_LPOPO_MASK)

LPOPO - LPO Power Option 0b0..LPO clock is enabled in VLLSx 0b1..LPO clock is disabled in VLLSx

◆ SMC_STOPCTRL_PORPO [1/3]

#define SMC_STOPCTRL_PORPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PORPO_SHIFT)) & SMC_STOPCTRL_PORPO_MASK)

PORPO - POR Power Option 0b0..POR detect circuit is enabled in VLLS0 0b1..POR detect circuit is disabled in VLLS0

◆ SMC_STOPCTRL_PORPO [2/3]

#define SMC_STOPCTRL_PORPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PORPO_SHIFT)) & SMC_STOPCTRL_PORPO_MASK)

PORPO - POR Power Option 0b0..POR detect circuit is enabled in VLLS0 0b1..POR detect circuit is disabled in VLLS0

◆ SMC_STOPCTRL_PORPO [3/3]

#define SMC_STOPCTRL_PORPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PORPO_SHIFT)) & SMC_STOPCTRL_PORPO_MASK)

PORPO - POR Power Option 0b0..POR detect circuit is enabled in VLLS0 0b1..POR detect circuit is disabled in VLLS0

◆ SMC_STOPCTRL_PSTOPO [1/3]

#define SMC_STOPCTRL_PSTOPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PSTOPO_SHIFT)) & SMC_STOPCTRL_PSTOPO_MASK)

PSTOPO - Partial Stop Option 0b00..STOP - Normal Stop mode 0b01..PSTOP1 - Partial Stop with both system and bus clocks disabled 0b10..PSTOP2 - Partial Stop with system clock disabled and bus clock enabled 0b11..Reserved

◆ SMC_STOPCTRL_PSTOPO [2/3]

#define SMC_STOPCTRL_PSTOPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PSTOPO_SHIFT)) & SMC_STOPCTRL_PSTOPO_MASK)

PSTOPO - Partial Stop Option 0b00..STOP - Normal Stop mode 0b01..PSTOP1 - Partial Stop with both system and bus clocks disabled 0b10..PSTOP2 - Partial Stop with system clock disabled and bus clock enabled 0b11..Reserved

◆ SMC_STOPCTRL_PSTOPO [3/3]

#define SMC_STOPCTRL_PSTOPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_PSTOPO_SHIFT)) & SMC_STOPCTRL_PSTOPO_MASK)

PSTOPO - Partial Stop Option 0b00..STOP - Normal Stop mode 0b01..PSTOP1 - Partial Stop with both system and bus clocks disabled 0b10..PSTOP2 - Partial Stop with system clock disabled and bus clock enabled 0b11..Reserved

◆ SMC_STOPCTRL_RAM2PO [1/3]

#define SMC_STOPCTRL_RAM2PO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_RAM2PO_SHIFT)) & SMC_STOPCTRL_RAM2PO_MASK)

RAM2PO - RAM2 Power Option 0b0..RAM2 not powered in LLS2/VLLS2 0b1..RAM2 powered in LLS2/VLLS2

RAM2PO - RAM2 Power Option 0b0..RAM2 not powered in VLLS2 0b1..RAM2 powered in VLLS2

◆ SMC_STOPCTRL_RAM2PO [2/3]

#define SMC_STOPCTRL_RAM2PO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_RAM2PO_SHIFT)) & SMC_STOPCTRL_RAM2PO_MASK)

RAM2PO - RAM2 Power Option 0b0..RAM2 not powered in LLS2/VLLS2 0b1..RAM2 powered in LLS2/VLLS2

RAM2PO - RAM2 Power Option 0b0..RAM2 not powered in VLLS2 0b1..RAM2 powered in VLLS2

◆ SMC_STOPCTRL_RAM2PO [3/3]

#define SMC_STOPCTRL_RAM2PO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_RAM2PO_SHIFT)) & SMC_STOPCTRL_RAM2PO_MASK)

RAM2PO - RAM2 Power Option 0b0..RAM2 not powered in VLLS2 0b1..RAM2 powered in VLLS2

◆ SMC_STOPCTRL_VLLSM

#define SMC_STOPCTRL_VLLSM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_STOPCTRL_VLLSM_SHIFT)) & SMC_STOPCTRL_VLLSM_MASK)

VLLSM - VLLS Mode Control 0b000..VLLS0 0b001..VLLS1 0b010..VLLS2 0b011..VLLS3 0b100..Reserved 0b101..Reserved 0b110..Reserved 0b111..Reserved

◆ SMC_VLLSCTRL_PORPO

#define SMC_VLLSCTRL_PORPO ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_VLLSCTRL_PORPO_SHIFT)) & SMC_VLLSCTRL_PORPO_MASK)

PORPO - POR Power Option 0b0..POR detect circuit is enabled in VLLS0. 0b1..POR detect circuit is disabled in VLLS0.

◆ SMC_VLLSCTRL_VLLSM [1/2]

#define SMC_VLLSCTRL_VLLSM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_VLLSCTRL_VLLSM_SHIFT)) & SMC_VLLSCTRL_VLLSM_MASK)

VLLSM - VLLS Mode Control 0b000..VLLS0 0b001..VLLS1 0b010..VLLS2 0b011..VLLS3 0b100..Reserved 0b101..Reserved 0b110..Reserved 0b111..Reserved

◆ SMC_VLLSCTRL_VLLSM [2/2]

#define SMC_VLLSCTRL_VLLSM ( x)    (((uint8_t)(((uint8_t)(x)) << SMC_VLLSCTRL_VLLSM_SHIFT)) & SMC_VLLSCTRL_VLLSM_MASK)

VLLSM - VLLS Mode Control 0b000..VLLS0 0b001..VLLS1 0b010..VLLS2 0b011..VLLS3 0b100..Reserved 0b101..Reserved 0b110..Reserved 0b111..Reserved