TSI Peripheral Access Layer

Topics
	TSI Register Masks
	UART Peripheral Access Layer

Data Structures
struct	TSI_Type

Macros
#define	TSI0_BASE   (0x40045000u)
#define	TSI0   ((TSI_Type *)TSI0_BASE)
#define	TSI0_BASE   (0x40045000u)
#define	TSI0   ((TSI_Type *)TSI0_BASE)
#define	TSI_BASE_ADDRS   { TSI0_BASE }
#define	TSI_BASE_PTRS   { TSI0 }
#define	TSI_IRQS   { TSI0_IRQn }
#define	TSI0_BASE   (0x40045000u)
#define	TSI0   ((TSI_Type *)TSI0_BASE)
#define	TSI_BASE_ADDRS   { TSI0_BASE }
#define	TSI_BASE_PTRS   { TSI0 }
#define	TSI_IRQS   { TSI0_IRQn }

Macro Definition Documentation

TSI0 [1/3]

#define TSI0   ((TSI_Type *)TSI0_BASE)

Peripheral TSI0 base pointer

TSI0 [2/3]

#define TSI0   ((TSI_Type *)TSI0_BASE)

Peripheral TSI0 base pointer

TSI0 [3/3]

#define TSI0   ((TSI_Type *)TSI0_BASE)

Peripheral TSI0 base pointer

TSI0_BASE [1/3]

#define TSI0_BASE   (0x40045000u)

Peripheral TSI0 base address

TSI0_BASE [2/3]

#define TSI0_BASE   (0x40045000u)

Peripheral TSI0 base address

TSI0_BASE [3/3]

#define TSI0_BASE   (0x40045000u)

Peripheral TSI0 base address

TSI_BASE_ADDRS [1/2]

#define TSI_BASE_ADDRS   { TSI0_BASE }

Array initializer of TSI peripheral base addresses

TSI_BASE_ADDRS [2/2]

#define TSI_BASE_ADDRS   { TSI0_BASE }

Array initializer of TSI peripheral base addresses

TSI_BASE_PTRS [1/2]

#define TSI_BASE_PTRS   { TSI0 }

Array initializer of TSI peripheral base pointers

TSI_BASE_PTRS [2/2]

#define TSI_BASE_PTRS   { TSI0 }

Array initializer of TSI peripheral base pointers

TSI_IRQS [1/2]

#define TSI_IRQS   { TSI0_IRQn }

Interrupt vectors for the TSI peripheral type

TSI_IRQS [2/2]

#define TSI_IRQS   { TSI0_IRQn }

Interrupt vectors for the TSI peripheral type