UART Register Masks

Macros
#define	UART0_BASE   (0x4006A000u)
#define	UART0   ((UART_Type *)UART0_BASE)
#define	UART1_BASE   (0x4006B000u)
#define	UART1   ((UART_Type *)UART1_BASE)
#define	UART2_BASE   (0x4006C000u)
#define	UART2   ((UART_Type *)UART2_BASE)
#define	UART3_BASE   (0x4006D000u)
#define	UART3   ((UART_Type *)UART3_BASE)
#define	UART4_BASE   (0x400EA000u)
#define	UART4   ((UART_Type *)UART4_BASE)
#define	UART5_BASE   (0x400EB000u)
#define	UART5   ((UART_Type *)UART5_BASE)
#define	UART_BASE_ADDRS   { UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE, UART4_BASE, UART5_BASE }
#define	UART_BASE_PTRS   { UART0, UART1, UART2, UART3, UART4, UART5 }
#define	UART_RX_TX_IRQS   { UART0_RX_TX_IRQn, UART1_RX_TX_IRQn, UART2_RX_TX_IRQn, UART3_RX_TX_IRQn, UART4_RX_TX_IRQn, UART5_RX_TX_IRQn }
#define	UART_ERR_IRQS   { UART0_ERR_IRQn, UART1_ERR_IRQn, UART2_ERR_IRQn, UART3_ERR_IRQn, UART4_ERR_IRQn, UART5_ERR_IRQn }
#define	UART_LON_IRQS   { UART0_LON_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn, NotAvail_IRQn }
#define	UART_WP7816_T_TYPE0_WI_MASK   0xFFu
#define	UART_WP7816_T_TYPE0_WI_SHIFT   0
#define	UART_WP7816_T_TYPE0_WI(x)   (((uint8_t)(((uint8_t)(x))<<UART_WP7816_T_TYPE0_WI_SHIFT))&UART_WP7816_T_TYPE0_WI_MASK)
#define	UART_WP7816_T_TYPE1_BWI_MASK   0xFu
#define	UART_WP7816_T_TYPE1_BWI_SHIFT   0
#define	UART_WP7816_T_TYPE1_BWI(x)   (((uint8_t)(((uint8_t)(x))<<UART_WP7816_T_TYPE1_BWI_SHIFT))&UART_WP7816_T_TYPE1_BWI_MASK)
#define	UART_WP7816_T_TYPE1_CWI_MASK   0xF0u
#define	UART_WP7816_T_TYPE1_CWI_SHIFT   4
#define	UART_WP7816_T_TYPE1_CWI(x)   (((uint8_t)(((uint8_t)(x))<<UART_WP7816_T_TYPE1_CWI_SHIFT))&UART_WP7816_T_TYPE1_CWI_MASK)

BDH - UART Baud Rate Registers: High
#define	UART_BDH_SBR_MASK   (0x1FU)
#define	UART_BDH_SBR_SHIFT   (0U)
#define	UART_BDH_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBR_SHIFT)) & UART_BDH_SBR_MASK)
#define	UART_BDH_RXEDGIE_MASK   (0x40U)
#define	UART_BDH_RXEDGIE_SHIFT   (6U)
#define	UART_BDH_RXEDGIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)
#define	UART_BDH_LBKDIE_MASK   (0x80U)
#define	UART_BDH_LBKDIE_SHIFT   (7U)
#define	UART_BDH_LBKDIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)
#define	UART_BDH_SBR_MASK   0x1Fu
#define	UART_BDH_SBR_SHIFT   0
#define	UART_BDH_SBR(x)   (((uint8_t)(((uint8_t)(x))<<UART_BDH_SBR_SHIFT))&UART_BDH_SBR_MASK)
#define	UART_BDH_RXEDGIE_MASK   0x40u
#define	UART_BDH_RXEDGIE_SHIFT   6
#define	UART_BDH_LBKDIE_MASK   0x80u
#define	UART_BDH_LBKDIE_SHIFT   7
#define	UART_BDH_SBR_MASK   (0x1FU)
#define	UART_BDH_SBR_SHIFT   (0U)
#define	UART_BDH_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBR_SHIFT)) & UART_BDH_SBR_MASK)
#define	UART_BDH_SBNS_MASK   (0x20U)
#define	UART_BDH_SBNS_SHIFT   (5U)
#define	UART_BDH_SBNS(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)
#define	UART_BDH_RXEDGIE_MASK   (0x40U)
#define	UART_BDH_RXEDGIE_SHIFT   (6U)
#define	UART_BDH_RXEDGIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)
#define	UART_BDH_LBKDIE_MASK   (0x80U)
#define	UART_BDH_LBKDIE_SHIFT   (7U)
#define	UART_BDH_LBKDIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)
#define	UART_BDH_SBR_MASK   (0x1FU)
#define	UART_BDH_SBR_SHIFT   (0U)
#define	UART_BDH_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBR_SHIFT)) & UART_BDH_SBR_MASK)
#define	UART_BDH_SBNS_MASK   (0x20U)
#define	UART_BDH_SBNS_SHIFT   (5U)
#define	UART_BDH_SBNS(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)
#define	UART_BDH_RXEDGIE_MASK   (0x40U)
#define	UART_BDH_RXEDGIE_SHIFT   (6U)
#define	UART_BDH_RXEDGIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)
#define	UART_BDH_LBKDIE_MASK   (0x80U)
#define	UART_BDH_LBKDIE_SHIFT   (7U)
#define	UART_BDH_LBKDIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)
#define	UART_BDH_SBR_MASK   (0x1FU)
#define	UART_BDH_SBR_SHIFT   (0U)
#define	UART_BDH_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBR_SHIFT)) & UART_BDH_SBR_MASK)
#define	UART_BDH_SBNS_MASK   (0x20U)
#define	UART_BDH_SBNS_SHIFT   (5U)
#define	UART_BDH_SBNS(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)
#define	UART_BDH_RXEDGIE_MASK   (0x40U)
#define	UART_BDH_RXEDGIE_SHIFT   (6U)
#define	UART_BDH_RXEDGIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)
#define	UART_BDH_LBKDIE_MASK   (0x80U)
#define	UART_BDH_LBKDIE_SHIFT   (7U)
#define	UART_BDH_LBKDIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)
#define	UART_BDH_SBR_MASK   (0x1FU)
#define	UART_BDH_SBR_SHIFT   (0U)
#define	UART_BDH_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBR_SHIFT)) & UART_BDH_SBR_MASK)
#define	UART_BDH_SBNS_MASK   (0x20U)
#define	UART_BDH_SBNS_SHIFT   (5U)
#define	UART_BDH_SBNS(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)
#define	UART_BDH_RXEDGIE_MASK   (0x40U)
#define	UART_BDH_RXEDGIE_SHIFT   (6U)
#define	UART_BDH_RXEDGIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)
#define	UART_BDH_LBKDIE_MASK   (0x80U)
#define	UART_BDH_LBKDIE_SHIFT   (7U)
#define	UART_BDH_LBKDIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)

BDL - UART Baud Rate Registers: Low
#define	UART_BDL_SBR_MASK   (0xFFU)
#define	UART_BDL_SBR_SHIFT   (0U)
#define	UART_BDL_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDL_SBR_SHIFT)) & UART_BDL_SBR_MASK)
#define	UART_BDL_SBR_MASK   0xFFu
#define	UART_BDL_SBR_SHIFT   0
#define	UART_BDL_SBR(x)   (((uint8_t)(((uint8_t)(x))<<UART_BDL_SBR_SHIFT))&UART_BDL_SBR_MASK)
#define	UART_BDL_SBR_MASK   (0xFFU)
#define	UART_BDL_SBR_SHIFT   (0U)
#define	UART_BDL_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDL_SBR_SHIFT)) & UART_BDL_SBR_MASK)
#define	UART_BDL_SBR_MASK   (0xFFU)
#define	UART_BDL_SBR_SHIFT   (0U)
#define	UART_BDL_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDL_SBR_SHIFT)) & UART_BDL_SBR_MASK)
#define	UART_BDL_SBR_MASK   (0xFFU)
#define	UART_BDL_SBR_SHIFT   (0U)
#define	UART_BDL_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDL_SBR_SHIFT)) & UART_BDL_SBR_MASK)
#define	UART_BDL_SBR_MASK   (0xFFU)
#define	UART_BDL_SBR_SHIFT   (0U)
#define	UART_BDL_SBR(x)   (((uint8_t)(((uint8_t)(x)) << UART_BDL_SBR_SHIFT)) & UART_BDL_SBR_MASK)

C1 - UART Control Register 1
#define	UART_C1_PT_MASK   (0x1U)
#define	UART_C1_PT_SHIFT   (0U)
#define	UART_C1_PT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)
#define	UART_C1_PE_MASK   (0x2U)
#define	UART_C1_PE_SHIFT   (1U)
#define	UART_C1_PE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)
#define	UART_C1_ILT_MASK   (0x4U)
#define	UART_C1_ILT_SHIFT   (2U)
#define	UART_C1_ILT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)
#define	UART_C1_WAKE_MASK   (0x8U)
#define	UART_C1_WAKE_SHIFT   (3U)
#define	UART_C1_WAKE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)
#define	UART_C1_M_MASK   (0x10U)
#define	UART_C1_M_SHIFT   (4U)
#define	UART_C1_M(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)
#define	UART_C1_RSRC_MASK   (0x20U)
#define	UART_C1_RSRC_SHIFT   (5U)
#define	UART_C1_RSRC(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)
#define	UART_C1_UARTSWAI_MASK   (0x40U)
#define	UART_C1_UARTSWAI_SHIFT   (6U)
#define	UART_C1_UARTSWAI(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)
#define	UART_C1_LOOPS_MASK   (0x80U)
#define	UART_C1_LOOPS_SHIFT   (7U)
#define	UART_C1_LOOPS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)
#define	UART_C1_PT_MASK   0x1u
#define	UART_C1_PT_SHIFT   0
#define	UART_C1_PE_MASK   0x2u
#define	UART_C1_PE_SHIFT   1
#define	UART_C1_ILT_MASK   0x4u
#define	UART_C1_ILT_SHIFT   2
#define	UART_C1_WAKE_MASK   0x8u
#define	UART_C1_WAKE_SHIFT   3
#define	UART_C1_M_MASK   0x10u
#define	UART_C1_M_SHIFT   4
#define	UART_C1_RSRC_MASK   0x20u
#define	UART_C1_RSRC_SHIFT   5
#define	UART_C1_UARTSWAI_MASK   0x40u
#define	UART_C1_UARTSWAI_SHIFT   6
#define	UART_C1_LOOPS_MASK   0x80u
#define	UART_C1_LOOPS_SHIFT   7
#define	UART_C1_PT_MASK   (0x1U)
#define	UART_C1_PT_SHIFT   (0U)
#define	UART_C1_PT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)
#define	UART_C1_PE_MASK   (0x2U)
#define	UART_C1_PE_SHIFT   (1U)
#define	UART_C1_PE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)
#define	UART_C1_ILT_MASK   (0x4U)
#define	UART_C1_ILT_SHIFT   (2U)
#define	UART_C1_ILT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)
#define	UART_C1_WAKE_MASK   (0x8U)
#define	UART_C1_WAKE_SHIFT   (3U)
#define	UART_C1_WAKE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)
#define	UART_C1_M_MASK   (0x10U)
#define	UART_C1_M_SHIFT   (4U)
#define	UART_C1_M(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)
#define	UART_C1_RSRC_MASK   (0x20U)
#define	UART_C1_RSRC_SHIFT   (5U)
#define	UART_C1_RSRC(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)
#define	UART_C1_UARTSWAI_MASK   (0x40U)
#define	UART_C1_UARTSWAI_SHIFT   (6U)
#define	UART_C1_UARTSWAI(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)
#define	UART_C1_LOOPS_MASK   (0x80U)
#define	UART_C1_LOOPS_SHIFT   (7U)
#define	UART_C1_LOOPS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)
#define	UART_C1_PT_MASK   (0x1U)
#define	UART_C1_PT_SHIFT   (0U)
#define	UART_C1_PT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)
#define	UART_C1_PE_MASK   (0x2U)
#define	UART_C1_PE_SHIFT   (1U)
#define	UART_C1_PE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)
#define	UART_C1_ILT_MASK   (0x4U)
#define	UART_C1_ILT_SHIFT   (2U)
#define	UART_C1_ILT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)
#define	UART_C1_WAKE_MASK   (0x8U)
#define	UART_C1_WAKE_SHIFT   (3U)
#define	UART_C1_WAKE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)
#define	UART_C1_M_MASK   (0x10U)
#define	UART_C1_M_SHIFT   (4U)
#define	UART_C1_M(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)
#define	UART_C1_RSRC_MASK   (0x20U)
#define	UART_C1_RSRC_SHIFT   (5U)
#define	UART_C1_RSRC(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)
#define	UART_C1_UARTSWAI_MASK   (0x40U)
#define	UART_C1_UARTSWAI_SHIFT   (6U)
#define	UART_C1_UARTSWAI(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)
#define	UART_C1_LOOPS_MASK   (0x80U)
#define	UART_C1_LOOPS_SHIFT   (7U)
#define	UART_C1_LOOPS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)
#define	UART_C1_PT_MASK   (0x1U)
#define	UART_C1_PT_SHIFT   (0U)
#define	UART_C1_PT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)
#define	UART_C1_PE_MASK   (0x2U)
#define	UART_C1_PE_SHIFT   (1U)
#define	UART_C1_PE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)
#define	UART_C1_ILT_MASK   (0x4U)
#define	UART_C1_ILT_SHIFT   (2U)
#define	UART_C1_ILT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)
#define	UART_C1_WAKE_MASK   (0x8U)
#define	UART_C1_WAKE_SHIFT   (3U)
#define	UART_C1_WAKE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)
#define	UART_C1_M_MASK   (0x10U)
#define	UART_C1_M_SHIFT   (4U)
#define	UART_C1_M(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)
#define	UART_C1_RSRC_MASK   (0x20U)
#define	UART_C1_RSRC_SHIFT   (5U)
#define	UART_C1_RSRC(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)
#define	UART_C1_UARTSWAI_MASK   (0x40U)
#define	UART_C1_UARTSWAI_SHIFT   (6U)
#define	UART_C1_UARTSWAI(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)
#define	UART_C1_LOOPS_MASK   (0x80U)
#define	UART_C1_LOOPS_SHIFT   (7U)
#define	UART_C1_LOOPS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)
#define	UART_C1_PT_MASK   (0x1U)
#define	UART_C1_PT_SHIFT   (0U)
#define	UART_C1_PT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)
#define	UART_C1_PE_MASK   (0x2U)
#define	UART_C1_PE_SHIFT   (1U)
#define	UART_C1_PE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)
#define	UART_C1_ILT_MASK   (0x4U)
#define	UART_C1_ILT_SHIFT   (2U)
#define	UART_C1_ILT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)
#define	UART_C1_WAKE_MASK   (0x8U)
#define	UART_C1_WAKE_SHIFT   (3U)
#define	UART_C1_WAKE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)
#define	UART_C1_M_MASK   (0x10U)
#define	UART_C1_M_SHIFT   (4U)
#define	UART_C1_M(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)
#define	UART_C1_RSRC_MASK   (0x20U)
#define	UART_C1_RSRC_SHIFT   (5U)
#define	UART_C1_RSRC(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)
#define	UART_C1_UARTSWAI_MASK   (0x40U)
#define	UART_C1_UARTSWAI_SHIFT   (6U)
#define	UART_C1_UARTSWAI(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)
#define	UART_C1_LOOPS_MASK   (0x80U)
#define	UART_C1_LOOPS_SHIFT   (7U)
#define	UART_C1_LOOPS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)

C2 - UART Control Register 2
#define	UART_C2_SBK_MASK   (0x1U)
#define	UART_C2_SBK_SHIFT   (0U)
#define	UART_C2_SBK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)
#define	UART_C2_RWU_MASK   (0x2U)
#define	UART_C2_RWU_SHIFT   (1U)
#define	UART_C2_RWU(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)
#define	UART_C2_RE_MASK   (0x4U)
#define	UART_C2_RE_SHIFT   (2U)
#define	UART_C2_RE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)
#define	UART_C2_TE_MASK   (0x8U)
#define	UART_C2_TE_SHIFT   (3U)
#define	UART_C2_TE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)
#define	UART_C2_ILIE_MASK   (0x10U)
#define	UART_C2_ILIE_SHIFT   (4U)
#define	UART_C2_ILIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)
#define	UART_C2_RIE_MASK   (0x20U)
#define	UART_C2_RIE_SHIFT   (5U)
#define	UART_C2_RIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)
#define	UART_C2_TCIE_MASK   (0x40U)
#define	UART_C2_TCIE_SHIFT   (6U)
#define	UART_C2_TCIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)
#define	UART_C2_TIE_MASK   (0x80U)
#define	UART_C2_TIE_SHIFT   (7U)
#define	UART_C2_TIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)
#define	UART_C2_SBK_MASK   0x1u
#define	UART_C2_SBK_SHIFT   0
#define	UART_C2_RWU_MASK   0x2u
#define	UART_C2_RWU_SHIFT   1
#define	UART_C2_RE_MASK   0x4u
#define	UART_C2_RE_SHIFT   2
#define	UART_C2_TE_MASK   0x8u
#define	UART_C2_TE_SHIFT   3
#define	UART_C2_ILIE_MASK   0x10u
#define	UART_C2_ILIE_SHIFT   4
#define	UART_C2_RIE_MASK   0x20u
#define	UART_C2_RIE_SHIFT   5
#define	UART_C2_TCIE_MASK   0x40u
#define	UART_C2_TCIE_SHIFT   6
#define	UART_C2_TIE_MASK   0x80u
#define	UART_C2_TIE_SHIFT   7
#define	UART_C2_SBK_MASK   (0x1U)
#define	UART_C2_SBK_SHIFT   (0U)
#define	UART_C2_SBK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)
#define	UART_C2_RWU_MASK   (0x2U)
#define	UART_C2_RWU_SHIFT   (1U)
#define	UART_C2_RWU(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)
#define	UART_C2_RE_MASK   (0x4U)
#define	UART_C2_RE_SHIFT   (2U)
#define	UART_C2_RE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)
#define	UART_C2_TE_MASK   (0x8U)
#define	UART_C2_TE_SHIFT   (3U)
#define	UART_C2_TE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)
#define	UART_C2_ILIE_MASK   (0x10U)
#define	UART_C2_ILIE_SHIFT   (4U)
#define	UART_C2_ILIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)
#define	UART_C2_RIE_MASK   (0x20U)
#define	UART_C2_RIE_SHIFT   (5U)
#define	UART_C2_RIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)
#define	UART_C2_TCIE_MASK   (0x40U)
#define	UART_C2_TCIE_SHIFT   (6U)
#define	UART_C2_TCIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)
#define	UART_C2_TIE_MASK   (0x80U)
#define	UART_C2_TIE_SHIFT   (7U)
#define	UART_C2_TIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)
#define	UART_C2_SBK_MASK   (0x1U)
#define	UART_C2_SBK_SHIFT   (0U)
#define	UART_C2_SBK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)
#define	UART_C2_RWU_MASK   (0x2U)
#define	UART_C2_RWU_SHIFT   (1U)
#define	UART_C2_RWU(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)
#define	UART_C2_RE_MASK   (0x4U)
#define	UART_C2_RE_SHIFT   (2U)
#define	UART_C2_RE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)
#define	UART_C2_TE_MASK   (0x8U)
#define	UART_C2_TE_SHIFT   (3U)
#define	UART_C2_TE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)
#define	UART_C2_ILIE_MASK   (0x10U)
#define	UART_C2_ILIE_SHIFT   (4U)
#define	UART_C2_ILIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)
#define	UART_C2_RIE_MASK   (0x20U)
#define	UART_C2_RIE_SHIFT   (5U)
#define	UART_C2_RIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)
#define	UART_C2_TCIE_MASK   (0x40U)
#define	UART_C2_TCIE_SHIFT   (6U)
#define	UART_C2_TCIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)
#define	UART_C2_TIE_MASK   (0x80U)
#define	UART_C2_TIE_SHIFT   (7U)
#define	UART_C2_TIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)
#define	UART_C2_SBK_MASK   (0x1U)
#define	UART_C2_SBK_SHIFT   (0U)
#define	UART_C2_SBK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)
#define	UART_C2_RWU_MASK   (0x2U)
#define	UART_C2_RWU_SHIFT   (1U)
#define	UART_C2_RWU(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)
#define	UART_C2_RE_MASK   (0x4U)
#define	UART_C2_RE_SHIFT   (2U)
#define	UART_C2_RE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)
#define	UART_C2_TE_MASK   (0x8U)
#define	UART_C2_TE_SHIFT   (3U)
#define	UART_C2_TE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)
#define	UART_C2_ILIE_MASK   (0x10U)
#define	UART_C2_ILIE_SHIFT   (4U)
#define	UART_C2_ILIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)
#define	UART_C2_RIE_MASK   (0x20U)
#define	UART_C2_RIE_SHIFT   (5U)
#define	UART_C2_RIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)
#define	UART_C2_TCIE_MASK   (0x40U)
#define	UART_C2_TCIE_SHIFT   (6U)
#define	UART_C2_TCIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)
#define	UART_C2_TIE_MASK   (0x80U)
#define	UART_C2_TIE_SHIFT   (7U)
#define	UART_C2_TIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)
#define	UART_C2_SBK_MASK   (0x1U)
#define	UART_C2_SBK_SHIFT   (0U)
#define	UART_C2_SBK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)
#define	UART_C2_RWU_MASK   (0x2U)
#define	UART_C2_RWU_SHIFT   (1U)
#define	UART_C2_RWU(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)
#define	UART_C2_RE_MASK   (0x4U)
#define	UART_C2_RE_SHIFT   (2U)
#define	UART_C2_RE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)
#define	UART_C2_TE_MASK   (0x8U)
#define	UART_C2_TE_SHIFT   (3U)
#define	UART_C2_TE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)
#define	UART_C2_ILIE_MASK   (0x10U)
#define	UART_C2_ILIE_SHIFT   (4U)
#define	UART_C2_ILIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)
#define	UART_C2_RIE_MASK   (0x20U)
#define	UART_C2_RIE_SHIFT   (5U)
#define	UART_C2_RIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)
#define	UART_C2_TCIE_MASK   (0x40U)
#define	UART_C2_TCIE_SHIFT   (6U)
#define	UART_C2_TCIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)
#define	UART_C2_TIE_MASK   (0x80U)
#define	UART_C2_TIE_SHIFT   (7U)
#define	UART_C2_TIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)

S1 - UART Status Register 1
#define	UART_S1_PF_MASK   (0x1U)
#define	UART_S1_PF_SHIFT   (0U)
#define	UART_S1_PF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)
#define	UART_S1_FE_MASK   (0x2U)
#define	UART_S1_FE_SHIFT   (1U)
#define	UART_S1_FE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)
#define	UART_S1_NF_MASK   (0x4U)
#define	UART_S1_NF_SHIFT   (2U)
#define	UART_S1_NF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)
#define	UART_S1_OR_MASK   (0x8U)
#define	UART_S1_OR_SHIFT   (3U)
#define	UART_S1_OR(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)
#define	UART_S1_IDLE_MASK   (0x10U)
#define	UART_S1_IDLE_SHIFT   (4U)
#define	UART_S1_IDLE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)
#define	UART_S1_RDRF_MASK   (0x20U)
#define	UART_S1_RDRF_SHIFT   (5U)
#define	UART_S1_RDRF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)
#define	UART_S1_TC_MASK   (0x40U)
#define	UART_S1_TC_SHIFT   (6U)
#define	UART_S1_TC(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)
#define	UART_S1_TDRE_MASK   (0x80U)
#define	UART_S1_TDRE_SHIFT   (7U)
#define	UART_S1_TDRE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)
#define	UART_S1_PF_MASK   0x1u
#define	UART_S1_PF_SHIFT   0
#define	UART_S1_FE_MASK   0x2u
#define	UART_S1_FE_SHIFT   1
#define	UART_S1_NF_MASK   0x4u
#define	UART_S1_NF_SHIFT   2
#define	UART_S1_OR_MASK   0x8u
#define	UART_S1_OR_SHIFT   3
#define	UART_S1_IDLE_MASK   0x10u
#define	UART_S1_IDLE_SHIFT   4
#define	UART_S1_RDRF_MASK   0x20u
#define	UART_S1_RDRF_SHIFT   5
#define	UART_S1_TC_MASK   0x40u
#define	UART_S1_TC_SHIFT   6
#define	UART_S1_TDRE_MASK   0x80u
#define	UART_S1_TDRE_SHIFT   7
#define	UART_S1_PF_MASK   (0x1U)
#define	UART_S1_PF_SHIFT   (0U)
#define	UART_S1_PF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)
#define	UART_S1_FE_MASK   (0x2U)
#define	UART_S1_FE_SHIFT   (1U)
#define	UART_S1_FE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)
#define	UART_S1_NF_MASK   (0x4U)
#define	UART_S1_NF_SHIFT   (2U)
#define	UART_S1_NF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)
#define	UART_S1_OR_MASK   (0x8U)
#define	UART_S1_OR_SHIFT   (3U)
#define	UART_S1_OR(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)
#define	UART_S1_IDLE_MASK   (0x10U)
#define	UART_S1_IDLE_SHIFT   (4U)
#define	UART_S1_IDLE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)
#define	UART_S1_RDRF_MASK   (0x20U)
#define	UART_S1_RDRF_SHIFT   (5U)
#define	UART_S1_RDRF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)
#define	UART_S1_TC_MASK   (0x40U)
#define	UART_S1_TC_SHIFT   (6U)
#define	UART_S1_TC(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)
#define	UART_S1_TDRE_MASK   (0x80U)
#define	UART_S1_TDRE_SHIFT   (7U)
#define	UART_S1_TDRE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)
#define	UART_S1_PF_MASK   (0x1U)
#define	UART_S1_PF_SHIFT   (0U)
#define	UART_S1_PF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)
#define	UART_S1_FE_MASK   (0x2U)
#define	UART_S1_FE_SHIFT   (1U)
#define	UART_S1_FE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)
#define	UART_S1_NF_MASK   (0x4U)
#define	UART_S1_NF_SHIFT   (2U)
#define	UART_S1_NF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)
#define	UART_S1_OR_MASK   (0x8U)
#define	UART_S1_OR_SHIFT   (3U)
#define	UART_S1_OR(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)
#define	UART_S1_IDLE_MASK   (0x10U)
#define	UART_S1_IDLE_SHIFT   (4U)
#define	UART_S1_IDLE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)
#define	UART_S1_RDRF_MASK   (0x20U)
#define	UART_S1_RDRF_SHIFT   (5U)
#define	UART_S1_RDRF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)
#define	UART_S1_TC_MASK   (0x40U)
#define	UART_S1_TC_SHIFT   (6U)
#define	UART_S1_TC(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)
#define	UART_S1_TDRE_MASK   (0x80U)
#define	UART_S1_TDRE_SHIFT   (7U)
#define	UART_S1_TDRE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)
#define	UART_S1_PF_MASK   (0x1U)
#define	UART_S1_PF_SHIFT   (0U)
#define	UART_S1_PF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)
#define	UART_S1_FE_MASK   (0x2U)
#define	UART_S1_FE_SHIFT   (1U)
#define	UART_S1_FE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)
#define	UART_S1_NF_MASK   (0x4U)
#define	UART_S1_NF_SHIFT   (2U)
#define	UART_S1_NF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)
#define	UART_S1_OR_MASK   (0x8U)
#define	UART_S1_OR_SHIFT   (3U)
#define	UART_S1_OR(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)
#define	UART_S1_IDLE_MASK   (0x10U)
#define	UART_S1_IDLE_SHIFT   (4U)
#define	UART_S1_IDLE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)
#define	UART_S1_RDRF_MASK   (0x20U)
#define	UART_S1_RDRF_SHIFT   (5U)
#define	UART_S1_RDRF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)
#define	UART_S1_TC_MASK   (0x40U)
#define	UART_S1_TC_SHIFT   (6U)
#define	UART_S1_TC(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)
#define	UART_S1_TDRE_MASK   (0x80U)
#define	UART_S1_TDRE_SHIFT   (7U)
#define	UART_S1_TDRE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)
#define	UART_S1_PF_MASK   (0x1U)
#define	UART_S1_PF_SHIFT   (0U)
#define	UART_S1_PF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)
#define	UART_S1_FE_MASK   (0x2U)
#define	UART_S1_FE_SHIFT   (1U)
#define	UART_S1_FE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)
#define	UART_S1_NF_MASK   (0x4U)
#define	UART_S1_NF_SHIFT   (2U)
#define	UART_S1_NF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)
#define	UART_S1_OR_MASK   (0x8U)
#define	UART_S1_OR_SHIFT   (3U)
#define	UART_S1_OR(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)
#define	UART_S1_IDLE_MASK   (0x10U)
#define	UART_S1_IDLE_SHIFT   (4U)
#define	UART_S1_IDLE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)
#define	UART_S1_RDRF_MASK   (0x20U)
#define	UART_S1_RDRF_SHIFT   (5U)
#define	UART_S1_RDRF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)
#define	UART_S1_TC_MASK   (0x40U)
#define	UART_S1_TC_SHIFT   (6U)
#define	UART_S1_TC(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)
#define	UART_S1_TDRE_MASK   (0x80U)
#define	UART_S1_TDRE_SHIFT   (7U)
#define	UART_S1_TDRE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)

S2 - UART Status Register 2
#define	UART_S2_RAF_MASK   (0x1U)
#define	UART_S2_RAF_SHIFT   (0U)
#define	UART_S2_RAF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)
#define	UART_S2_LBKDE_MASK   (0x2U)
#define	UART_S2_LBKDE_SHIFT   (1U)
#define	UART_S2_LBKDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)
#define	UART_S2_BRK13_MASK   (0x4U)
#define	UART_S2_BRK13_SHIFT   (2U)
#define	UART_S2_BRK13(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)
#define	UART_S2_RWUID_MASK   (0x8U)
#define	UART_S2_RWUID_SHIFT   (3U)
#define	UART_S2_RWUID(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)
#define	UART_S2_RXINV_MASK   (0x10U)
#define	UART_S2_RXINV_SHIFT   (4U)
#define	UART_S2_RXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)
#define	UART_S2_MSBF_MASK   (0x20U)
#define	UART_S2_MSBF_SHIFT   (5U)
#define	UART_S2_MSBF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)
#define	UART_S2_RXEDGIF_MASK   (0x40U)
#define	UART_S2_RXEDGIF_SHIFT   (6U)
#define	UART_S2_RXEDGIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)
#define	UART_S2_LBKDIF_MASK   (0x80U)
#define	UART_S2_LBKDIF_SHIFT   (7U)
#define	UART_S2_LBKDIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)
#define	UART_S2_RAF_MASK   0x1u
#define	UART_S2_RAF_SHIFT   0
#define	UART_S2_LBKDE_MASK   0x2u
#define	UART_S2_LBKDE_SHIFT   1
#define	UART_S2_BRK13_MASK   0x4u
#define	UART_S2_BRK13_SHIFT   2
#define	UART_S2_RWUID_MASK   0x8u
#define	UART_S2_RWUID_SHIFT   3
#define	UART_S2_RXINV_MASK   0x10u
#define	UART_S2_RXINV_SHIFT   4
#define	UART_S2_MSBF_MASK   0x20u
#define	UART_S2_MSBF_SHIFT   5
#define	UART_S2_RXEDGIF_MASK   0x40u
#define	UART_S2_RXEDGIF_SHIFT   6
#define	UART_S2_LBKDIF_MASK   0x80u
#define	UART_S2_LBKDIF_SHIFT   7
#define	UART_S2_RAF_MASK   (0x1U)
#define	UART_S2_RAF_SHIFT   (0U)
#define	UART_S2_RAF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)
#define	UART_S2_LBKDE_MASK   (0x2U)
#define	UART_S2_LBKDE_SHIFT   (1U)
#define	UART_S2_LBKDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)
#define	UART_S2_BRK13_MASK   (0x4U)
#define	UART_S2_BRK13_SHIFT   (2U)
#define	UART_S2_BRK13(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)
#define	UART_S2_RWUID_MASK   (0x8U)
#define	UART_S2_RWUID_SHIFT   (3U)
#define	UART_S2_RWUID(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)
#define	UART_S2_RXINV_MASK   (0x10U)
#define	UART_S2_RXINV_SHIFT   (4U)
#define	UART_S2_RXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)
#define	UART_S2_MSBF_MASK   (0x20U)
#define	UART_S2_MSBF_SHIFT   (5U)
#define	UART_S2_MSBF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)
#define	UART_S2_RXEDGIF_MASK   (0x40U)
#define	UART_S2_RXEDGIF_SHIFT   (6U)
#define	UART_S2_RXEDGIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)
#define	UART_S2_LBKDIF_MASK   (0x80U)
#define	UART_S2_LBKDIF_SHIFT   (7U)
#define	UART_S2_LBKDIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)
#define	UART_S2_RAF_MASK   (0x1U)
#define	UART_S2_RAF_SHIFT   (0U)
#define	UART_S2_RAF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)
#define	UART_S2_LBKDE_MASK   (0x2U)
#define	UART_S2_LBKDE_SHIFT   (1U)
#define	UART_S2_LBKDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)
#define	UART_S2_BRK13_MASK   (0x4U)
#define	UART_S2_BRK13_SHIFT   (2U)
#define	UART_S2_BRK13(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)
#define	UART_S2_RWUID_MASK   (0x8U)
#define	UART_S2_RWUID_SHIFT   (3U)
#define	UART_S2_RWUID(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)
#define	UART_S2_RXINV_MASK   (0x10U)
#define	UART_S2_RXINV_SHIFT   (4U)
#define	UART_S2_RXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)
#define	UART_S2_MSBF_MASK   (0x20U)
#define	UART_S2_MSBF_SHIFT   (5U)
#define	UART_S2_MSBF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)
#define	UART_S2_RXEDGIF_MASK   (0x40U)
#define	UART_S2_RXEDGIF_SHIFT   (6U)
#define	UART_S2_RXEDGIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)
#define	UART_S2_LBKDIF_MASK   (0x80U)
#define	UART_S2_LBKDIF_SHIFT   (7U)
#define	UART_S2_LBKDIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)
#define	UART_S2_RAF_MASK   (0x1U)
#define	UART_S2_RAF_SHIFT   (0U)
#define	UART_S2_RAF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)
#define	UART_S2_LBKDE_MASK   (0x2U)
#define	UART_S2_LBKDE_SHIFT   (1U)
#define	UART_S2_LBKDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)
#define	UART_S2_BRK13_MASK   (0x4U)
#define	UART_S2_BRK13_SHIFT   (2U)
#define	UART_S2_BRK13(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)
#define	UART_S2_RWUID_MASK   (0x8U)
#define	UART_S2_RWUID_SHIFT   (3U)
#define	UART_S2_RWUID(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)
#define	UART_S2_RXINV_MASK   (0x10U)
#define	UART_S2_RXINV_SHIFT   (4U)
#define	UART_S2_RXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)
#define	UART_S2_MSBF_MASK   (0x20U)
#define	UART_S2_MSBF_SHIFT   (5U)
#define	UART_S2_MSBF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)
#define	UART_S2_RXEDGIF_MASK   (0x40U)
#define	UART_S2_RXEDGIF_SHIFT   (6U)
#define	UART_S2_RXEDGIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)
#define	UART_S2_LBKDIF_MASK   (0x80U)
#define	UART_S2_LBKDIF_SHIFT   (7U)
#define	UART_S2_LBKDIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)
#define	UART_S2_RAF_MASK   (0x1U)
#define	UART_S2_RAF_SHIFT   (0U)
#define	UART_S2_RAF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)
#define	UART_S2_LBKDE_MASK   (0x2U)
#define	UART_S2_LBKDE_SHIFT   (1U)
#define	UART_S2_LBKDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)
#define	UART_S2_BRK13_MASK   (0x4U)
#define	UART_S2_BRK13_SHIFT   (2U)
#define	UART_S2_BRK13(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)
#define	UART_S2_RWUID_MASK   (0x8U)
#define	UART_S2_RWUID_SHIFT   (3U)
#define	UART_S2_RWUID(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)
#define	UART_S2_RXINV_MASK   (0x10U)
#define	UART_S2_RXINV_SHIFT   (4U)
#define	UART_S2_RXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)
#define	UART_S2_MSBF_MASK   (0x20U)
#define	UART_S2_MSBF_SHIFT   (5U)
#define	UART_S2_MSBF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)
#define	UART_S2_RXEDGIF_MASK   (0x40U)
#define	UART_S2_RXEDGIF_SHIFT   (6U)
#define	UART_S2_RXEDGIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)
#define	UART_S2_LBKDIF_MASK   (0x80U)
#define	UART_S2_LBKDIF_SHIFT   (7U)
#define	UART_S2_LBKDIF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)

C3 - UART Control Register 3
#define	UART_C3_PEIE_MASK   (0x1U)
#define	UART_C3_PEIE_SHIFT   (0U)
#define	UART_C3_PEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)
#define	UART_C3_FEIE_MASK   (0x2U)
#define	UART_C3_FEIE_SHIFT   (1U)
#define	UART_C3_FEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)
#define	UART_C3_NEIE_MASK   (0x4U)
#define	UART_C3_NEIE_SHIFT   (2U)
#define	UART_C3_NEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)
#define	UART_C3_ORIE_MASK   (0x8U)
#define	UART_C3_ORIE_SHIFT   (3U)
#define	UART_C3_ORIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)
#define	UART_C3_TXINV_MASK   (0x10U)
#define	UART_C3_TXINV_SHIFT   (4U)
#define	UART_C3_TXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)
#define	UART_C3_TXDIR_MASK   (0x20U)
#define	UART_C3_TXDIR_SHIFT   (5U)
#define	UART_C3_TXDIR(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)
#define	UART_C3_T8_MASK   (0x40U)
#define	UART_C3_T8_SHIFT   (6U)
#define	UART_C3_T8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_T8_SHIFT)) & UART_C3_T8_MASK)
#define	UART_C3_R8_MASK   (0x80U)
#define	UART_C3_R8_SHIFT   (7U)
#define	UART_C3_R8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_R8_SHIFT)) & UART_C3_R8_MASK)
#define	UART_C3_PEIE_MASK   0x1u
#define	UART_C3_PEIE_SHIFT   0
#define	UART_C3_FEIE_MASK   0x2u
#define	UART_C3_FEIE_SHIFT   1
#define	UART_C3_NEIE_MASK   0x4u
#define	UART_C3_NEIE_SHIFT   2
#define	UART_C3_ORIE_MASK   0x8u
#define	UART_C3_ORIE_SHIFT   3
#define	UART_C3_TXINV_MASK   0x10u
#define	UART_C3_TXINV_SHIFT   4
#define	UART_C3_TXDIR_MASK   0x20u
#define	UART_C3_TXDIR_SHIFT   5
#define	UART_C3_T8_MASK   0x40u
#define	UART_C3_T8_SHIFT   6
#define	UART_C3_R8_MASK   0x80u
#define	UART_C3_R8_SHIFT   7
#define	UART_C3_PEIE_MASK   (0x1U)
#define	UART_C3_PEIE_SHIFT   (0U)
#define	UART_C3_PEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)
#define	UART_C3_FEIE_MASK   (0x2U)
#define	UART_C3_FEIE_SHIFT   (1U)
#define	UART_C3_FEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)
#define	UART_C3_NEIE_MASK   (0x4U)
#define	UART_C3_NEIE_SHIFT   (2U)
#define	UART_C3_NEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)
#define	UART_C3_ORIE_MASK   (0x8U)
#define	UART_C3_ORIE_SHIFT   (3U)
#define	UART_C3_ORIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)
#define	UART_C3_TXINV_MASK   (0x10U)
#define	UART_C3_TXINV_SHIFT   (4U)
#define	UART_C3_TXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)
#define	UART_C3_TXDIR_MASK   (0x20U)
#define	UART_C3_TXDIR_SHIFT   (5U)
#define	UART_C3_TXDIR(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)
#define	UART_C3_T8_MASK   (0x40U)
#define	UART_C3_T8_SHIFT   (6U)
#define	UART_C3_T8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_T8_SHIFT)) & UART_C3_T8_MASK)
#define	UART_C3_R8_MASK   (0x80U)
#define	UART_C3_R8_SHIFT   (7U)
#define	UART_C3_R8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_R8_SHIFT)) & UART_C3_R8_MASK)
#define	UART_C3_PEIE_MASK   (0x1U)
#define	UART_C3_PEIE_SHIFT   (0U)
#define	UART_C3_PEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)
#define	UART_C3_FEIE_MASK   (0x2U)
#define	UART_C3_FEIE_SHIFT   (1U)
#define	UART_C3_FEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)
#define	UART_C3_NEIE_MASK   (0x4U)
#define	UART_C3_NEIE_SHIFT   (2U)
#define	UART_C3_NEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)
#define	UART_C3_ORIE_MASK   (0x8U)
#define	UART_C3_ORIE_SHIFT   (3U)
#define	UART_C3_ORIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)
#define	UART_C3_TXINV_MASK   (0x10U)
#define	UART_C3_TXINV_SHIFT   (4U)
#define	UART_C3_TXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)
#define	UART_C3_TXDIR_MASK   (0x20U)
#define	UART_C3_TXDIR_SHIFT   (5U)
#define	UART_C3_TXDIR(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)
#define	UART_C3_T8_MASK   (0x40U)
#define	UART_C3_T8_SHIFT   (6U)
#define	UART_C3_T8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_T8_SHIFT)) & UART_C3_T8_MASK)
#define	UART_C3_R8_MASK   (0x80U)
#define	UART_C3_R8_SHIFT   (7U)
#define	UART_C3_R8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_R8_SHIFT)) & UART_C3_R8_MASK)
#define	UART_C3_PEIE_MASK   (0x1U)
#define	UART_C3_PEIE_SHIFT   (0U)
#define	UART_C3_PEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)
#define	UART_C3_FEIE_MASK   (0x2U)
#define	UART_C3_FEIE_SHIFT   (1U)
#define	UART_C3_FEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)
#define	UART_C3_NEIE_MASK   (0x4U)
#define	UART_C3_NEIE_SHIFT   (2U)
#define	UART_C3_NEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)
#define	UART_C3_ORIE_MASK   (0x8U)
#define	UART_C3_ORIE_SHIFT   (3U)
#define	UART_C3_ORIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)
#define	UART_C3_TXINV_MASK   (0x10U)
#define	UART_C3_TXINV_SHIFT   (4U)
#define	UART_C3_TXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)
#define	UART_C3_TXDIR_MASK   (0x20U)
#define	UART_C3_TXDIR_SHIFT   (5U)
#define	UART_C3_TXDIR(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)
#define	UART_C3_T8_MASK   (0x40U)
#define	UART_C3_T8_SHIFT   (6U)
#define	UART_C3_T8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_T8_SHIFT)) & UART_C3_T8_MASK)
#define	UART_C3_R8_MASK   (0x80U)
#define	UART_C3_R8_SHIFT   (7U)
#define	UART_C3_R8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_R8_SHIFT)) & UART_C3_R8_MASK)
#define	UART_C3_PEIE_MASK   (0x1U)
#define	UART_C3_PEIE_SHIFT   (0U)
#define	UART_C3_PEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)
#define	UART_C3_FEIE_MASK   (0x2U)
#define	UART_C3_FEIE_SHIFT   (1U)
#define	UART_C3_FEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)
#define	UART_C3_NEIE_MASK   (0x4U)
#define	UART_C3_NEIE_SHIFT   (2U)
#define	UART_C3_NEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)
#define	UART_C3_ORIE_MASK   (0x8U)
#define	UART_C3_ORIE_SHIFT   (3U)
#define	UART_C3_ORIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)
#define	UART_C3_TXINV_MASK   (0x10U)
#define	UART_C3_TXINV_SHIFT   (4U)
#define	UART_C3_TXINV(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)
#define	UART_C3_TXDIR_MASK   (0x20U)
#define	UART_C3_TXDIR_SHIFT   (5U)
#define	UART_C3_TXDIR(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)
#define	UART_C3_T8_MASK   (0x40U)
#define	UART_C3_T8_SHIFT   (6U)
#define	UART_C3_T8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_T8_SHIFT)) & UART_C3_T8_MASK)
#define	UART_C3_R8_MASK   (0x80U)
#define	UART_C3_R8_SHIFT   (7U)
#define	UART_C3_R8(x)   (((uint8_t)(((uint8_t)(x)) << UART_C3_R8_SHIFT)) & UART_C3_R8_MASK)

D - UART Data Register
#define	UART_D_RT_MASK   (0xFFU)
#define	UART_D_RT_SHIFT   (0U)
#define	UART_D_RT(x)   (((uint8_t)(((uint8_t)(x)) << UART_D_RT_SHIFT)) & UART_D_RT_MASK)
#define	UART_D_RT_MASK   0xFFu
#define	UART_D_RT_SHIFT   0
#define	UART_D_RT(x)   (((uint8_t)(((uint8_t)(x))<<UART_D_RT_SHIFT))&UART_D_RT_MASK)
#define	UART_D_RT_MASK   (0xFFU)
#define	UART_D_RT_SHIFT   (0U)
#define	UART_D_RT(x)   (((uint8_t)(((uint8_t)(x)) << UART_D_RT_SHIFT)) & UART_D_RT_MASK)
#define	UART_D_RT_MASK   (0xFFU)
#define	UART_D_RT_SHIFT   (0U)
#define	UART_D_RT(x)   (((uint8_t)(((uint8_t)(x)) << UART_D_RT_SHIFT)) & UART_D_RT_MASK)
#define	UART_D_RT_MASK   (0xFFU)
#define	UART_D_RT_SHIFT   (0U)
#define	UART_D_RT(x)   (((uint8_t)(((uint8_t)(x)) << UART_D_RT_SHIFT)) & UART_D_RT_MASK)
#define	UART_D_RT_MASK   (0xFFU)
#define	UART_D_RT_SHIFT   (0U)
#define	UART_D_RT(x)   (((uint8_t)(((uint8_t)(x)) << UART_D_RT_SHIFT)) & UART_D_RT_MASK)

MA1 - UART Match Address Registers 1
#define	UART_MA1_MA_MASK   (0xFFU)
#define	UART_MA1_MA_SHIFT   (0U)
#define	UART_MA1_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA1_MA_SHIFT)) & UART_MA1_MA_MASK)
#define	UART_MA1_MA_MASK   0xFFu
#define	UART_MA1_MA_SHIFT   0
#define	UART_MA1_MA(x)   (((uint8_t)(((uint8_t)(x))<<UART_MA1_MA_SHIFT))&UART_MA1_MA_MASK)
#define	UART_MA1_MA_MASK   (0xFFU)
#define	UART_MA1_MA_SHIFT   (0U)
#define	UART_MA1_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA1_MA_SHIFT)) & UART_MA1_MA_MASK)
#define	UART_MA1_MA_MASK   (0xFFU)
#define	UART_MA1_MA_SHIFT   (0U)
#define	UART_MA1_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA1_MA_SHIFT)) & UART_MA1_MA_MASK)
#define	UART_MA1_MA_MASK   (0xFFU)
#define	UART_MA1_MA_SHIFT   (0U)
#define	UART_MA1_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA1_MA_SHIFT)) & UART_MA1_MA_MASK)
#define	UART_MA1_MA_MASK   (0xFFU)
#define	UART_MA1_MA_SHIFT   (0U)
#define	UART_MA1_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA1_MA_SHIFT)) & UART_MA1_MA_MASK)

MA2 - UART Match Address Registers 2
#define	UART_MA2_MA_MASK   (0xFFU)
#define	UART_MA2_MA_SHIFT   (0U)
#define	UART_MA2_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA2_MA_SHIFT)) & UART_MA2_MA_MASK)
#define	UART_MA2_MA_MASK   0xFFu
#define	UART_MA2_MA_SHIFT   0
#define	UART_MA2_MA(x)   (((uint8_t)(((uint8_t)(x))<<UART_MA2_MA_SHIFT))&UART_MA2_MA_MASK)
#define	UART_MA2_MA_MASK   (0xFFU)
#define	UART_MA2_MA_SHIFT   (0U)
#define	UART_MA2_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA2_MA_SHIFT)) & UART_MA2_MA_MASK)
#define	UART_MA2_MA_MASK   (0xFFU)
#define	UART_MA2_MA_SHIFT   (0U)
#define	UART_MA2_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA2_MA_SHIFT)) & UART_MA2_MA_MASK)
#define	UART_MA2_MA_MASK   (0xFFU)
#define	UART_MA2_MA_SHIFT   (0U)
#define	UART_MA2_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA2_MA_SHIFT)) & UART_MA2_MA_MASK)
#define	UART_MA2_MA_MASK   (0xFFU)
#define	UART_MA2_MA_SHIFT   (0U)
#define	UART_MA2_MA(x)   (((uint8_t)(((uint8_t)(x)) << UART_MA2_MA_SHIFT)) & UART_MA2_MA_MASK)

C4 - UART Control Register 4
#define	UART_C4_BRFA_MASK   (0x1FU)
#define	UART_C4_BRFA_SHIFT   (0U)
#define	UART_C4_BRFA(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_BRFA_SHIFT)) & UART_C4_BRFA_MASK)
#define	UART_C4_M10_MASK   (0x20U)
#define	UART_C4_M10_SHIFT   (5U)
#define	UART_C4_M10(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)
#define	UART_C4_MAEN2_MASK   (0x40U)
#define	UART_C4_MAEN2_SHIFT   (6U)
#define	UART_C4_MAEN2(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)
#define	UART_C4_MAEN1_MASK   (0x80U)
#define	UART_C4_MAEN1_SHIFT   (7U)
#define	UART_C4_MAEN1(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)
#define	UART_C4_BRFA_MASK   0x1Fu
#define	UART_C4_BRFA_SHIFT   0
#define	UART_C4_BRFA(x)   (((uint8_t)(((uint8_t)(x))<<UART_C4_BRFA_SHIFT))&UART_C4_BRFA_MASK)
#define	UART_C4_M10_MASK   0x20u
#define	UART_C4_M10_SHIFT   5
#define	UART_C4_MAEN2_MASK   0x40u
#define	UART_C4_MAEN2_SHIFT   6
#define	UART_C4_MAEN1_MASK   0x80u
#define	UART_C4_MAEN1_SHIFT   7
#define	UART_C4_BRFA_MASK   (0x1FU)
#define	UART_C4_BRFA_SHIFT   (0U)
#define	UART_C4_BRFA(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_BRFA_SHIFT)) & UART_C4_BRFA_MASK)
#define	UART_C4_M10_MASK   (0x20U)
#define	UART_C4_M10_SHIFT   (5U)
#define	UART_C4_M10(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)
#define	UART_C4_MAEN2_MASK   (0x40U)
#define	UART_C4_MAEN2_SHIFT   (6U)
#define	UART_C4_MAEN2(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)
#define	UART_C4_MAEN1_MASK   (0x80U)
#define	UART_C4_MAEN1_SHIFT   (7U)
#define	UART_C4_MAEN1(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)
#define	UART_C4_BRFA_MASK   (0x1FU)
#define	UART_C4_BRFA_SHIFT   (0U)
#define	UART_C4_BRFA(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_BRFA_SHIFT)) & UART_C4_BRFA_MASK)
#define	UART_C4_M10_MASK   (0x20U)
#define	UART_C4_M10_SHIFT   (5U)
#define	UART_C4_M10(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)
#define	UART_C4_MAEN2_MASK   (0x40U)
#define	UART_C4_MAEN2_SHIFT   (6U)
#define	UART_C4_MAEN2(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)
#define	UART_C4_MAEN1_MASK   (0x80U)
#define	UART_C4_MAEN1_SHIFT   (7U)
#define	UART_C4_MAEN1(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)
#define	UART_C4_BRFA_MASK   (0x1FU)
#define	UART_C4_BRFA_SHIFT   (0U)
#define	UART_C4_BRFA(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_BRFA_SHIFT)) & UART_C4_BRFA_MASK)
#define	UART_C4_M10_MASK   (0x20U)
#define	UART_C4_M10_SHIFT   (5U)
#define	UART_C4_M10(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)
#define	UART_C4_MAEN2_MASK   (0x40U)
#define	UART_C4_MAEN2_SHIFT   (6U)
#define	UART_C4_MAEN2(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)
#define	UART_C4_MAEN1_MASK   (0x80U)
#define	UART_C4_MAEN1_SHIFT   (7U)
#define	UART_C4_MAEN1(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)
#define	UART_C4_BRFA_MASK   (0x1FU)
#define	UART_C4_BRFA_SHIFT   (0U)
#define	UART_C4_BRFA(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_BRFA_SHIFT)) & UART_C4_BRFA_MASK)
#define	UART_C4_M10_MASK   (0x20U)
#define	UART_C4_M10_SHIFT   (5U)
#define	UART_C4_M10(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)
#define	UART_C4_MAEN2_MASK   (0x40U)
#define	UART_C4_MAEN2_SHIFT   (6U)
#define	UART_C4_MAEN2(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)
#define	UART_C4_MAEN1_MASK   (0x80U)
#define	UART_C4_MAEN1_SHIFT   (7U)
#define	UART_C4_MAEN1(x)   (((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)

C5 - UART Control Register 5
#define	UART_C5_RDMAS_MASK   (0x20U)
#define	UART_C5_RDMAS_SHIFT   (5U)
#define	UART_C5_RDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)
#define	UART_C5_TDMAS_MASK   (0x80U)
#define	UART_C5_TDMAS_SHIFT   (7U)
#define	UART_C5_TDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)
#define	UART_C5_RDMAS_MASK   0x20u
#define	UART_C5_RDMAS_SHIFT   5
#define	UART_C5_TDMAS_MASK   0x80u
#define	UART_C5_TDMAS_SHIFT   7
#define	UART_C5_LBKDDMAS_MASK   (0x8U)
#define	UART_C5_LBKDDMAS_SHIFT   (3U)
#define	UART_C5_LBKDDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_LBKDDMAS_SHIFT)) & UART_C5_LBKDDMAS_MASK)
#define	UART_C5_RDMAS_MASK   (0x20U)
#define	UART_C5_RDMAS_SHIFT   (5U)
#define	UART_C5_RDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)
#define	UART_C5_TDMAS_MASK   (0x80U)
#define	UART_C5_TDMAS_SHIFT   (7U)
#define	UART_C5_TDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)
#define	UART_C5_RDMAS_MASK   (0x20U)
#define	UART_C5_RDMAS_SHIFT   (5U)
#define	UART_C5_RDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)
#define	UART_C5_TDMAS_MASK   (0x80U)
#define	UART_C5_TDMAS_SHIFT   (7U)
#define	UART_C5_TDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)
#define	UART_C5_RDMAS_MASK   (0x20U)
#define	UART_C5_RDMAS_SHIFT   (5U)
#define	UART_C5_RDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)
#define	UART_C5_TDMAS_MASK   (0x80U)
#define	UART_C5_TDMAS_SHIFT   (7U)
#define	UART_C5_TDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)
#define	UART_C5_LBKDDMAS_MASK   (0x8U)
#define	UART_C5_LBKDDMAS_SHIFT   (3U)
#define	UART_C5_LBKDDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_LBKDDMAS_SHIFT)) & UART_C5_LBKDDMAS_MASK)
#define	UART_C5_RDMAS_MASK   (0x20U)
#define	UART_C5_RDMAS_SHIFT   (5U)
#define	UART_C5_RDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)
#define	UART_C5_TDMAS_MASK   (0x80U)
#define	UART_C5_TDMAS_SHIFT   (7U)
#define	UART_C5_TDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)

ED - UART Extended Data Register
#define	UART_ED_PARITYE_MASK   (0x40U)
#define	UART_ED_PARITYE_SHIFT   (6U)
#define	UART_ED_PARITYE(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)
#define	UART_ED_NOISY_MASK   (0x80U)
#define	UART_ED_NOISY_SHIFT   (7U)
#define	UART_ED_NOISY(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)
#define	UART_ED_PARITYE_MASK   0x40u
#define	UART_ED_PARITYE_SHIFT   6
#define	UART_ED_NOISY_MASK   0x80u
#define	UART_ED_NOISY_SHIFT   7
#define	UART_ED_PARITYE_MASK   (0x40U)
#define	UART_ED_PARITYE_SHIFT   (6U)
#define	UART_ED_PARITYE(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)
#define	UART_ED_NOISY_MASK   (0x80U)
#define	UART_ED_NOISY_SHIFT   (7U)
#define	UART_ED_NOISY(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)
#define	UART_ED_PARITYE_MASK   (0x40U)
#define	UART_ED_PARITYE_SHIFT   (6U)
#define	UART_ED_PARITYE(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)
#define	UART_ED_NOISY_MASK   (0x80U)
#define	UART_ED_NOISY_SHIFT   (7U)
#define	UART_ED_NOISY(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)
#define	UART_ED_PARITYE_MASK   (0x40U)
#define	UART_ED_PARITYE_SHIFT   (6U)
#define	UART_ED_PARITYE(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)
#define	UART_ED_NOISY_MASK   (0x80U)
#define	UART_ED_NOISY_SHIFT   (7U)
#define	UART_ED_NOISY(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)
#define	UART_ED_PARITYE_MASK   (0x40U)
#define	UART_ED_PARITYE_SHIFT   (6U)
#define	UART_ED_PARITYE(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)
#define	UART_ED_NOISY_MASK   (0x80U)
#define	UART_ED_NOISY_SHIFT   (7U)
#define	UART_ED_NOISY(x)   (((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)

MODEM - UART Modem Register
#define	UART_MODEM_TXCTSE_MASK   (0x1U)
#define	UART_MODEM_TXCTSE_SHIFT   (0U)
#define	UART_MODEM_TXCTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)
#define	UART_MODEM_TXRTSE_MASK   (0x2U)
#define	UART_MODEM_TXRTSE_SHIFT   (1U)
#define	UART_MODEM_TXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)
#define	UART_MODEM_TXRTSPOL_MASK   (0x4U)
#define	UART_MODEM_TXRTSPOL_SHIFT   (2U)
#define	UART_MODEM_TXRTSPOL(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)
#define	UART_MODEM_RXRTSE_MASK   (0x8U)
#define	UART_MODEM_RXRTSE_SHIFT   (3U)
#define	UART_MODEM_RXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)
#define	UART_MODEM_TXCTSE_MASK   0x1u
#define	UART_MODEM_TXCTSE_SHIFT   0
#define	UART_MODEM_TXRTSE_MASK   0x2u
#define	UART_MODEM_TXRTSE_SHIFT   1
#define	UART_MODEM_TXRTSPOL_MASK   0x4u
#define	UART_MODEM_TXRTSPOL_SHIFT   2
#define	UART_MODEM_RXRTSE_MASK   0x8u
#define	UART_MODEM_RXRTSE_SHIFT   3
#define	UART_MODEM_TXCTSE_MASK   (0x1U)
#define	UART_MODEM_TXCTSE_SHIFT   (0U)
#define	UART_MODEM_TXCTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)
#define	UART_MODEM_TXRTSE_MASK   (0x2U)
#define	UART_MODEM_TXRTSE_SHIFT   (1U)
#define	UART_MODEM_TXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)
#define	UART_MODEM_TXRTSPOL_MASK   (0x4U)
#define	UART_MODEM_TXRTSPOL_SHIFT   (2U)
#define	UART_MODEM_TXRTSPOL(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)
#define	UART_MODEM_RXRTSE_MASK   (0x8U)
#define	UART_MODEM_RXRTSE_SHIFT   (3U)
#define	UART_MODEM_RXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)
#define	UART_MODEM_TXCTSE_MASK   (0x1U)
#define	UART_MODEM_TXCTSE_SHIFT   (0U)
#define	UART_MODEM_TXCTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)
#define	UART_MODEM_TXRTSE_MASK   (0x2U)
#define	UART_MODEM_TXRTSE_SHIFT   (1U)
#define	UART_MODEM_TXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)
#define	UART_MODEM_TXRTSPOL_MASK   (0x4U)
#define	UART_MODEM_TXRTSPOL_SHIFT   (2U)
#define	UART_MODEM_TXRTSPOL(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)
#define	UART_MODEM_RXRTSE_MASK   (0x8U)
#define	UART_MODEM_RXRTSE_SHIFT   (3U)
#define	UART_MODEM_RXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)
#define	UART_MODEM_TXCTSE_MASK   (0x1U)
#define	UART_MODEM_TXCTSE_SHIFT   (0U)
#define	UART_MODEM_TXCTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)
#define	UART_MODEM_TXRTSE_MASK   (0x2U)
#define	UART_MODEM_TXRTSE_SHIFT   (1U)
#define	UART_MODEM_TXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)
#define	UART_MODEM_TXRTSPOL_MASK   (0x4U)
#define	UART_MODEM_TXRTSPOL_SHIFT   (2U)
#define	UART_MODEM_TXRTSPOL(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)
#define	UART_MODEM_RXRTSE_MASK   (0x8U)
#define	UART_MODEM_RXRTSE_SHIFT   (3U)
#define	UART_MODEM_RXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)
#define	UART_MODEM_TXCTSE_MASK   (0x1U)
#define	UART_MODEM_TXCTSE_SHIFT   (0U)
#define	UART_MODEM_TXCTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)
#define	UART_MODEM_TXRTSE_MASK   (0x2U)
#define	UART_MODEM_TXRTSE_SHIFT   (1U)
#define	UART_MODEM_TXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)
#define	UART_MODEM_TXRTSPOL_MASK   (0x4U)
#define	UART_MODEM_TXRTSPOL_SHIFT   (2U)
#define	UART_MODEM_TXRTSPOL(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)
#define	UART_MODEM_RXRTSE_MASK   (0x8U)
#define	UART_MODEM_RXRTSE_SHIFT   (3U)
#define	UART_MODEM_RXRTSE(x)   (((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)

IR - UART Infrared Register
#define	UART_IR_TNP_MASK   (0x3U)
#define	UART_IR_TNP_SHIFT   (0U)
#define	UART_IR_TNP(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)
#define	UART_IR_IREN_MASK   (0x4U)
#define	UART_IR_IREN_SHIFT   (2U)
#define	UART_IR_IREN(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)
#define	UART_IR_TNP_MASK   0x3u
#define	UART_IR_TNP_SHIFT   0
#define	UART_IR_TNP(x)   (((uint8_t)(((uint8_t)(x))<<UART_IR_TNP_SHIFT))&UART_IR_TNP_MASK)
#define	UART_IR_IREN_MASK   0x4u
#define	UART_IR_IREN_SHIFT   2
#define	UART_IR_TNP_MASK   (0x3U)
#define	UART_IR_TNP_SHIFT   (0U)
#define	UART_IR_TNP(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)
#define	UART_IR_IREN_MASK   (0x4U)
#define	UART_IR_IREN_SHIFT   (2U)
#define	UART_IR_IREN(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)
#define	UART_IR_TNP_MASK   (0x3U)
#define	UART_IR_TNP_SHIFT   (0U)
#define	UART_IR_TNP(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)
#define	UART_IR_IREN_MASK   (0x4U)
#define	UART_IR_IREN_SHIFT   (2U)
#define	UART_IR_IREN(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)
#define	UART_IR_TNP_MASK   (0x3U)
#define	UART_IR_TNP_SHIFT   (0U)
#define	UART_IR_TNP(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)
#define	UART_IR_IREN_MASK   (0x4U)
#define	UART_IR_IREN_SHIFT   (2U)
#define	UART_IR_IREN(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)
#define	UART_IR_TNP_MASK   (0x3U)
#define	UART_IR_TNP_SHIFT   (0U)
#define	UART_IR_TNP(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)
#define	UART_IR_IREN_MASK   (0x4U)
#define	UART_IR_IREN_SHIFT   (2U)
#define	UART_IR_IREN(x)   (((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)

PFIFO - UART FIFO Parameters
#define	UART_PFIFO_RXFIFOSIZE_MASK   (0x7U)
#define	UART_PFIFO_RXFIFOSIZE_SHIFT   (0U)
#define	UART_PFIFO_RXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)
#define	UART_PFIFO_RXFE_MASK   (0x8U)
#define	UART_PFIFO_RXFE_SHIFT   (3U)
#define	UART_PFIFO_RXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)
#define	UART_PFIFO_TXFIFOSIZE_MASK   (0x70U)
#define	UART_PFIFO_TXFIFOSIZE_SHIFT   (4U)
#define	UART_PFIFO_TXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)
#define	UART_PFIFO_TXFE_MASK   (0x80U)
#define	UART_PFIFO_TXFE_SHIFT   (7U)
#define	UART_PFIFO_TXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)
#define	UART_PFIFO_RXFIFOSIZE_MASK   0x7u
#define	UART_PFIFO_RXFIFOSIZE_SHIFT   0
#define	UART_PFIFO_RXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x))<<UART_PFIFO_RXFIFOSIZE_SHIFT))&UART_PFIFO_RXFIFOSIZE_MASK)
#define	UART_PFIFO_RXFE_MASK   0x8u
#define	UART_PFIFO_RXFE_SHIFT   3
#define	UART_PFIFO_TXFIFOSIZE_MASK   0x70u
#define	UART_PFIFO_TXFIFOSIZE_SHIFT   4
#define	UART_PFIFO_TXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x))<<UART_PFIFO_TXFIFOSIZE_SHIFT))&UART_PFIFO_TXFIFOSIZE_MASK)
#define	UART_PFIFO_TXFE_MASK   0x80u
#define	UART_PFIFO_TXFE_SHIFT   7
#define	UART_PFIFO_RXFIFOSIZE_MASK   (0x7U)
#define	UART_PFIFO_RXFIFOSIZE_SHIFT   (0U)
#define	UART_PFIFO_RXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)
#define	UART_PFIFO_RXFE_MASK   (0x8U)
#define	UART_PFIFO_RXFE_SHIFT   (3U)
#define	UART_PFIFO_RXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)
#define	UART_PFIFO_TXFIFOSIZE_MASK   (0x70U)
#define	UART_PFIFO_TXFIFOSIZE_SHIFT   (4U)
#define	UART_PFIFO_TXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)
#define	UART_PFIFO_TXFE_MASK   (0x80U)
#define	UART_PFIFO_TXFE_SHIFT   (7U)
#define	UART_PFIFO_TXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)
#define	UART_PFIFO_RXFIFOSIZE_MASK   (0x7U)
#define	UART_PFIFO_RXFIFOSIZE_SHIFT   (0U)
#define	UART_PFIFO_RXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)
#define	UART_PFIFO_RXFE_MASK   (0x8U)
#define	UART_PFIFO_RXFE_SHIFT   (3U)
#define	UART_PFIFO_RXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)
#define	UART_PFIFO_TXFIFOSIZE_MASK   (0x70U)
#define	UART_PFIFO_TXFIFOSIZE_SHIFT   (4U)
#define	UART_PFIFO_TXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)
#define	UART_PFIFO_TXFE_MASK   (0x80U)
#define	UART_PFIFO_TXFE_SHIFT   (7U)
#define	UART_PFIFO_TXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)
#define	UART_PFIFO_RXFIFOSIZE_MASK   (0x7U)
#define	UART_PFIFO_RXFIFOSIZE_SHIFT   (0U)
#define	UART_PFIFO_RXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)
#define	UART_PFIFO_RXFE_MASK   (0x8U)
#define	UART_PFIFO_RXFE_SHIFT   (3U)
#define	UART_PFIFO_RXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)
#define	UART_PFIFO_TXFIFOSIZE_MASK   (0x70U)
#define	UART_PFIFO_TXFIFOSIZE_SHIFT   (4U)
#define	UART_PFIFO_TXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)
#define	UART_PFIFO_TXFE_MASK   (0x80U)
#define	UART_PFIFO_TXFE_SHIFT   (7U)
#define	UART_PFIFO_TXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)
#define	UART_PFIFO_RXFIFOSIZE_MASK   (0x7U)
#define	UART_PFIFO_RXFIFOSIZE_SHIFT   (0U)
#define	UART_PFIFO_RXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)
#define	UART_PFIFO_RXFE_MASK   (0x8U)
#define	UART_PFIFO_RXFE_SHIFT   (3U)
#define	UART_PFIFO_RXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)
#define	UART_PFIFO_TXFIFOSIZE_MASK   (0x70U)
#define	UART_PFIFO_TXFIFOSIZE_SHIFT   (4U)
#define	UART_PFIFO_TXFIFOSIZE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)
#define	UART_PFIFO_TXFE_MASK   (0x80U)
#define	UART_PFIFO_TXFE_SHIFT   (7U)
#define	UART_PFIFO_TXFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)

CFIFO - UART FIFO Control Register
#define	UART_CFIFO_RXUFE_MASK   (0x1U)
#define	UART_CFIFO_RXUFE_SHIFT   (0U)
#define	UART_CFIFO_RXUFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)
#define	UART_CFIFO_TXOFE_MASK   (0x2U)
#define	UART_CFIFO_TXOFE_SHIFT   (1U)
#define	UART_CFIFO_TXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)
#define	UART_CFIFO_RXOFE_MASK   (0x4U)
#define	UART_CFIFO_RXOFE_SHIFT   (2U)
#define	UART_CFIFO_RXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)
#define	UART_CFIFO_RXFLUSH_MASK   (0x40U)
#define	UART_CFIFO_RXFLUSH_SHIFT   (6U)
#define	UART_CFIFO_RXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)
#define	UART_CFIFO_TXFLUSH_MASK   (0x80U)
#define	UART_CFIFO_TXFLUSH_SHIFT   (7U)
#define	UART_CFIFO_TXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)
#define	UART_CFIFO_RXUFE_MASK   0x1u
#define	UART_CFIFO_RXUFE_SHIFT   0
#define	UART_CFIFO_TXOFE_MASK   0x2u
#define	UART_CFIFO_TXOFE_SHIFT   1
#define	UART_CFIFO_RXFLUSH_MASK   0x40u
#define	UART_CFIFO_RXFLUSH_SHIFT   6
#define	UART_CFIFO_TXFLUSH_MASK   0x80u
#define	UART_CFIFO_TXFLUSH_SHIFT   7
#define	UART_CFIFO_RXUFE_MASK   (0x1U)
#define	UART_CFIFO_RXUFE_SHIFT   (0U)
#define	UART_CFIFO_RXUFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)
#define	UART_CFIFO_TXOFE_MASK   (0x2U)
#define	UART_CFIFO_TXOFE_SHIFT   (1U)
#define	UART_CFIFO_TXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)
#define	UART_CFIFO_RXOFE_MASK   (0x4U)
#define	UART_CFIFO_RXOFE_SHIFT   (2U)
#define	UART_CFIFO_RXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)
#define	UART_CFIFO_RXFLUSH_MASK   (0x40U)
#define	UART_CFIFO_RXFLUSH_SHIFT   (6U)
#define	UART_CFIFO_RXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)
#define	UART_CFIFO_TXFLUSH_MASK   (0x80U)
#define	UART_CFIFO_TXFLUSH_SHIFT   (7U)
#define	UART_CFIFO_TXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)
#define	UART_CFIFO_RXUFE_MASK   (0x1U)
#define	UART_CFIFO_RXUFE_SHIFT   (0U)
#define	UART_CFIFO_RXUFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)
#define	UART_CFIFO_TXOFE_MASK   (0x2U)
#define	UART_CFIFO_TXOFE_SHIFT   (1U)
#define	UART_CFIFO_TXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)
#define	UART_CFIFO_RXOFE_MASK   (0x4U)
#define	UART_CFIFO_RXOFE_SHIFT   (2U)
#define	UART_CFIFO_RXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)
#define	UART_CFIFO_RXFLUSH_MASK   (0x40U)
#define	UART_CFIFO_RXFLUSH_SHIFT   (6U)
#define	UART_CFIFO_RXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)
#define	UART_CFIFO_TXFLUSH_MASK   (0x80U)
#define	UART_CFIFO_TXFLUSH_SHIFT   (7U)
#define	UART_CFIFO_TXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)
#define	UART_CFIFO_RXUFE_MASK   (0x1U)
#define	UART_CFIFO_RXUFE_SHIFT   (0U)
#define	UART_CFIFO_RXUFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)
#define	UART_CFIFO_TXOFE_MASK   (0x2U)
#define	UART_CFIFO_TXOFE_SHIFT   (1U)
#define	UART_CFIFO_TXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)
#define	UART_CFIFO_RXOFE_MASK   (0x4U)
#define	UART_CFIFO_RXOFE_SHIFT   (2U)
#define	UART_CFIFO_RXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)
#define	UART_CFIFO_RXFLUSH_MASK   (0x40U)
#define	UART_CFIFO_RXFLUSH_SHIFT   (6U)
#define	UART_CFIFO_RXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)
#define	UART_CFIFO_TXFLUSH_MASK   (0x80U)
#define	UART_CFIFO_TXFLUSH_SHIFT   (7U)
#define	UART_CFIFO_TXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)
#define	UART_CFIFO_RXUFE_MASK   (0x1U)
#define	UART_CFIFO_RXUFE_SHIFT   (0U)
#define	UART_CFIFO_RXUFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)
#define	UART_CFIFO_TXOFE_MASK   (0x2U)
#define	UART_CFIFO_TXOFE_SHIFT   (1U)
#define	UART_CFIFO_TXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)
#define	UART_CFIFO_RXOFE_MASK   (0x4U)
#define	UART_CFIFO_RXOFE_SHIFT   (2U)
#define	UART_CFIFO_RXOFE(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)
#define	UART_CFIFO_RXFLUSH_MASK   (0x40U)
#define	UART_CFIFO_RXFLUSH_SHIFT   (6U)
#define	UART_CFIFO_RXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)
#define	UART_CFIFO_TXFLUSH_MASK   (0x80U)
#define	UART_CFIFO_TXFLUSH_SHIFT   (7U)
#define	UART_CFIFO_TXFLUSH(x)   (((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)

SFIFO - UART FIFO Status Register
#define	UART_SFIFO_RXUF_MASK   (0x1U)
#define	UART_SFIFO_RXUF_SHIFT   (0U)
#define	UART_SFIFO_RXUF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)
#define	UART_SFIFO_TXOF_MASK   (0x2U)
#define	UART_SFIFO_TXOF_SHIFT   (1U)
#define	UART_SFIFO_TXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)
#define	UART_SFIFO_RXOF_MASK   (0x4U)
#define	UART_SFIFO_RXOF_SHIFT   (2U)
#define	UART_SFIFO_RXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)
#define	UART_SFIFO_RXEMPT_MASK   (0x40U)
#define	UART_SFIFO_RXEMPT_SHIFT   (6U)
#define	UART_SFIFO_RXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)
#define	UART_SFIFO_TXEMPT_MASK   (0x80U)
#define	UART_SFIFO_TXEMPT_SHIFT   (7U)
#define	UART_SFIFO_TXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)
#define	UART_SFIFO_RXUF_MASK   0x1u
#define	UART_SFIFO_RXUF_SHIFT   0
#define	UART_SFIFO_TXOF_MASK   0x2u
#define	UART_SFIFO_TXOF_SHIFT   1
#define	UART_SFIFO_RXEMPT_MASK   0x40u
#define	UART_SFIFO_RXEMPT_SHIFT   6
#define	UART_SFIFO_TXEMPT_MASK   0x80u
#define	UART_SFIFO_TXEMPT_SHIFT   7
#define	UART_SFIFO_RXUF_MASK   (0x1U)
#define	UART_SFIFO_RXUF_SHIFT   (0U)
#define	UART_SFIFO_RXUF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)
#define	UART_SFIFO_TXOF_MASK   (0x2U)
#define	UART_SFIFO_TXOF_SHIFT   (1U)
#define	UART_SFIFO_TXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)
#define	UART_SFIFO_RXOF_MASK   (0x4U)
#define	UART_SFIFO_RXOF_SHIFT   (2U)
#define	UART_SFIFO_RXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)
#define	UART_SFIFO_RXEMPT_MASK   (0x40U)
#define	UART_SFIFO_RXEMPT_SHIFT   (6U)
#define	UART_SFIFO_RXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)
#define	UART_SFIFO_TXEMPT_MASK   (0x80U)
#define	UART_SFIFO_TXEMPT_SHIFT   (7U)
#define	UART_SFIFO_TXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)
#define	UART_SFIFO_RXUF_MASK   (0x1U)
#define	UART_SFIFO_RXUF_SHIFT   (0U)
#define	UART_SFIFO_RXUF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)
#define	UART_SFIFO_TXOF_MASK   (0x2U)
#define	UART_SFIFO_TXOF_SHIFT   (1U)
#define	UART_SFIFO_TXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)
#define	UART_SFIFO_RXOF_MASK   (0x4U)
#define	UART_SFIFO_RXOF_SHIFT   (2U)
#define	UART_SFIFO_RXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)
#define	UART_SFIFO_RXEMPT_MASK   (0x40U)
#define	UART_SFIFO_RXEMPT_SHIFT   (6U)
#define	UART_SFIFO_RXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)
#define	UART_SFIFO_TXEMPT_MASK   (0x80U)
#define	UART_SFIFO_TXEMPT_SHIFT   (7U)
#define	UART_SFIFO_TXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)
#define	UART_SFIFO_RXUF_MASK   (0x1U)
#define	UART_SFIFO_RXUF_SHIFT   (0U)
#define	UART_SFIFO_RXUF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)
#define	UART_SFIFO_TXOF_MASK   (0x2U)
#define	UART_SFIFO_TXOF_SHIFT   (1U)
#define	UART_SFIFO_TXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)
#define	UART_SFIFO_RXOF_MASK   (0x4U)
#define	UART_SFIFO_RXOF_SHIFT   (2U)
#define	UART_SFIFO_RXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)
#define	UART_SFIFO_RXEMPT_MASK   (0x40U)
#define	UART_SFIFO_RXEMPT_SHIFT   (6U)
#define	UART_SFIFO_RXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)
#define	UART_SFIFO_TXEMPT_MASK   (0x80U)
#define	UART_SFIFO_TXEMPT_SHIFT   (7U)
#define	UART_SFIFO_TXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)
#define	UART_SFIFO_RXUF_MASK   (0x1U)
#define	UART_SFIFO_RXUF_SHIFT   (0U)
#define	UART_SFIFO_RXUF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)
#define	UART_SFIFO_TXOF_MASK   (0x2U)
#define	UART_SFIFO_TXOF_SHIFT   (1U)
#define	UART_SFIFO_TXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)
#define	UART_SFIFO_RXOF_MASK   (0x4U)
#define	UART_SFIFO_RXOF_SHIFT   (2U)
#define	UART_SFIFO_RXOF(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)
#define	UART_SFIFO_RXEMPT_MASK   (0x40U)
#define	UART_SFIFO_RXEMPT_SHIFT   (6U)
#define	UART_SFIFO_RXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)
#define	UART_SFIFO_TXEMPT_MASK   (0x80U)
#define	UART_SFIFO_TXEMPT_SHIFT   (7U)
#define	UART_SFIFO_TXEMPT(x)   (((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)

TWFIFO - UART FIFO Transmit Watermark
#define	UART_TWFIFO_TXWATER_MASK   (0xFFU)
#define	UART_TWFIFO_TXWATER_SHIFT   (0U)
#define	UART_TWFIFO_TXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_TWFIFO_TXWATER_SHIFT)) & UART_TWFIFO_TXWATER_MASK)
#define	UART_TWFIFO_TXWATER_MASK   0xFFu
#define	UART_TWFIFO_TXWATER_SHIFT   0
#define	UART_TWFIFO_TXWATER(x)   (((uint8_t)(((uint8_t)(x))<<UART_TWFIFO_TXWATER_SHIFT))&UART_TWFIFO_TXWATER_MASK)
#define	UART_TWFIFO_TXWATER_MASK   (0xFFU)
#define	UART_TWFIFO_TXWATER_SHIFT   (0U)
#define	UART_TWFIFO_TXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_TWFIFO_TXWATER_SHIFT)) & UART_TWFIFO_TXWATER_MASK)
#define	UART_TWFIFO_TXWATER_MASK   (0xFFU)
#define	UART_TWFIFO_TXWATER_SHIFT   (0U)
#define	UART_TWFIFO_TXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_TWFIFO_TXWATER_SHIFT)) & UART_TWFIFO_TXWATER_MASK)
#define	UART_TWFIFO_TXWATER_MASK   (0xFFU)
#define	UART_TWFIFO_TXWATER_SHIFT   (0U)
#define	UART_TWFIFO_TXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_TWFIFO_TXWATER_SHIFT)) & UART_TWFIFO_TXWATER_MASK)
#define	UART_TWFIFO_TXWATER_MASK   (0xFFU)
#define	UART_TWFIFO_TXWATER_SHIFT   (0U)
#define	UART_TWFIFO_TXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_TWFIFO_TXWATER_SHIFT)) & UART_TWFIFO_TXWATER_MASK)

TCFIFO - UART FIFO Transmit Count
#define	UART_TCFIFO_TXCOUNT_MASK   (0xFFU)
#define	UART_TCFIFO_TXCOUNT_SHIFT   (0U)
#define	UART_TCFIFO_TXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_TCFIFO_TXCOUNT_SHIFT)) & UART_TCFIFO_TXCOUNT_MASK)
#define	UART_TCFIFO_TXCOUNT_MASK   0xFFu
#define	UART_TCFIFO_TXCOUNT_SHIFT   0
#define	UART_TCFIFO_TXCOUNT(x)   (((uint8_t)(((uint8_t)(x))<<UART_TCFIFO_TXCOUNT_SHIFT))&UART_TCFIFO_TXCOUNT_MASK)
#define	UART_TCFIFO_TXCOUNT_MASK   (0xFFU)
#define	UART_TCFIFO_TXCOUNT_SHIFT   (0U)
#define	UART_TCFIFO_TXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_TCFIFO_TXCOUNT_SHIFT)) & UART_TCFIFO_TXCOUNT_MASK)
#define	UART_TCFIFO_TXCOUNT_MASK   (0xFFU)
#define	UART_TCFIFO_TXCOUNT_SHIFT   (0U)
#define	UART_TCFIFO_TXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_TCFIFO_TXCOUNT_SHIFT)) & UART_TCFIFO_TXCOUNT_MASK)
#define	UART_TCFIFO_TXCOUNT_MASK   (0xFFU)
#define	UART_TCFIFO_TXCOUNT_SHIFT   (0U)
#define	UART_TCFIFO_TXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_TCFIFO_TXCOUNT_SHIFT)) & UART_TCFIFO_TXCOUNT_MASK)
#define	UART_TCFIFO_TXCOUNT_MASK   (0xFFU)
#define	UART_TCFIFO_TXCOUNT_SHIFT   (0U)
#define	UART_TCFIFO_TXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_TCFIFO_TXCOUNT_SHIFT)) & UART_TCFIFO_TXCOUNT_MASK)

RWFIFO - UART FIFO Receive Watermark
#define	UART_RWFIFO_RXWATER_MASK   (0xFFU)
#define	UART_RWFIFO_RXWATER_SHIFT   (0U)
#define	UART_RWFIFO_RXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_RWFIFO_RXWATER_SHIFT)) & UART_RWFIFO_RXWATER_MASK)
#define	UART_RWFIFO_RXWATER_MASK   0xFFu
#define	UART_RWFIFO_RXWATER_SHIFT   0
#define	UART_RWFIFO_RXWATER(x)   (((uint8_t)(((uint8_t)(x))<<UART_RWFIFO_RXWATER_SHIFT))&UART_RWFIFO_RXWATER_MASK)
#define	UART_RWFIFO_RXWATER_MASK   (0xFFU)
#define	UART_RWFIFO_RXWATER_SHIFT   (0U)
#define	UART_RWFIFO_RXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_RWFIFO_RXWATER_SHIFT)) & UART_RWFIFO_RXWATER_MASK)
#define	UART_RWFIFO_RXWATER_MASK   (0xFFU)
#define	UART_RWFIFO_RXWATER_SHIFT   (0U)
#define	UART_RWFIFO_RXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_RWFIFO_RXWATER_SHIFT)) & UART_RWFIFO_RXWATER_MASK)
#define	UART_RWFIFO_RXWATER_MASK   (0xFFU)
#define	UART_RWFIFO_RXWATER_SHIFT   (0U)
#define	UART_RWFIFO_RXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_RWFIFO_RXWATER_SHIFT)) & UART_RWFIFO_RXWATER_MASK)
#define	UART_RWFIFO_RXWATER_MASK   (0xFFU)
#define	UART_RWFIFO_RXWATER_SHIFT   (0U)
#define	UART_RWFIFO_RXWATER(x)   (((uint8_t)(((uint8_t)(x)) << UART_RWFIFO_RXWATER_SHIFT)) & UART_RWFIFO_RXWATER_MASK)

RCFIFO - UART FIFO Receive Count
#define	UART_RCFIFO_RXCOUNT_MASK   (0xFFU)
#define	UART_RCFIFO_RXCOUNT_SHIFT   (0U)
#define	UART_RCFIFO_RXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_RCFIFO_RXCOUNT_SHIFT)) & UART_RCFIFO_RXCOUNT_MASK)
#define	UART_RCFIFO_RXCOUNT_MASK   0xFFu
#define	UART_RCFIFO_RXCOUNT_SHIFT   0
#define	UART_RCFIFO_RXCOUNT(x)   (((uint8_t)(((uint8_t)(x))<<UART_RCFIFO_RXCOUNT_SHIFT))&UART_RCFIFO_RXCOUNT_MASK)
#define	UART_RCFIFO_RXCOUNT_MASK   (0xFFU)
#define	UART_RCFIFO_RXCOUNT_SHIFT   (0U)
#define	UART_RCFIFO_RXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_RCFIFO_RXCOUNT_SHIFT)) & UART_RCFIFO_RXCOUNT_MASK)
#define	UART_RCFIFO_RXCOUNT_MASK   (0xFFU)
#define	UART_RCFIFO_RXCOUNT_SHIFT   (0U)
#define	UART_RCFIFO_RXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_RCFIFO_RXCOUNT_SHIFT)) & UART_RCFIFO_RXCOUNT_MASK)
#define	UART_RCFIFO_RXCOUNT_MASK   (0xFFU)
#define	UART_RCFIFO_RXCOUNT_SHIFT   (0U)
#define	UART_RCFIFO_RXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_RCFIFO_RXCOUNT_SHIFT)) & UART_RCFIFO_RXCOUNT_MASK)
#define	UART_RCFIFO_RXCOUNT_MASK   (0xFFU)
#define	UART_RCFIFO_RXCOUNT_SHIFT   (0U)
#define	UART_RCFIFO_RXCOUNT(x)   (((uint8_t)(((uint8_t)(x)) << UART_RCFIFO_RXCOUNT_SHIFT)) & UART_RCFIFO_RXCOUNT_MASK)

C7816 - UART 7816 Control Register
#define	UART_C7816_ISO_7816E_MASK   (0x1U)
#define	UART_C7816_ISO_7816E_SHIFT   (0U)
#define	UART_C7816_ISO_7816E(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)
#define	UART_C7816_TTYPE_MASK   (0x2U)
#define	UART_C7816_TTYPE_SHIFT   (1U)
#define	UART_C7816_TTYPE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)
#define	UART_C7816_INIT_MASK   (0x4U)
#define	UART_C7816_INIT_SHIFT   (2U)
#define	UART_C7816_INIT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)
#define	UART_C7816_ANACK_MASK   (0x8U)
#define	UART_C7816_ANACK_SHIFT   (3U)
#define	UART_C7816_ANACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)
#define	UART_C7816_ONACK_MASK   (0x10U)
#define	UART_C7816_ONACK_SHIFT   (4U)
#define	UART_C7816_ONACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)
#define	UART_C7816_ISO_7816E_MASK   0x1u
#define	UART_C7816_ISO_7816E_SHIFT   0
#define	UART_C7816_TTYPE_MASK   0x2u
#define	UART_C7816_TTYPE_SHIFT   1
#define	UART_C7816_INIT_MASK   0x4u
#define	UART_C7816_INIT_SHIFT   2
#define	UART_C7816_ANACK_MASK   0x8u
#define	UART_C7816_ANACK_SHIFT   3
#define	UART_C7816_ONACK_MASK   0x10u
#define	UART_C7816_ONACK_SHIFT   4
#define	UART_C7816_ISO_7816E_MASK   (0x1U)
#define	UART_C7816_ISO_7816E_SHIFT   (0U)
#define	UART_C7816_ISO_7816E(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)
#define	UART_C7816_TTYPE_MASK   (0x2U)
#define	UART_C7816_TTYPE_SHIFT   (1U)
#define	UART_C7816_TTYPE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)
#define	UART_C7816_INIT_MASK   (0x4U)
#define	UART_C7816_INIT_SHIFT   (2U)
#define	UART_C7816_INIT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)
#define	UART_C7816_ANACK_MASK   (0x8U)
#define	UART_C7816_ANACK_SHIFT   (3U)
#define	UART_C7816_ANACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)
#define	UART_C7816_ONACK_MASK   (0x10U)
#define	UART_C7816_ONACK_SHIFT   (4U)
#define	UART_C7816_ONACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)
#define	UART_C7816_ISO_7816E_MASK   (0x1U)
#define	UART_C7816_ISO_7816E_SHIFT   (0U)
#define	UART_C7816_ISO_7816E(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)
#define	UART_C7816_TTYPE_MASK   (0x2U)
#define	UART_C7816_TTYPE_SHIFT   (1U)
#define	UART_C7816_TTYPE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)
#define	UART_C7816_INIT_MASK   (0x4U)
#define	UART_C7816_INIT_SHIFT   (2U)
#define	UART_C7816_INIT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)
#define	UART_C7816_ANACK_MASK   (0x8U)
#define	UART_C7816_ANACK_SHIFT   (3U)
#define	UART_C7816_ANACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)
#define	UART_C7816_ONACK_MASK   (0x10U)
#define	UART_C7816_ONACK_SHIFT   (4U)
#define	UART_C7816_ONACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)
#define	UART_C7816_ISO_7816E_MASK   (0x1U)
#define	UART_C7816_ISO_7816E_SHIFT   (0U)
#define	UART_C7816_ISO_7816E(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)
#define	UART_C7816_TTYPE_MASK   (0x2U)
#define	UART_C7816_TTYPE_SHIFT   (1U)
#define	UART_C7816_TTYPE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)
#define	UART_C7816_INIT_MASK   (0x4U)
#define	UART_C7816_INIT_SHIFT   (2U)
#define	UART_C7816_INIT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)
#define	UART_C7816_ANACK_MASK   (0x8U)
#define	UART_C7816_ANACK_SHIFT   (3U)
#define	UART_C7816_ANACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)
#define	UART_C7816_ONACK_MASK   (0x10U)
#define	UART_C7816_ONACK_SHIFT   (4U)
#define	UART_C7816_ONACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)
#define	UART_C7816_ISO_7816E_MASK   (0x1U)
#define	UART_C7816_ISO_7816E_SHIFT   (0U)
#define	UART_C7816_ISO_7816E(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)
#define	UART_C7816_TTYPE_MASK   (0x2U)
#define	UART_C7816_TTYPE_SHIFT   (1U)
#define	UART_C7816_TTYPE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)
#define	UART_C7816_INIT_MASK   (0x4U)
#define	UART_C7816_INIT_SHIFT   (2U)
#define	UART_C7816_INIT(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)
#define	UART_C7816_ANACK_MASK   (0x8U)
#define	UART_C7816_ANACK_SHIFT   (3U)
#define	UART_C7816_ANACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)
#define	UART_C7816_ONACK_MASK   (0x10U)
#define	UART_C7816_ONACK_SHIFT   (4U)
#define	UART_C7816_ONACK(x)   (((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)

IE7816 - UART 7816 Interrupt Enable Register
#define	UART_IE7816_RXTE_MASK   (0x1U)
#define	UART_IE7816_RXTE_SHIFT   (0U)
#define	UART_IE7816_RXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)
#define	UART_IE7816_TXTE_MASK   (0x2U)
#define	UART_IE7816_TXTE_SHIFT   (1U)
#define	UART_IE7816_TXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)
#define	UART_IE7816_GTVE_MASK   (0x4U)
#define	UART_IE7816_GTVE_SHIFT   (2U)
#define	UART_IE7816_GTVE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)
#define	UART_IE7816_INITDE_MASK   (0x10U)
#define	UART_IE7816_INITDE_SHIFT   (4U)
#define	UART_IE7816_INITDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)
#define	UART_IE7816_BWTE_MASK   (0x20U)
#define	UART_IE7816_BWTE_SHIFT   (5U)
#define	UART_IE7816_BWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)
#define	UART_IE7816_CWTE_MASK   (0x40U)
#define	UART_IE7816_CWTE_SHIFT   (6U)
#define	UART_IE7816_CWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)
#define	UART_IE7816_WTE_MASK   (0x80U)
#define	UART_IE7816_WTE_SHIFT   (7U)
#define	UART_IE7816_WTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)
#define	UART_IE7816_RXTE_MASK   0x1u
#define	UART_IE7816_RXTE_SHIFT   0
#define	UART_IE7816_TXTE_MASK   0x2u
#define	UART_IE7816_TXTE_SHIFT   1
#define	UART_IE7816_GTVE_MASK   0x4u
#define	UART_IE7816_GTVE_SHIFT   2
#define	UART_IE7816_INITDE_MASK   0x10u
#define	UART_IE7816_INITDE_SHIFT   4
#define	UART_IE7816_BWTE_MASK   0x20u
#define	UART_IE7816_BWTE_SHIFT   5
#define	UART_IE7816_CWTE_MASK   0x40u
#define	UART_IE7816_CWTE_SHIFT   6
#define	UART_IE7816_WTE_MASK   0x80u
#define	UART_IE7816_WTE_SHIFT   7
#define	UART_IE7816_RXTE_MASK   (0x1U)
#define	UART_IE7816_RXTE_SHIFT   (0U)
#define	UART_IE7816_RXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)
#define	UART_IE7816_TXTE_MASK   (0x2U)
#define	UART_IE7816_TXTE_SHIFT   (1U)
#define	UART_IE7816_TXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)
#define	UART_IE7816_GTVE_MASK   (0x4U)
#define	UART_IE7816_GTVE_SHIFT   (2U)
#define	UART_IE7816_GTVE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)
#define	UART_IE7816_INITDE_MASK   (0x10U)
#define	UART_IE7816_INITDE_SHIFT   (4U)
#define	UART_IE7816_INITDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)
#define	UART_IE7816_BWTE_MASK   (0x20U)
#define	UART_IE7816_BWTE_SHIFT   (5U)
#define	UART_IE7816_BWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)
#define	UART_IE7816_CWTE_MASK   (0x40U)
#define	UART_IE7816_CWTE_SHIFT   (6U)
#define	UART_IE7816_CWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)
#define	UART_IE7816_WTE_MASK   (0x80U)
#define	UART_IE7816_WTE_SHIFT   (7U)
#define	UART_IE7816_WTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)
#define	UART_IE7816_RXTE_MASK   (0x1U)
#define	UART_IE7816_RXTE_SHIFT   (0U)
#define	UART_IE7816_RXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)
#define	UART_IE7816_TXTE_MASK   (0x2U)
#define	UART_IE7816_TXTE_SHIFT   (1U)
#define	UART_IE7816_TXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)
#define	UART_IE7816_GTVE_MASK   (0x4U)
#define	UART_IE7816_GTVE_SHIFT   (2U)
#define	UART_IE7816_GTVE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)
#define	UART_IE7816_ADTE_MASK   (0x8U)
#define	UART_IE7816_ADTE_SHIFT   (3U)
#define	UART_IE7816_ADTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_ADTE_SHIFT)) & UART_IE7816_ADTE_MASK)
#define	UART_IE7816_INITDE_MASK   (0x10U)
#define	UART_IE7816_INITDE_SHIFT   (4U)
#define	UART_IE7816_INITDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)
#define	UART_IE7816_BWTE_MASK   (0x20U)
#define	UART_IE7816_BWTE_SHIFT   (5U)
#define	UART_IE7816_BWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)
#define	UART_IE7816_CWTE_MASK   (0x40U)
#define	UART_IE7816_CWTE_SHIFT   (6U)
#define	UART_IE7816_CWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)
#define	UART_IE7816_WTE_MASK   (0x80U)
#define	UART_IE7816_WTE_SHIFT   (7U)
#define	UART_IE7816_WTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)
#define	UART_IE7816_RXTE_MASK   (0x1U)
#define	UART_IE7816_RXTE_SHIFT   (0U)
#define	UART_IE7816_RXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)
#define	UART_IE7816_TXTE_MASK   (0x2U)
#define	UART_IE7816_TXTE_SHIFT   (1U)
#define	UART_IE7816_TXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)
#define	UART_IE7816_GTVE_MASK   (0x4U)
#define	UART_IE7816_GTVE_SHIFT   (2U)
#define	UART_IE7816_GTVE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)
#define	UART_IE7816_ADTE_MASK   (0x8U)
#define	UART_IE7816_ADTE_SHIFT   (3U)
#define	UART_IE7816_ADTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_ADTE_SHIFT)) & UART_IE7816_ADTE_MASK)
#define	UART_IE7816_INITDE_MASK   (0x10U)
#define	UART_IE7816_INITDE_SHIFT   (4U)
#define	UART_IE7816_INITDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)
#define	UART_IE7816_BWTE_MASK   (0x20U)
#define	UART_IE7816_BWTE_SHIFT   (5U)
#define	UART_IE7816_BWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)
#define	UART_IE7816_CWTE_MASK   (0x40U)
#define	UART_IE7816_CWTE_SHIFT   (6U)
#define	UART_IE7816_CWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)
#define	UART_IE7816_WTE_MASK   (0x80U)
#define	UART_IE7816_WTE_SHIFT   (7U)
#define	UART_IE7816_WTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)
#define	UART_IE7816_RXTE_MASK   (0x1U)
#define	UART_IE7816_RXTE_SHIFT   (0U)
#define	UART_IE7816_RXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)
#define	UART_IE7816_TXTE_MASK   (0x2U)
#define	UART_IE7816_TXTE_SHIFT   (1U)
#define	UART_IE7816_TXTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)
#define	UART_IE7816_GTVE_MASK   (0x4U)
#define	UART_IE7816_GTVE_SHIFT   (2U)
#define	UART_IE7816_GTVE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)
#define	UART_IE7816_ADTE_MASK   (0x8U)
#define	UART_IE7816_ADTE_SHIFT   (3U)
#define	UART_IE7816_ADTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_ADTE_SHIFT)) & UART_IE7816_ADTE_MASK)
#define	UART_IE7816_INITDE_MASK   (0x10U)
#define	UART_IE7816_INITDE_SHIFT   (4U)
#define	UART_IE7816_INITDE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)
#define	UART_IE7816_BWTE_MASK   (0x20U)
#define	UART_IE7816_BWTE_SHIFT   (5U)
#define	UART_IE7816_BWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)
#define	UART_IE7816_CWTE_MASK   (0x40U)
#define	UART_IE7816_CWTE_SHIFT   (6U)
#define	UART_IE7816_CWTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)
#define	UART_IE7816_WTE_MASK   (0x80U)
#define	UART_IE7816_WTE_SHIFT   (7U)
#define	UART_IE7816_WTE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)

IS7816 - UART 7816 Interrupt Status Register
#define	UART_IS7816_RXT_MASK   (0x1U)
#define	UART_IS7816_RXT_SHIFT   (0U)
#define	UART_IS7816_RXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)
#define	UART_IS7816_TXT_MASK   (0x2U)
#define	UART_IS7816_TXT_SHIFT   (1U)
#define	UART_IS7816_TXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)
#define	UART_IS7816_GTV_MASK   (0x4U)
#define	UART_IS7816_GTV_SHIFT   (2U)
#define	UART_IS7816_GTV(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)
#define	UART_IS7816_INITD_MASK   (0x10U)
#define	UART_IS7816_INITD_SHIFT   (4U)
#define	UART_IS7816_INITD(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)
#define	UART_IS7816_BWT_MASK   (0x20U)
#define	UART_IS7816_BWT_SHIFT   (5U)
#define	UART_IS7816_BWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)
#define	UART_IS7816_CWT_MASK   (0x40U)
#define	UART_IS7816_CWT_SHIFT   (6U)
#define	UART_IS7816_CWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)
#define	UART_IS7816_WT_MASK   (0x80U)
#define	UART_IS7816_WT_SHIFT   (7U)
#define	UART_IS7816_WT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)
#define	UART_IS7816_RXT_MASK   0x1u
#define	UART_IS7816_RXT_SHIFT   0
#define	UART_IS7816_TXT_MASK   0x2u
#define	UART_IS7816_TXT_SHIFT   1
#define	UART_IS7816_GTV_MASK   0x4u
#define	UART_IS7816_GTV_SHIFT   2
#define	UART_IS7816_INITD_MASK   0x10u
#define	UART_IS7816_INITD_SHIFT   4
#define	UART_IS7816_BWT_MASK   0x20u
#define	UART_IS7816_BWT_SHIFT   5
#define	UART_IS7816_CWT_MASK   0x40u
#define	UART_IS7816_CWT_SHIFT   6
#define	UART_IS7816_WT_MASK   0x80u
#define	UART_IS7816_WT_SHIFT   7
#define	UART_IS7816_RXT_MASK   (0x1U)
#define	UART_IS7816_RXT_SHIFT   (0U)
#define	UART_IS7816_RXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)
#define	UART_IS7816_TXT_MASK   (0x2U)
#define	UART_IS7816_TXT_SHIFT   (1U)
#define	UART_IS7816_TXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)
#define	UART_IS7816_GTV_MASK   (0x4U)
#define	UART_IS7816_GTV_SHIFT   (2U)
#define	UART_IS7816_GTV(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)
#define	UART_IS7816_INITD_MASK   (0x10U)
#define	UART_IS7816_INITD_SHIFT   (4U)
#define	UART_IS7816_INITD(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)
#define	UART_IS7816_BWT_MASK   (0x20U)
#define	UART_IS7816_BWT_SHIFT   (5U)
#define	UART_IS7816_BWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)
#define	UART_IS7816_CWT_MASK   (0x40U)
#define	UART_IS7816_CWT_SHIFT   (6U)
#define	UART_IS7816_CWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)
#define	UART_IS7816_WT_MASK   (0x80U)
#define	UART_IS7816_WT_SHIFT   (7U)
#define	UART_IS7816_WT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)
#define	UART_IS7816_RXT_MASK   (0x1U)
#define	UART_IS7816_RXT_SHIFT   (0U)
#define	UART_IS7816_RXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)
#define	UART_IS7816_TXT_MASK   (0x2U)
#define	UART_IS7816_TXT_SHIFT   (1U)
#define	UART_IS7816_TXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)
#define	UART_IS7816_GTV_MASK   (0x4U)
#define	UART_IS7816_GTV_SHIFT   (2U)
#define	UART_IS7816_GTV(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)
#define	UART_IS7816_ADT_MASK   (0x8U)
#define	UART_IS7816_ADT_SHIFT   (3U)
#define	UART_IS7816_ADT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_ADT_SHIFT)) & UART_IS7816_ADT_MASK)
#define	UART_IS7816_INITD_MASK   (0x10U)
#define	UART_IS7816_INITD_SHIFT   (4U)
#define	UART_IS7816_INITD(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)
#define	UART_IS7816_BWT_MASK   (0x20U)
#define	UART_IS7816_BWT_SHIFT   (5U)
#define	UART_IS7816_BWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)
#define	UART_IS7816_CWT_MASK   (0x40U)
#define	UART_IS7816_CWT_SHIFT   (6U)
#define	UART_IS7816_CWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)
#define	UART_IS7816_WT_MASK   (0x80U)
#define	UART_IS7816_WT_SHIFT   (7U)
#define	UART_IS7816_WT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)
#define	UART_IS7816_RXT_MASK   (0x1U)
#define	UART_IS7816_RXT_SHIFT   (0U)
#define	UART_IS7816_RXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)
#define	UART_IS7816_TXT_MASK   (0x2U)
#define	UART_IS7816_TXT_SHIFT   (1U)
#define	UART_IS7816_TXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)
#define	UART_IS7816_GTV_MASK   (0x4U)
#define	UART_IS7816_GTV_SHIFT   (2U)
#define	UART_IS7816_GTV(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)
#define	UART_IS7816_ADT_MASK   (0x8U)
#define	UART_IS7816_ADT_SHIFT   (3U)
#define	UART_IS7816_ADT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_ADT_SHIFT)) & UART_IS7816_ADT_MASK)
#define	UART_IS7816_INITD_MASK   (0x10U)
#define	UART_IS7816_INITD_SHIFT   (4U)
#define	UART_IS7816_INITD(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)
#define	UART_IS7816_BWT_MASK   (0x20U)
#define	UART_IS7816_BWT_SHIFT   (5U)
#define	UART_IS7816_BWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)
#define	UART_IS7816_CWT_MASK   (0x40U)
#define	UART_IS7816_CWT_SHIFT   (6U)
#define	UART_IS7816_CWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)
#define	UART_IS7816_WT_MASK   (0x80U)
#define	UART_IS7816_WT_SHIFT   (7U)
#define	UART_IS7816_WT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)
#define	UART_IS7816_RXT_MASK   (0x1U)
#define	UART_IS7816_RXT_SHIFT   (0U)
#define	UART_IS7816_RXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)
#define	UART_IS7816_TXT_MASK   (0x2U)
#define	UART_IS7816_TXT_SHIFT   (1U)
#define	UART_IS7816_TXT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)
#define	UART_IS7816_GTV_MASK   (0x4U)
#define	UART_IS7816_GTV_SHIFT   (2U)
#define	UART_IS7816_GTV(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)
#define	UART_IS7816_ADT_MASK   (0x8U)
#define	UART_IS7816_ADT_SHIFT   (3U)
#define	UART_IS7816_ADT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_ADT_SHIFT)) & UART_IS7816_ADT_MASK)
#define	UART_IS7816_INITD_MASK   (0x10U)
#define	UART_IS7816_INITD_SHIFT   (4U)
#define	UART_IS7816_INITD(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)
#define	UART_IS7816_BWT_MASK   (0x20U)
#define	UART_IS7816_BWT_SHIFT   (5U)
#define	UART_IS7816_BWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)
#define	UART_IS7816_CWT_MASK   (0x40U)
#define	UART_IS7816_CWT_SHIFT   (6U)
#define	UART_IS7816_CWT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)
#define	UART_IS7816_WT_MASK   (0x80U)
#define	UART_IS7816_WT_SHIFT   (7U)
#define	UART_IS7816_WT(x)   (((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)

WP7816T0 - UART 7816 Wait Parameter Register
#define	UART_WP7816T0_WI_MASK   (0xFFU)
#define	UART_WP7816T0_WI_SHIFT   (0U)
#define	UART_WP7816T0_WI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816T0_WI_SHIFT)) & UART_WP7816T0_WI_MASK)
#define	UART_WP7816T0_WI_MASK   (0xFFU)
#define	UART_WP7816T0_WI_SHIFT   (0U)
#define	UART_WP7816T0_WI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816T0_WI_SHIFT)) & UART_WP7816T0_WI_MASK)

WP7816T1 - UART 7816 Wait Parameter Register
#define	UART_WP7816T1_BWI_MASK   (0xFU)
#define	UART_WP7816T1_BWI_SHIFT   (0U)
#define	UART_WP7816T1_BWI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816T1_BWI_SHIFT)) & UART_WP7816T1_BWI_MASK)
#define	UART_WP7816T1_CWI_MASK   (0xF0U)
#define	UART_WP7816T1_CWI_SHIFT   (4U)
#define	UART_WP7816T1_CWI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816T1_CWI_SHIFT)) & UART_WP7816T1_CWI_MASK)
#define	UART_WP7816T1_BWI_MASK   (0xFU)
#define	UART_WP7816T1_BWI_SHIFT   (0U)
#define	UART_WP7816T1_BWI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816T1_BWI_SHIFT)) & UART_WP7816T1_BWI_MASK)
#define	UART_WP7816T1_CWI_MASK   (0xF0U)
#define	UART_WP7816T1_CWI_SHIFT   (4U)
#define	UART_WP7816T1_CWI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816T1_CWI_SHIFT)) & UART_WP7816T1_CWI_MASK)

WN7816 - UART 7816 Wait N Register
#define	UART_WN7816_GTN_MASK   (0xFFU)
#define	UART_WN7816_GTN_SHIFT   (0U)
#define	UART_WN7816_GTN(x)   (((uint8_t)(((uint8_t)(x)) << UART_WN7816_GTN_SHIFT)) & UART_WN7816_GTN_MASK)
#define	UART_WN7816_GTN_MASK   0xFFu
#define	UART_WN7816_GTN_SHIFT   0
#define	UART_WN7816_GTN(x)   (((uint8_t)(((uint8_t)(x))<<UART_WN7816_GTN_SHIFT))&UART_WN7816_GTN_MASK)
#define	UART_WN7816_GTN_MASK   (0xFFU)
#define	UART_WN7816_GTN_SHIFT   (0U)
#define	UART_WN7816_GTN(x)   (((uint8_t)(((uint8_t)(x)) << UART_WN7816_GTN_SHIFT)) & UART_WN7816_GTN_MASK)
#define	UART_WN7816_GTN_MASK   (0xFFU)
#define	UART_WN7816_GTN_SHIFT   (0U)
#define	UART_WN7816_GTN(x)   (((uint8_t)(((uint8_t)(x)) << UART_WN7816_GTN_SHIFT)) & UART_WN7816_GTN_MASK)
#define	UART_WN7816_GTN_MASK   (0xFFU)
#define	UART_WN7816_GTN_SHIFT   (0U)
#define	UART_WN7816_GTN(x)   (((uint8_t)(((uint8_t)(x)) << UART_WN7816_GTN_SHIFT)) & UART_WN7816_GTN_MASK)
#define	UART_WN7816_GTN_MASK   (0xFFU)
#define	UART_WN7816_GTN_SHIFT   (0U)
#define	UART_WN7816_GTN(x)   (((uint8_t)(((uint8_t)(x)) << UART_WN7816_GTN_SHIFT)) & UART_WN7816_GTN_MASK)

WF7816 - UART 7816 Wait FD Register
#define	UART_WF7816_GTFD_MASK   (0xFFU)
#define	UART_WF7816_GTFD_SHIFT   (0U)
#define	UART_WF7816_GTFD(x)   (((uint8_t)(((uint8_t)(x)) << UART_WF7816_GTFD_SHIFT)) & UART_WF7816_GTFD_MASK)
#define	UART_WF7816_GTFD_MASK   0xFFu
#define	UART_WF7816_GTFD_SHIFT   0
#define	UART_WF7816_GTFD(x)   (((uint8_t)(((uint8_t)(x))<<UART_WF7816_GTFD_SHIFT))&UART_WF7816_GTFD_MASK)
#define	UART_WF7816_GTFD_MASK   (0xFFU)
#define	UART_WF7816_GTFD_SHIFT   (0U)
#define	UART_WF7816_GTFD(x)   (((uint8_t)(((uint8_t)(x)) << UART_WF7816_GTFD_SHIFT)) & UART_WF7816_GTFD_MASK)
#define	UART_WF7816_GTFD_MASK   (0xFFU)
#define	UART_WF7816_GTFD_SHIFT   (0U)
#define	UART_WF7816_GTFD(x)   (((uint8_t)(((uint8_t)(x)) << UART_WF7816_GTFD_SHIFT)) & UART_WF7816_GTFD_MASK)
#define	UART_WF7816_GTFD_MASK   (0xFFU)
#define	UART_WF7816_GTFD_SHIFT   (0U)
#define	UART_WF7816_GTFD(x)   (((uint8_t)(((uint8_t)(x)) << UART_WF7816_GTFD_SHIFT)) & UART_WF7816_GTFD_MASK)
#define	UART_WF7816_GTFD_MASK   (0xFFU)
#define	UART_WF7816_GTFD_SHIFT   (0U)
#define	UART_WF7816_GTFD(x)   (((uint8_t)(((uint8_t)(x)) << UART_WF7816_GTFD_SHIFT)) & UART_WF7816_GTFD_MASK)

ET7816 - UART 7816 Error Threshold Register
#define	UART_ET7816_RXTHRESHOLD_MASK   (0xFU)
#define	UART_ET7816_RXTHRESHOLD_SHIFT   (0U)
#define	UART_ET7816_RXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_RXTHRESHOLD_SHIFT)) & UART_ET7816_RXTHRESHOLD_MASK)
#define	UART_ET7816_TXTHRESHOLD_MASK   (0xF0U)
#define	UART_ET7816_TXTHRESHOLD_SHIFT   (4U)
#define	UART_ET7816_TXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)
#define	UART_ET7816_RXTHRESHOLD_MASK   0xFu
#define	UART_ET7816_RXTHRESHOLD_SHIFT   0
#define	UART_ET7816_RXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x))<<UART_ET7816_RXTHRESHOLD_SHIFT))&UART_ET7816_RXTHRESHOLD_MASK)
#define	UART_ET7816_TXTHRESHOLD_MASK   0xF0u
#define	UART_ET7816_TXTHRESHOLD_SHIFT   4
#define	UART_ET7816_TXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x))<<UART_ET7816_TXTHRESHOLD_SHIFT))&UART_ET7816_TXTHRESHOLD_MASK)
#define	UART_ET7816_RXTHRESHOLD_MASK   (0xFU)
#define	UART_ET7816_RXTHRESHOLD_SHIFT   (0U)
#define	UART_ET7816_RXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_RXTHRESHOLD_SHIFT)) & UART_ET7816_RXTHRESHOLD_MASK)
#define	UART_ET7816_TXTHRESHOLD_MASK   (0xF0U)
#define	UART_ET7816_TXTHRESHOLD_SHIFT   (4U)
#define	UART_ET7816_TXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)
#define	UART_ET7816_RXTHRESHOLD_MASK   (0xFU)
#define	UART_ET7816_RXTHRESHOLD_SHIFT   (0U)
#define	UART_ET7816_RXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_RXTHRESHOLD_SHIFT)) & UART_ET7816_RXTHRESHOLD_MASK)
#define	UART_ET7816_TXTHRESHOLD_MASK   (0xF0U)
#define	UART_ET7816_TXTHRESHOLD_SHIFT   (4U)
#define	UART_ET7816_TXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)
#define	UART_ET7816_RXTHRESHOLD_MASK   (0xFU)
#define	UART_ET7816_RXTHRESHOLD_SHIFT   (0U)
#define	UART_ET7816_RXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_RXTHRESHOLD_SHIFT)) & UART_ET7816_RXTHRESHOLD_MASK)
#define	UART_ET7816_TXTHRESHOLD_MASK   (0xF0U)
#define	UART_ET7816_TXTHRESHOLD_SHIFT   (4U)
#define	UART_ET7816_TXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)
#define	UART_ET7816_RXTHRESHOLD_MASK   (0xFU)
#define	UART_ET7816_RXTHRESHOLD_SHIFT   (0U)
#define	UART_ET7816_RXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_RXTHRESHOLD_SHIFT)) & UART_ET7816_RXTHRESHOLD_MASK)
#define	UART_ET7816_TXTHRESHOLD_MASK   (0xF0U)
#define	UART_ET7816_TXTHRESHOLD_SHIFT   (4U)
#define	UART_ET7816_TXTHRESHOLD(x)   (((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)

TL7816 - UART 7816 Transmit Length Register
#define	UART_TL7816_TLEN_MASK   (0xFFU)
#define	UART_TL7816_TLEN_SHIFT   (0U)
#define	UART_TL7816_TLEN(x)   (((uint8_t)(((uint8_t)(x)) << UART_TL7816_TLEN_SHIFT)) & UART_TL7816_TLEN_MASK)
#define	UART_TL7816_TLEN_MASK   0xFFu
#define	UART_TL7816_TLEN_SHIFT   0
#define	UART_TL7816_TLEN(x)   (((uint8_t)(((uint8_t)(x))<<UART_TL7816_TLEN_SHIFT))&UART_TL7816_TLEN_MASK)
#define	UART_TL7816_TLEN_MASK   (0xFFU)
#define	UART_TL7816_TLEN_SHIFT   (0U)
#define	UART_TL7816_TLEN(x)   (((uint8_t)(((uint8_t)(x)) << UART_TL7816_TLEN_SHIFT)) & UART_TL7816_TLEN_MASK)
#define	UART_TL7816_TLEN_MASK   (0xFFU)
#define	UART_TL7816_TLEN_SHIFT   (0U)
#define	UART_TL7816_TLEN(x)   (((uint8_t)(((uint8_t)(x)) << UART_TL7816_TLEN_SHIFT)) & UART_TL7816_TLEN_MASK)
#define	UART_TL7816_TLEN_MASK   (0xFFU)
#define	UART_TL7816_TLEN_SHIFT   (0U)
#define	UART_TL7816_TLEN(x)   (((uint8_t)(((uint8_t)(x)) << UART_TL7816_TLEN_SHIFT)) & UART_TL7816_TLEN_MASK)
#define	UART_TL7816_TLEN_MASK   (0xFFU)
#define	UART_TL7816_TLEN_SHIFT   (0U)
#define	UART_TL7816_TLEN(x)   (((uint8_t)(((uint8_t)(x)) << UART_TL7816_TLEN_SHIFT)) & UART_TL7816_TLEN_MASK)

C6 - UART CEA709.1-B Control Register 6
#define	UART_C6_CP_MASK   (0x10U)
#define	UART_C6_CP_SHIFT   (4U)
#define	UART_C6_CP(x)   (((uint8_t)(((uint8_t)(x)) << UART_C6_CP_SHIFT)) & UART_C6_CP_MASK)
#define	UART_C6_CE_MASK   (0x20U)
#define	UART_C6_CE_SHIFT   (5U)
#define	UART_C6_CE(x)   (((uint8_t)(((uint8_t)(x)) << UART_C6_CE_SHIFT)) & UART_C6_CE_MASK)
#define	UART_C6_TX709_MASK   (0x40U)
#define	UART_C6_TX709_SHIFT   (6U)
#define	UART_C6_TX709(x)   (((uint8_t)(((uint8_t)(x)) << UART_C6_TX709_SHIFT)) & UART_C6_TX709_MASK)
#define	UART_C6_EN709_MASK   (0x80U)
#define	UART_C6_EN709_SHIFT   (7U)
#define	UART_C6_EN709(x)   (((uint8_t)(((uint8_t)(x)) << UART_C6_EN709_SHIFT)) & UART_C6_EN709_MASK)

PCTH - UART CEA709.1-B Packet Cycle Time Counter High
#define	UART_PCTH_PCTH_MASK   (0xFFU)
#define	UART_PCTH_PCTH_SHIFT   (0U)
#define	UART_PCTH_PCTH(x)   (((uint8_t)(((uint8_t)(x)) << UART_PCTH_PCTH_SHIFT)) & UART_PCTH_PCTH_MASK)

PCTL - UART CEA709.1-B Packet Cycle Time Counter Low
#define	UART_PCTL_PCTL_MASK   (0xFFU)
#define	UART_PCTL_PCTL_SHIFT   (0U)
#define	UART_PCTL_PCTL(x)   (((uint8_t)(((uint8_t)(x)) << UART_PCTL_PCTL_SHIFT)) & UART_PCTL_PCTL_MASK)

B1T - UART CEA709.1-B Beta1 Timer
#define	UART_B1T_B1T_MASK   (0xFFU)
#define	UART_B1T_B1T_SHIFT   (0U)
#define	UART_B1T_B1T(x)   (((uint8_t)(((uint8_t)(x)) << UART_B1T_B1T_SHIFT)) & UART_B1T_B1T_MASK)

SDTH - UART CEA709.1-B Secondary Delay Timer High
#define	UART_SDTH_SDTH_MASK   (0xFFU)
#define	UART_SDTH_SDTH_SHIFT   (0U)
#define	UART_SDTH_SDTH(x)   (((uint8_t)(((uint8_t)(x)) << UART_SDTH_SDTH_SHIFT)) & UART_SDTH_SDTH_MASK)

SDTL - UART CEA709.1-B Secondary Delay Timer Low
#define	UART_SDTL_SDTL_MASK   (0xFFU)
#define	UART_SDTL_SDTL_SHIFT   (0U)
#define	UART_SDTL_SDTL(x)   (((uint8_t)(((uint8_t)(x)) << UART_SDTL_SDTL_SHIFT)) & UART_SDTL_SDTL_MASK)

PRE - UART CEA709.1-B Preamble
#define	UART_PRE_PREAMBLE_MASK   (0xFFU)
#define	UART_PRE_PREAMBLE_SHIFT   (0U)
#define	UART_PRE_PREAMBLE(x)   (((uint8_t)(((uint8_t)(x)) << UART_PRE_PREAMBLE_SHIFT)) & UART_PRE_PREAMBLE_MASK)

TPL - UART CEA709.1-B Transmit Packet Length
#define	UART_TPL_TPL_MASK   (0xFFU)
#define	UART_TPL_TPL_SHIFT   (0U)
#define	UART_TPL_TPL(x)   (((uint8_t)(((uint8_t)(x)) << UART_TPL_TPL_SHIFT)) & UART_TPL_TPL_MASK)

IE - UART CEA709.1-B Interrupt Enable Register
#define	UART_IE_TXFIE_MASK   (0x1U)
#define	UART_IE_TXFIE_SHIFT   (0U)
#define	UART_IE_TXFIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE_TXFIE_SHIFT)) & UART_IE_TXFIE_MASK)
#define	UART_IE_PSIE_MASK   (0x2U)
#define	UART_IE_PSIE_SHIFT   (1U)
#define	UART_IE_PSIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE_PSIE_SHIFT)) & UART_IE_PSIE_MASK)
#define	UART_IE_PCTEIE_MASK   (0x4U)
#define	UART_IE_PCTEIE_SHIFT   (2U)
#define	UART_IE_PCTEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE_PCTEIE_SHIFT)) & UART_IE_PCTEIE_MASK)
#define	UART_IE_PTXIE_MASK   (0x8U)
#define	UART_IE_PTXIE_SHIFT   (3U)
#define	UART_IE_PTXIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE_PTXIE_SHIFT)) & UART_IE_PTXIE_MASK)
#define	UART_IE_PRXIE_MASK   (0x10U)
#define	UART_IE_PRXIE_SHIFT   (4U)
#define	UART_IE_PRXIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE_PRXIE_SHIFT)) & UART_IE_PRXIE_MASK)
#define	UART_IE_ISDIE_MASK   (0x20U)
#define	UART_IE_ISDIE_SHIFT   (5U)
#define	UART_IE_ISDIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE_ISDIE_SHIFT)) & UART_IE_ISDIE_MASK)
#define	UART_IE_WBEIE_MASK   (0x40U)
#define	UART_IE_WBEIE_SHIFT   (6U)
#define	UART_IE_WBEIE(x)   (((uint8_t)(((uint8_t)(x)) << UART_IE_WBEIE_SHIFT)) & UART_IE_WBEIE_MASK)

WB - UART CEA709.1-B WBASE
#define	UART_WB_WBASE_MASK   (0xFFU)
#define	UART_WB_WBASE_SHIFT   (0U)
#define	UART_WB_WBASE(x)   (((uint8_t)(((uint8_t)(x)) << UART_WB_WBASE_SHIFT)) & UART_WB_WBASE_MASK)

S3 - UART CEA709.1-B Status Register
#define	UART_S3_TXFF_MASK   (0x1U)
#define	UART_S3_TXFF_SHIFT   (0U)
#define	UART_S3_TXFF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_TXFF_SHIFT)) & UART_S3_TXFF_MASK)
#define	UART_S3_PSF_MASK   (0x2U)
#define	UART_S3_PSF_SHIFT   (1U)
#define	UART_S3_PSF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_PSF_SHIFT)) & UART_S3_PSF_MASK)
#define	UART_S3_PCTEF_MASK   (0x4U)
#define	UART_S3_PCTEF_SHIFT   (2U)
#define	UART_S3_PCTEF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_PCTEF_SHIFT)) & UART_S3_PCTEF_MASK)
#define	UART_S3_PTXF_MASK   (0x8U)
#define	UART_S3_PTXF_SHIFT   (3U)
#define	UART_S3_PTXF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_PTXF_SHIFT)) & UART_S3_PTXF_MASK)
#define	UART_S3_PRXF_MASK   (0x10U)
#define	UART_S3_PRXF_SHIFT   (4U)
#define	UART_S3_PRXF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_PRXF_SHIFT)) & UART_S3_PRXF_MASK)
#define	UART_S3_ISD_MASK   (0x20U)
#define	UART_S3_ISD_SHIFT   (5U)
#define	UART_S3_ISD(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_ISD_SHIFT)) & UART_S3_ISD_MASK)
#define	UART_S3_WBEF_MASK   (0x40U)
#define	UART_S3_WBEF_SHIFT   (6U)
#define	UART_S3_WBEF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_WBEF_SHIFT)) & UART_S3_WBEF_MASK)
#define	UART_S3_PEF_MASK   (0x80U)
#define	UART_S3_PEF_SHIFT   (7U)
#define	UART_S3_PEF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S3_PEF_SHIFT)) & UART_S3_PEF_MASK)

S4 - UART CEA709.1-B Status Register
#define	UART_S4_FE_MASK   (0x1U)
#define	UART_S4_FE_SHIFT   (0U)
#define	UART_S4_FE(x)   (((uint8_t)(((uint8_t)(x)) << UART_S4_FE_SHIFT)) & UART_S4_FE_MASK)
#define	UART_S4_ILCV_MASK   (0x2U)
#define	UART_S4_ILCV_SHIFT   (1U)
#define	UART_S4_ILCV(x)   (((uint8_t)(((uint8_t)(x)) << UART_S4_ILCV_SHIFT)) & UART_S4_ILCV_MASK)
#define	UART_S4_CDET_MASK   (0xCU)
#define	UART_S4_CDET_SHIFT   (2U)
#define	UART_S4_CDET(x)   (((uint8_t)(((uint8_t)(x)) << UART_S4_CDET_SHIFT)) & UART_S4_CDET_MASK)
#define	UART_S4_INITF_MASK   (0x10U)
#define	UART_S4_INITF_SHIFT   (4U)
#define	UART_S4_INITF(x)   (((uint8_t)(((uint8_t)(x)) << UART_S4_INITF_SHIFT)) & UART_S4_INITF_MASK)

RPL - UART CEA709.1-B Received Packet Length
#define	UART_RPL_RPL_MASK   (0xFFU)
#define	UART_RPL_RPL_SHIFT   (0U)
#define	UART_RPL_RPL(x)   (((uint8_t)(((uint8_t)(x)) << UART_RPL_RPL_SHIFT)) & UART_RPL_RPL_MASK)

RPREL - UART CEA709.1-B Received Preamble Length
#define	UART_RPREL_RPREL_MASK   (0xFFU)
#define	UART_RPREL_RPREL_SHIFT   (0U)
#define	UART_RPREL_RPREL(x)   (((uint8_t)(((uint8_t)(x)) << UART_RPREL_RPREL_SHIFT)) & UART_RPREL_RPREL_MASK)

CPW - UART CEA709.1-B Collision Pulse Width
#define	UART_CPW_CPW_MASK   (0xFFU)
#define	UART_CPW_CPW_SHIFT   (0U)
#define	UART_CPW_CPW(x)   (((uint8_t)(((uint8_t)(x)) << UART_CPW_CPW_SHIFT)) & UART_CPW_CPW_MASK)

RIDT - UART CEA709.1-B Receive Indeterminate Time
#define	UART_RIDT_RIDT_MASK   (0xFFU)
#define	UART_RIDT_RIDT_SHIFT   (0U)
#define	UART_RIDT_RIDT(x)   (((uint8_t)(((uint8_t)(x)) << UART_RIDT_RIDT_SHIFT)) & UART_RIDT_RIDT_MASK)

TIDT - UART CEA709.1-B Transmit Indeterminate Time
#define	UART_TIDT_TIDT_MASK   (0xFFU)
#define	UART_TIDT_TIDT_SHIFT   (0U)
#define	UART_TIDT_TIDT(x)   (((uint8_t)(((uint8_t)(x)) << UART_TIDT_TIDT_SHIFT)) & UART_TIDT_TIDT_MASK)

C5 - UART Control Register 5
#define	UART_C5_ILDMAS_MASK   (0x10U)
#define	UART_C5_ILDMAS_SHIFT   (4U)
#define	UART_C5_ILDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_ILDMAS_SHIFT)) & UART_C5_ILDMAS_MASK)
#define	UART_C5_TCDMAS_MASK   (0x40U)
#define	UART_C5_TCDMAS_SHIFT   (6U)
#define	UART_C5_TCDMAS(x)   (((uint8_t)(((uint8_t)(x)) << UART_C5_TCDMAS_SHIFT)) & UART_C5_TCDMAS_MASK)

WP7816 - UART 7816 Wait Parameter Register
#define	UART_WP7816_WTX_MASK   (0xFFU)
#define	UART_WP7816_WTX_SHIFT   (0U)
#define	UART_WP7816_WTX(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816_WTX_SHIFT)) & UART_WP7816_WTX_MASK)
#define	UART_WP7816_WTX_MASK   (0xFFU)
#define	UART_WP7816_WTX_SHIFT   (0U)
#define	UART_WP7816_WTX(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816_WTX_SHIFT)) & UART_WP7816_WTX_MASK)
#define	UART_WP7816_WTX_MASK   (0xFFU)
#define	UART_WP7816_WTX_SHIFT   (0U)
#define	UART_WP7816_WTX(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816_WTX_SHIFT)) & UART_WP7816_WTX_MASK)

AP7816A_T0 - UART 7816 ATR Duration Timer Register A
#define	UART_AP7816A_T0_ADTI_H_MASK   (0xFFU)
#define	UART_AP7816A_T0_ADTI_H_SHIFT   (0U)
#define	UART_AP7816A_T0_ADTI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_AP7816A_T0_ADTI_H_SHIFT)) & UART_AP7816A_T0_ADTI_H_MASK)
#define	UART_AP7816A_T0_ADTI_H_MASK   (0xFFU)
#define	UART_AP7816A_T0_ADTI_H_SHIFT   (0U)
#define	UART_AP7816A_T0_ADTI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_AP7816A_T0_ADTI_H_SHIFT)) & UART_AP7816A_T0_ADTI_H_MASK)
#define	UART_AP7816A_T0_ADTI_H_MASK   (0xFFU)
#define	UART_AP7816A_T0_ADTI_H_SHIFT   (0U)
#define	UART_AP7816A_T0_ADTI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_AP7816A_T0_ADTI_H_SHIFT)) & UART_AP7816A_T0_ADTI_H_MASK)

AP7816B_T0 - UART 7816 ATR Duration Timer Register B
#define	UART_AP7816B_T0_ADTI_L_MASK   (0xFFU)
#define	UART_AP7816B_T0_ADTI_L_SHIFT   (0U)
#define	UART_AP7816B_T0_ADTI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_AP7816B_T0_ADTI_L_SHIFT)) & UART_AP7816B_T0_ADTI_L_MASK)
#define	UART_AP7816B_T0_ADTI_L_MASK   (0xFFU)
#define	UART_AP7816B_T0_ADTI_L_SHIFT   (0U)
#define	UART_AP7816B_T0_ADTI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_AP7816B_T0_ADTI_L_SHIFT)) & UART_AP7816B_T0_ADTI_L_MASK)
#define	UART_AP7816B_T0_ADTI_L_MASK   (0xFFU)
#define	UART_AP7816B_T0_ADTI_L_SHIFT   (0U)
#define	UART_AP7816B_T0_ADTI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_AP7816B_T0_ADTI_L_SHIFT)) & UART_AP7816B_T0_ADTI_L_MASK)

WP7816A_T0 - UART 7816 Wait Parameter Register A
#define	UART_WP7816A_T0_WI_H_MASK   (0xFFU)
#define	UART_WP7816A_T0_WI_H_SHIFT   (0U)
#define	UART_WP7816A_T0_WI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816A_T0_WI_H_SHIFT)) & UART_WP7816A_T0_WI_H_MASK)
#define	UART_WP7816A_T0_WI_H_MASK   (0xFFU)
#define	UART_WP7816A_T0_WI_H_SHIFT   (0U)
#define	UART_WP7816A_T0_WI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816A_T0_WI_H_SHIFT)) & UART_WP7816A_T0_WI_H_MASK)
#define	UART_WP7816A_T0_WI_H_MASK   (0xFFU)
#define	UART_WP7816A_T0_WI_H_SHIFT   (0U)
#define	UART_WP7816A_T0_WI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816A_T0_WI_H_SHIFT)) & UART_WP7816A_T0_WI_H_MASK)

WP7816B_T0 - UART 7816 Wait Parameter Register B
#define	UART_WP7816B_T0_WI_L_MASK   (0xFFU)
#define	UART_WP7816B_T0_WI_L_SHIFT   (0U)
#define	UART_WP7816B_T0_WI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816B_T0_WI_L_SHIFT)) & UART_WP7816B_T0_WI_L_MASK)
#define	UART_WP7816B_T0_WI_L_MASK   (0xFFU)
#define	UART_WP7816B_T0_WI_L_SHIFT   (0U)
#define	UART_WP7816B_T0_WI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816B_T0_WI_L_SHIFT)) & UART_WP7816B_T0_WI_L_MASK)
#define	UART_WP7816B_T0_WI_L_MASK   (0xFFU)
#define	UART_WP7816B_T0_WI_L_SHIFT   (0U)
#define	UART_WP7816B_T0_WI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816B_T0_WI_L_SHIFT)) & UART_WP7816B_T0_WI_L_MASK)

WP7816A_T1 - UART 7816 Wait Parameter Register A
#define	UART_WP7816A_T1_BWI_H_MASK   (0xFFU)
#define	UART_WP7816A_T1_BWI_H_SHIFT   (0U)
#define	UART_WP7816A_T1_BWI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816A_T1_BWI_H_SHIFT)) & UART_WP7816A_T1_BWI_H_MASK)
#define	UART_WP7816A_T1_BWI_H_MASK   (0xFFU)
#define	UART_WP7816A_T1_BWI_H_SHIFT   (0U)
#define	UART_WP7816A_T1_BWI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816A_T1_BWI_H_SHIFT)) & UART_WP7816A_T1_BWI_H_MASK)
#define	UART_WP7816A_T1_BWI_H_MASK   (0xFFU)
#define	UART_WP7816A_T1_BWI_H_SHIFT   (0U)
#define	UART_WP7816A_T1_BWI_H(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816A_T1_BWI_H_SHIFT)) & UART_WP7816A_T1_BWI_H_MASK)

WP7816B_T1 - UART 7816 Wait Parameter Register B
#define	UART_WP7816B_T1_BWI_L_MASK   (0xFFU)
#define	UART_WP7816B_T1_BWI_L_SHIFT   (0U)
#define	UART_WP7816B_T1_BWI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816B_T1_BWI_L_SHIFT)) & UART_WP7816B_T1_BWI_L_MASK)
#define	UART_WP7816B_T1_BWI_L_MASK   (0xFFU)
#define	UART_WP7816B_T1_BWI_L_SHIFT   (0U)
#define	UART_WP7816B_T1_BWI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816B_T1_BWI_L_SHIFT)) & UART_WP7816B_T1_BWI_L_MASK)
#define	UART_WP7816B_T1_BWI_L_MASK   (0xFFU)
#define	UART_WP7816B_T1_BWI_L_SHIFT   (0U)
#define	UART_WP7816B_T1_BWI_L(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816B_T1_BWI_L_SHIFT)) & UART_WP7816B_T1_BWI_L_MASK)

WGP7816_T1 - UART 7816 Wait and Guard Parameter Register
#define	UART_WGP7816_T1_BGI_MASK   (0xFU)
#define	UART_WGP7816_T1_BGI_SHIFT   (0U)
#define	UART_WGP7816_T1_BGI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WGP7816_T1_BGI_SHIFT)) & UART_WGP7816_T1_BGI_MASK)
#define	UART_WGP7816_T1_CWI1_MASK   (0xF0U)
#define	UART_WGP7816_T1_CWI1_SHIFT   (4U)
#define	UART_WGP7816_T1_CWI1(x)   (((uint8_t)(((uint8_t)(x)) << UART_WGP7816_T1_CWI1_SHIFT)) & UART_WGP7816_T1_CWI1_MASK)
#define	UART_WGP7816_T1_BGI_MASK   (0xFU)
#define	UART_WGP7816_T1_BGI_SHIFT   (0U)
#define	UART_WGP7816_T1_BGI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WGP7816_T1_BGI_SHIFT)) & UART_WGP7816_T1_BGI_MASK)
#define	UART_WGP7816_T1_CWI1_MASK   (0xF0U)
#define	UART_WGP7816_T1_CWI1_SHIFT   (4U)
#define	UART_WGP7816_T1_CWI1(x)   (((uint8_t)(((uint8_t)(x)) << UART_WGP7816_T1_CWI1_SHIFT)) & UART_WGP7816_T1_CWI1_MASK)
#define	UART_WGP7816_T1_BGI_MASK   (0xFU)
#define	UART_WGP7816_T1_BGI_SHIFT   (0U)
#define	UART_WGP7816_T1_BGI(x)   (((uint8_t)(((uint8_t)(x)) << UART_WGP7816_T1_BGI_SHIFT)) & UART_WGP7816_T1_BGI_MASK)
#define	UART_WGP7816_T1_CWI1_MASK   (0xF0U)
#define	UART_WGP7816_T1_CWI1_SHIFT   (4U)
#define	UART_WGP7816_T1_CWI1(x)   (((uint8_t)(((uint8_t)(x)) << UART_WGP7816_T1_CWI1_SHIFT)) & UART_WGP7816_T1_CWI1_MASK)

WP7816C_T1 - UART 7816 Wait Parameter Register C
#define	UART_WP7816C_T1_CWI2_MASK   (0x1FU)
#define	UART_WP7816C_T1_CWI2_SHIFT   (0U)
#define	UART_WP7816C_T1_CWI2(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816C_T1_CWI2_SHIFT)) & UART_WP7816C_T1_CWI2_MASK)
#define	UART_WP7816C_T1_CWI2_MASK   (0x1FU)
#define	UART_WP7816C_T1_CWI2_SHIFT   (0U)
#define	UART_WP7816C_T1_CWI2(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816C_T1_CWI2_SHIFT)) & UART_WP7816C_T1_CWI2_MASK)
#define	UART_WP7816C_T1_CWI2_MASK   (0x1FU)
#define	UART_WP7816C_T1_CWI2_SHIFT   (0U)
#define	UART_WP7816C_T1_CWI2(x)   (((uint8_t)(((uint8_t)(x)) << UART_WP7816C_T1_CWI2_SHIFT)) & UART_WP7816C_T1_CWI2_MASK)

Macro Definition Documentation

UART0

#define UART0   ((UART_Type *)UART0_BASE)

Peripheral UART0 base pointer

UART0_BASE

#define UART0_BASE   (0x4006A000u)

Peripheral UART0 base address

UART1

#define UART1   ((UART_Type *)UART1_BASE)

Peripheral UART1 base pointer

UART1_BASE

#define UART1_BASE   (0x4006B000u)

Peripheral UART1 base address

UART2

#define UART2   ((UART_Type *)UART2_BASE)

Peripheral UART2 base pointer

UART2_BASE

#define UART2_BASE   (0x4006C000u)

Peripheral UART2 base address

UART3

#define UART3   ((UART_Type *)UART3_BASE)

Peripheral UART3 base pointer

UART3_BASE

#define UART3_BASE   (0x4006D000u)

Peripheral UART3 base address

UART4

#define UART4   ((UART_Type *)UART4_BASE)

Peripheral UART4 base pointer

UART4_BASE

#define UART4_BASE   (0x400EA000u)

Peripheral UART4 base address

UART5

#define UART5   ((UART_Type *)UART5_BASE)

Peripheral UART5 base pointer

UART5_BASE

#define UART5_BASE   (0x400EB000u)

Peripheral UART5 base address

UART_BASE_ADDRS

#define UART_BASE_ADDRS   { UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE, UART4_BASE, UART5_BASE }

Array initializer of UART peripheral base addresses

UART_BASE_PTRS

#define UART_BASE_PTRS   { UART0, UART1, UART2, UART3, UART4, UART5 }

Array initializer of UART peripheral base pointers

UART_BDH_LBKDIE [1/5]

#define UART_BDH_LBKDIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)

LBKDIE - LIN Break Detect Interrupt or DMA Request Enable 0b0..LBKDIF interrupt and DMA transfer requests disabled. 0b1..LBKDIF interrupt or DMA transfer requests enabled.

LBKDIE - LIN Break Detect Interrupt Enable 0b0..LBKDIF interrupt requests disabled. 0b1..LBKDIF interrupt requests enabled.

UART_BDH_LBKDIE [2/5]

#define UART_BDH_LBKDIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)

LBKDIE - LIN Break Detect Interrupt or DMA Request Enable 0b0..LBKDIF interrupt and DMA transfer requests disabled. 0b1..LBKDIF interrupt or DMA transfer requests enabled.

LBKDIE - LIN Break Detect Interrupt Enable 0b0..LBKDIF interrupt requests disabled. 0b1..LBKDIF interrupt requests enabled.

UART_BDH_LBKDIE [3/5]

#define UART_BDH_LBKDIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)

LBKDIE - LIN Break Detect Interrupt Enable 0b0..LBKDIF interrupt requests disabled. 0b1..LBKDIF interrupt requests enabled.

LBKDIE - LIN Break Detect Interrupt or DMA Request Enable 0b0..LBKDIF interrupt and DMA transfer requests disabled. 0b1..LBKDIF interrupt or DMA transfer requests enabled.

UART_BDH_LBKDIE [4/5]

#define UART_BDH_LBKDIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)

LBKDIE - LIN Break Detect Interrupt Enable 0b0..LBKDIF interrupt requests disabled. 0b1..LBKDIF interrupt requests enabled.

LBKDIE - LIN Break Detect Interrupt or DMA Request Enable 0b0..LBKDIF interrupt and DMA transfer requests disabled. 0b1..LBKDIF interrupt or DMA transfer requests enabled.

UART_BDH_LBKDIE [5/5]

#define UART_BDH_LBKDIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_LBKDIE_SHIFT)) & UART_BDH_LBKDIE_MASK)

LBKDIE - LIN Break Detect Interrupt or DMA Request Enable 0b0..LBKDIF interrupt and DMA transfer requests disabled. 0b1..LBKDIF interrupt or DMA transfer requests enabled.

UART_BDH_RXEDGIE [1/5]

#define UART_BDH_RXEDGIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)

RXEDGIE - RxD Input Active Edge Interrupt Enable 0b0..Hardware interrupts from RXEDGIF disabled using polling. 0b1..RXEDGIF interrupt request enabled.

UART_BDH_RXEDGIE [2/5]

#define UART_BDH_RXEDGIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)

RXEDGIE - RxD Input Active Edge Interrupt Enable 0b0..Hardware interrupts from RXEDGIF disabled using polling. 0b1..RXEDGIF interrupt request enabled.

UART_BDH_RXEDGIE [3/5]

#define UART_BDH_RXEDGIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)

RXEDGIE - RxD Input Active Edge Interrupt Enable 0b0..Hardware interrupts from RXEDGIF disabled using polling. 0b1..RXEDGIF interrupt request enabled.

UART_BDH_RXEDGIE [4/5]

#define UART_BDH_RXEDGIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)

RXEDGIE - RxD Input Active Edge Interrupt Enable 0b0..Hardware interrupts from RXEDGIF disabled using polling. 0b1..RXEDGIF interrupt request enabled.

UART_BDH_RXEDGIE [5/5]

#define UART_BDH_RXEDGIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_RXEDGIE_SHIFT)) & UART_BDH_RXEDGIE_MASK)

RXEDGIE - RxD Input Active Edge Interrupt Enable 0b0..Hardware interrupts from RXEDGIF disabled using polling. 0b1..RXEDGIF interrupt request enabled.

UART_BDH_SBNS [1/4]

#define UART_BDH_SBNS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)

SBNS - Stop Bit Number Select 0b0..Data frame consists of a single stop bit. 0b1..Data frame consists of two stop bits.

UART_BDH_SBNS [2/4]

#define UART_BDH_SBNS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)

SBNS - Stop Bit Number Select 0b0..Data frame consists of a single stop bit. 0b1..Data frame consists of two stop bits.

UART_BDH_SBNS [3/4]

#define UART_BDH_SBNS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)

SBNS - Stop Bit Number Select 0b0..Data frame consists of a single stop bit. 0b1..Data frame consists of two stop bits.

UART_BDH_SBNS [4/4]

#define UART_BDH_SBNS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_BDH_SBNS_SHIFT)) & UART_BDH_SBNS_MASK)

SBNS - Stop Bit Number Select 0b0..Data frame consists of a single stop bit. 0b1..Data frame consists of two stop bits.

UART_C1_ILT [1/5]

#define UART_C1_ILT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)

ILT - Idle Line Type Select 0b0..Idle character bit count starts after start bit. 0b1..Idle character bit count starts after stop bit.

UART_C1_ILT [2/5]

#define UART_C1_ILT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)

ILT - Idle Line Type Select 0b0..Idle character bit count starts after start bit. 0b1..Idle character bit count starts after stop bit.

UART_C1_ILT [3/5]

#define UART_C1_ILT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)

ILT - Idle Line Type Select 0b0..Idle character bit count starts after start bit. 0b1..Idle character bit count starts after stop bit.

UART_C1_ILT [4/5]

#define UART_C1_ILT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)

ILT - Idle Line Type Select 0b0..Idle character bit count starts after start bit. 0b1..Idle character bit count starts after stop bit.

UART_C1_ILT [5/5]

#define UART_C1_ILT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_ILT_SHIFT)) & UART_C1_ILT_MASK)

ILT - Idle Line Type Select 0b0..Idle character bit count starts after start bit. 0b1..Idle character bit count starts after stop bit.

UART_C1_LOOPS [1/5]

#define UART_C1_LOOPS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)

LOOPS - Loop Mode Select 0b0..Normal operation. 0b1..Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC.

UART_C1_LOOPS [2/5]

#define UART_C1_LOOPS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)

LOOPS - Loop Mode Select 0b0..Normal operation. 0b1..Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC.

UART_C1_LOOPS [3/5]

#define UART_C1_LOOPS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)

LOOPS - Loop Mode Select 0b0..Normal operation. 0b1..Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC.

UART_C1_LOOPS [4/5]

#define UART_C1_LOOPS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)

LOOPS - Loop Mode Select 0b0..Normal operation. 0b1..Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC.

UART_C1_LOOPS [5/5]

#define UART_C1_LOOPS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_LOOPS_SHIFT)) & UART_C1_LOOPS_MASK)

LOOPS - Loop Mode Select 0b0..Normal operation. 0b1..Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC.

UART_C1_M [1/5]

#define UART_C1_M

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)

M - 9-bit or 8-bit Mode Select 0b0..Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop. 0b1..Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.

UART_C1_M [2/5]

#define UART_C1_M

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)

M - 9-bit or 8-bit Mode Select 0b0..Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop. 0b1..Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.

UART_C1_M [3/5]

#define UART_C1_M

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)

M - 9-bit or 8-bit Mode Select 0b0..Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop. 0b1..Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.

UART_C1_M [4/5]

#define UART_C1_M

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)

M - 9-bit or 8-bit Mode Select 0b0..Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop. 0b1..Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.

UART_C1_M [5/5]

#define UART_C1_M

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_M_SHIFT)) & UART_C1_M_MASK)

M - 9-bit or 8-bit Mode Select 0b0..Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop. 0b1..Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.

UART_C1_PE [1/5]

#define UART_C1_PE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)

PE - Parity Enable 0b0..Parity function disabled. 0b1..Parity function enabled.

UART_C1_PE [2/5]

#define UART_C1_PE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)

PE - Parity Enable 0b0..Parity function disabled. 0b1..Parity function enabled.

UART_C1_PE [3/5]

#define UART_C1_PE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)

PE - Parity Enable 0b0..Parity function disabled. 0b1..Parity function enabled.

UART_C1_PE [4/5]

#define UART_C1_PE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)

PE - Parity Enable 0b0..Parity function disabled. 0b1..Parity function enabled.

UART_C1_PE [5/5]

#define UART_C1_PE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PE_SHIFT)) & UART_C1_PE_MASK)

PE - Parity Enable 0b0..Parity function disabled. 0b1..Parity function enabled.

UART_C1_PT [1/5]

#define UART_C1_PT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)

PT - Parity Type 0b0..Even parity. 0b1..Odd parity.

UART_C1_PT [2/5]

#define UART_C1_PT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)

PT - Parity Type 0b0..Even parity. 0b1..Odd parity.

UART_C1_PT [3/5]

#define UART_C1_PT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)

PT - Parity Type 0b0..Even parity. 0b1..Odd parity.

UART_C1_PT [4/5]

#define UART_C1_PT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)

PT - Parity Type 0b0..Even parity. 0b1..Odd parity.

UART_C1_PT [5/5]

#define UART_C1_PT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_PT_SHIFT)) & UART_C1_PT_MASK)

PT - Parity Type 0b0..Even parity. 0b1..Odd parity.

UART_C1_RSRC [1/5]

#define UART_C1_RSRC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)

RSRC - Receiver Source Select 0b0..Selects internal loop back mode. The receiver input is internally connected to transmitter output. 0b1..Single wire UART mode where the receiver input is connected to the transmit pin input signal.

UART_C1_RSRC [2/5]

#define UART_C1_RSRC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)

RSRC - Receiver Source Select 0b0..Selects internal loop back mode. The receiver input is internally connected to transmitter output. 0b1..Single wire UART mode where the receiver input is connected to the transmit pin input signal.

UART_C1_RSRC [3/5]

#define UART_C1_RSRC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)

RSRC - Receiver Source Select 0b0..Selects internal loop back mode. The receiver input is internally connected to transmitter output. 0b1..Single wire UART mode where the receiver input is connected to the transmit pin input signal.

UART_C1_RSRC [4/5]

#define UART_C1_RSRC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)

RSRC - Receiver Source Select 0b0..Selects internal loop back mode. The receiver input is internally connected to transmitter output. 0b1..Single wire UART mode where the receiver input is connected to the transmit pin input signal.

UART_C1_RSRC [5/5]

#define UART_C1_RSRC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_RSRC_SHIFT)) & UART_C1_RSRC_MASK)

RSRC - Receiver Source Select 0b0..Selects internal loop back mode. The receiver input is internally connected to transmitter output. 0b1..Single wire UART mode where the receiver input is connected to the transmit pin input signal.

UART_C1_UARTSWAI [1/5]

#define UART_C1_UARTSWAI

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)

UARTSWAI - UART Stops in Wait Mode 0b0..UART clock continues to run in Wait mode. 0b1..UART clock freezes while CPU is in Wait mode.

UART_C1_UARTSWAI [2/5]

#define UART_C1_UARTSWAI

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)

UARTSWAI - UART Stops in Wait Mode 0b0..UART clock continues to run in Wait mode. 0b1..UART clock freezes while CPU is in Wait mode.

UART_C1_UARTSWAI [3/5]

#define UART_C1_UARTSWAI

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)

UARTSWAI - UART Stops in Wait Mode 0b0..UART clock continues to run in Wait mode. 0b1..UART clock freezes while CPU is in Wait mode.

UART_C1_UARTSWAI [4/5]

#define UART_C1_UARTSWAI

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)

UARTSWAI - UART Stops in Wait Mode 0b0..UART clock continues to run in Wait mode. 0b1..UART clock freezes while CPU is in Wait mode.

UART_C1_UARTSWAI [5/5]

#define UART_C1_UARTSWAI

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_UARTSWAI_SHIFT)) & UART_C1_UARTSWAI_MASK)

UARTSWAI - UART Stops in Wait Mode 0b0..UART clock continues to run in Wait mode. 0b1..UART clock freezes while CPU is in Wait mode.

UART_C1_WAKE [1/5]

#define UART_C1_WAKE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)

WAKE - Receiver Wakeup Method Select 0b0..Idle line wakeup. 0b1..Address mark wakeup.

UART_C1_WAKE [2/5]

#define UART_C1_WAKE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)

WAKE - Receiver Wakeup Method Select 0b0..Idle line wakeup. 0b1..Address mark wakeup.

UART_C1_WAKE [3/5]

#define UART_C1_WAKE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)

WAKE - Receiver Wakeup Method Select 0b0..Idle line wakeup. 0b1..Address mark wakeup.

UART_C1_WAKE [4/5]

#define UART_C1_WAKE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)

WAKE - Receiver Wakeup Method Select 0b0..Idle line wakeup. 0b1..Address mark wakeup.

UART_C1_WAKE [5/5]

#define UART_C1_WAKE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C1_WAKE_SHIFT)) & UART_C1_WAKE_MASK)

WAKE - Receiver Wakeup Method Select 0b0..Idle line wakeup. 0b1..Address mark wakeup.

UART_C2_ILIE [1/5]

#define UART_C2_ILIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)

ILIE - Idle Line Interrupt DMA Transfer Enable 0b0..IDLE interrupt requests disabled. and DMA transfer 0b1..IDLE interrupt requests enabled. or DMA transfer

ILIE - Idle Line Interrupt Enable 0b0..IDLE interrupt requests disabled. 0b1..IDLE interrupt requests enabled.

UART_C2_ILIE [2/5]

#define UART_C2_ILIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)

ILIE - Idle Line Interrupt DMA Transfer Enable 0b0..IDLE interrupt requests disabled. and DMA transfer 0b1..IDLE interrupt requests enabled. or DMA transfer

ILIE - Idle Line Interrupt Enable 0b0..IDLE interrupt requests disabled. 0b1..IDLE interrupt requests enabled.

UART_C2_ILIE [3/5]

#define UART_C2_ILIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)

ILIE - Idle Line Interrupt Enable 0b0..IDLE interrupt requests disabled. 0b1..IDLE interrupt requests enabled.

UART_C2_ILIE [4/5]

#define UART_C2_ILIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)

ILIE - Idle Line Interrupt Enable 0b0..IDLE interrupt requests disabled. 0b1..IDLE interrupt requests enabled.

UART_C2_ILIE [5/5]

#define UART_C2_ILIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_ILIE_SHIFT)) & UART_C2_ILIE_MASK)

ILIE - Idle Line Interrupt Enable 0b0..IDLE interrupt requests disabled. 0b1..IDLE interrupt requests enabled.

UART_C2_RE [1/5]

#define UART_C2_RE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)

RE - Receiver Enable 0b0..Receiver off. 0b1..Receiver on.

UART_C2_RE [2/5]

#define UART_C2_RE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)

RE - Receiver Enable 0b0..Receiver off. 0b1..Receiver on.

UART_C2_RE [3/5]

#define UART_C2_RE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)

RE - Receiver Enable 0b0..Receiver off. 0b1..Receiver on.

UART_C2_RE [4/5]

#define UART_C2_RE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)

RE - Receiver Enable 0b0..Receiver off. 0b1..Receiver on.

UART_C2_RE [5/5]

#define UART_C2_RE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RE_SHIFT)) & UART_C2_RE_MASK)

RE - Receiver Enable 0b0..Receiver off. 0b1..Receiver on.

UART_C2_RIE [1/5]

#define UART_C2_RIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)

RIE - Receiver Full Interrupt or DMA Transfer Enable 0b0..RDRF interrupt and DMA transfer requests disabled. 0b1..RDRF interrupt or DMA transfer requests enabled.

UART_C2_RIE [2/5]

#define UART_C2_RIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)

RIE - Receiver Full Interrupt or DMA Transfer Enable 0b0..RDRF interrupt and DMA transfer requests disabled. 0b1..RDRF interrupt or DMA transfer requests enabled.

UART_C2_RIE [3/5]

#define UART_C2_RIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)

RIE - Receiver Full Interrupt or DMA Transfer Enable 0b0..RDRF interrupt and DMA transfer requests disabled. 0b1..RDRF interrupt or DMA transfer requests enabled.

UART_C2_RIE [4/5]

#define UART_C2_RIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)

RIE - Receiver Full Interrupt or DMA Transfer Enable 0b0..RDRF interrupt and DMA transfer requests disabled. 0b1..RDRF interrupt or DMA transfer requests enabled.

UART_C2_RIE [5/5]

#define UART_C2_RIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RIE_SHIFT)) & UART_C2_RIE_MASK)

RIE - Receiver Full Interrupt or DMA Transfer Enable 0b0..RDRF interrupt and DMA transfer requests disabled. 0b1..RDRF interrupt or DMA transfer requests enabled.

UART_C2_RWU [1/5]

#define UART_C2_RWU

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)

RWU - Receiver Wakeup Control 0b0..Normal operation. 0b1..RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU.

UART_C2_RWU [2/5]

#define UART_C2_RWU

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)

RWU - Receiver Wakeup Control 0b0..Normal operation. 0b1..RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU.

UART_C2_RWU [3/5]

#define UART_C2_RWU

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)

RWU - Receiver Wakeup Control 0b0..Normal operation. 0b1..RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU.

UART_C2_RWU [4/5]

#define UART_C2_RWU

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)

RWU - Receiver Wakeup Control 0b0..Normal operation. 0b1..RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU.

UART_C2_RWU [5/5]

#define UART_C2_RWU

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_RWU_SHIFT)) & UART_C2_RWU_MASK)

RWU - Receiver Wakeup Control 0b0..Normal operation. 0b1..RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU.

UART_C2_SBK [1/5]

#define UART_C2_SBK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)

SBK - Send Break 0b0..Normal transmitter operation. 0b1..Queue break characters to be sent.

UART_C2_SBK [2/5]

#define UART_C2_SBK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)

SBK - Send Break 0b0..Normal transmitter operation. 0b1..Queue break characters to be sent.

UART_C2_SBK [3/5]

#define UART_C2_SBK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)

SBK - Send Break 0b0..Normal transmitter operation. 0b1..Queue break characters to be sent.

UART_C2_SBK [4/5]

#define UART_C2_SBK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)

SBK - Send Break 0b0..Normal transmitter operation. 0b1..Queue break characters to be sent.

UART_C2_SBK [5/5]

#define UART_C2_SBK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_SBK_SHIFT)) & UART_C2_SBK_MASK)

SBK - Send Break 0b0..Normal transmitter operation. 0b1..Queue break characters to be sent.

UART_C2_TCIE [1/5]

#define UART_C2_TCIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)

TCIE - Transmission Complete Interrupt or DMA Transfer Enable 0b0..TC interrupt and DMA transfer requests disabled. 0b1..TC interrupt or DMA transfer requests enabled.

TCIE - Transmission Complete Interrupt Enable 0b0..TC interrupt requests disabled. 0b1..TC interrupt requests enabled.

UART_C2_TCIE [2/5]

#define UART_C2_TCIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)

TCIE - Transmission Complete Interrupt or DMA Transfer Enable 0b0..TC interrupt and DMA transfer requests disabled. 0b1..TC interrupt or DMA transfer requests enabled.

TCIE - Transmission Complete Interrupt Enable 0b0..TC interrupt requests disabled. 0b1..TC interrupt requests enabled.

UART_C2_TCIE [3/5]

#define UART_C2_TCIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)

TCIE - Transmission Complete Interrupt Enable 0b0..TC interrupt requests disabled. 0b1..TC interrupt requests enabled.

UART_C2_TCIE [4/5]

#define UART_C2_TCIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)

TCIE - Transmission Complete Interrupt Enable 0b0..TC interrupt requests disabled. 0b1..TC interrupt requests enabled.

UART_C2_TCIE [5/5]

#define UART_C2_TCIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TCIE_SHIFT)) & UART_C2_TCIE_MASK)

TCIE - Transmission Complete Interrupt Enable 0b0..TC interrupt requests disabled. 0b1..TC interrupt requests enabled.

UART_C2_TE [1/5]

#define UART_C2_TE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)

TE - Transmitter Enable 0b0..Transmitter off. 0b1..Transmitter on.

UART_C2_TE [2/5]

#define UART_C2_TE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)

TE - Transmitter Enable 0b0..Transmitter off. 0b1..Transmitter on.

UART_C2_TE [3/5]

#define UART_C2_TE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)

TE - Transmitter Enable 0b0..Transmitter off. 0b1..Transmitter on.

UART_C2_TE [4/5]

#define UART_C2_TE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)

TE - Transmitter Enable 0b0..Transmitter off. 0b1..Transmitter on.

UART_C2_TE [5/5]

#define UART_C2_TE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TE_SHIFT)) & UART_C2_TE_MASK)

TE - Transmitter Enable 0b0..Transmitter off. 0b1..Transmitter on.

UART_C2_TIE [1/5]

#define UART_C2_TIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)

TIE - Transmitter Interrupt or DMA Transfer Enable. 0b0..TDRE interrupt and DMA transfer requests disabled. 0b1..TDRE interrupt or DMA transfer requests enabled.

UART_C2_TIE [2/5]

#define UART_C2_TIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)

TIE - Transmitter Interrupt or DMA Transfer Enable. 0b0..TDRE interrupt and DMA transfer requests disabled. 0b1..TDRE interrupt or DMA transfer requests enabled.

UART_C2_TIE [3/5]

#define UART_C2_TIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)

TIE - Transmitter Interrupt or DMA Transfer Enable. 0b0..TDRE interrupt and DMA transfer requests disabled. 0b1..TDRE interrupt or DMA transfer requests enabled.

UART_C2_TIE [4/5]

#define UART_C2_TIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)

TIE - Transmitter Interrupt or DMA Transfer Enable. 0b0..TDRE interrupt and DMA transfer requests disabled. 0b1..TDRE interrupt or DMA transfer requests enabled.

UART_C2_TIE [5/5]

#define UART_C2_TIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C2_TIE_SHIFT)) & UART_C2_TIE_MASK)

TIE - Transmitter Interrupt or DMA Transfer Enable. 0b0..TDRE interrupt and DMA transfer requests disabled. 0b1..TDRE interrupt or DMA transfer requests enabled.

UART_C3_FEIE [1/5]

#define UART_C3_FEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)

FEIE - Framing Error Interrupt Enable 0b0..FE interrupt requests are disabled. 0b1..FE interrupt requests are enabled.

UART_C3_FEIE [2/5]

#define UART_C3_FEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)

FEIE - Framing Error Interrupt Enable 0b0..FE interrupt requests are disabled. 0b1..FE interrupt requests are enabled.

UART_C3_FEIE [3/5]

#define UART_C3_FEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)

FEIE - Framing Error Interrupt Enable 0b0..FE interrupt requests are disabled. 0b1..FE interrupt requests are enabled.

UART_C3_FEIE [4/5]

#define UART_C3_FEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)

FEIE - Framing Error Interrupt Enable 0b0..FE interrupt requests are disabled. 0b1..FE interrupt requests are enabled.

UART_C3_FEIE [5/5]

#define UART_C3_FEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_FEIE_SHIFT)) & UART_C3_FEIE_MASK)

FEIE - Framing Error Interrupt Enable 0b0..FE interrupt requests are disabled. 0b1..FE interrupt requests are enabled.

UART_C3_NEIE [1/5]

#define UART_C3_NEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)

NEIE - Noise Error Interrupt Enable 0b0..NF interrupt requests are disabled. 0b1..NF interrupt requests are enabled.

UART_C3_NEIE [2/5]

#define UART_C3_NEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)

NEIE - Noise Error Interrupt Enable 0b0..NF interrupt requests are disabled. 0b1..NF interrupt requests are enabled.

UART_C3_NEIE [3/5]

#define UART_C3_NEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)

NEIE - Noise Error Interrupt Enable 0b0..NF interrupt requests are disabled. 0b1..NF interrupt requests are enabled.

UART_C3_NEIE [4/5]

#define UART_C3_NEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)

NEIE - Noise Error Interrupt Enable 0b0..NF interrupt requests are disabled. 0b1..NF interrupt requests are enabled.

UART_C3_NEIE [5/5]

#define UART_C3_NEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_NEIE_SHIFT)) & UART_C3_NEIE_MASK)

NEIE - Noise Error Interrupt Enable 0b0..NF interrupt requests are disabled. 0b1..NF interrupt requests are enabled.

UART_C3_ORIE [1/5]

#define UART_C3_ORIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)

ORIE - Overrun Error Interrupt Enable 0b0..OR interrupts are disabled. 0b1..OR interrupt requests are enabled.

UART_C3_ORIE [2/5]

#define UART_C3_ORIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)

ORIE - Overrun Error Interrupt Enable 0b0..OR interrupts are disabled. 0b1..OR interrupt requests are enabled.

UART_C3_ORIE [3/5]

#define UART_C3_ORIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)

ORIE - Overrun Error Interrupt Enable 0b0..OR interrupts are disabled. 0b1..OR interrupt requests are enabled.

UART_C3_ORIE [4/5]

#define UART_C3_ORIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)

ORIE - Overrun Error Interrupt Enable 0b0..OR interrupts are disabled. 0b1..OR interrupt requests are enabled.

UART_C3_ORIE [5/5]

#define UART_C3_ORIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_ORIE_SHIFT)) & UART_C3_ORIE_MASK)

ORIE - Overrun Error Interrupt Enable 0b0..OR interrupts are disabled. 0b1..OR interrupt requests are enabled.

UART_C3_PEIE [1/5]

#define UART_C3_PEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)

PEIE - Parity Error Interrupt Enable 0b0..PF interrupt requests are disabled. 0b1..PF interrupt requests are enabled.

UART_C3_PEIE [2/5]

#define UART_C3_PEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)

PEIE - Parity Error Interrupt Enable 0b0..PF interrupt requests are disabled. 0b1..PF interrupt requests are enabled.

UART_C3_PEIE [3/5]

#define UART_C3_PEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)

PEIE - Parity Error Interrupt Enable 0b0..PF interrupt requests are disabled. 0b1..PF interrupt requests are enabled.

UART_C3_PEIE [4/5]

#define UART_C3_PEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)

PEIE - Parity Error Interrupt Enable 0b0..PF interrupt requests are disabled. 0b1..PF interrupt requests are enabled.

UART_C3_PEIE [5/5]

#define UART_C3_PEIE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_PEIE_SHIFT)) & UART_C3_PEIE_MASK)

PEIE - Parity Error Interrupt Enable 0b0..PF interrupt requests are disabled. 0b1..PF interrupt requests are enabled.

UART_C3_TXDIR [1/5]

#define UART_C3_TXDIR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)

TXDIR - Transmitter Pin Data Direction in Single-Wire mode 0b0..TXD pin is an input in single wire mode. 0b1..TXD pin is an output in single wire mode.

UART_C3_TXDIR [2/5]

#define UART_C3_TXDIR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)

TXDIR - Transmitter Pin Data Direction in Single-Wire mode 0b0..TXD pin is an input in single wire mode. 0b1..TXD pin is an output in single wire mode.

UART_C3_TXDIR [3/5]

#define UART_C3_TXDIR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)

TXDIR - Transmitter Pin Data Direction in Single-Wire mode 0b0..TXD pin is an input in single wire mode. 0b1..TXD pin is an output in single wire mode.

UART_C3_TXDIR [4/5]

#define UART_C3_TXDIR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)

TXDIR - Transmitter Pin Data Direction in Single-Wire mode 0b0..TXD pin is an input in single wire mode. 0b1..TXD pin is an output in single wire mode.

UART_C3_TXDIR [5/5]

#define UART_C3_TXDIR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXDIR_SHIFT)) & UART_C3_TXDIR_MASK)

TXDIR - Transmitter Pin Data Direction in Single-Wire mode 0b0..TXD pin is an input in single wire mode. 0b1..TXD pin is an output in single wire mode.

UART_C3_TXINV [1/5]

#define UART_C3_TXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)

TXINV - Transmit Data Inversion. 0b0..Transmit data is not inverted. 0b1..Transmit data is inverted.

UART_C3_TXINV [2/5]

#define UART_C3_TXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)

TXINV - Transmit Data Inversion. 0b0..Transmit data is not inverted. 0b1..Transmit data is inverted.

UART_C3_TXINV [3/5]

#define UART_C3_TXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)

TXINV - Transmit Data Inversion. 0b0..Transmit data is not inverted. 0b1..Transmit data is inverted.

UART_C3_TXINV [4/5]

#define UART_C3_TXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)

TXINV - Transmit Data Inversion. 0b0..Transmit data is not inverted. 0b1..Transmit data is inverted.

UART_C3_TXINV [5/5]

#define UART_C3_TXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C3_TXINV_SHIFT)) & UART_C3_TXINV_MASK)

TXINV - Transmit Data Inversion. 0b0..Transmit data is not inverted. 0b1..Transmit data is inverted.

UART_C4_M10 [1/5]

#define UART_C4_M10

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)

M10 - 10-bit Mode select 0b0..The parity bit is the ninth bit in the serial transmission. 0b1..The parity bit is the tenth bit in the serial transmission.

UART_C4_M10 [2/5]

#define UART_C4_M10

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)

M10 - 10-bit Mode select 0b0..The parity bit is the ninth bit in the serial transmission. 0b1..The parity bit is the tenth bit in the serial transmission.

UART_C4_M10 [3/5]

#define UART_C4_M10

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)

M10 - 10-bit Mode select 0b0..The parity bit is the ninth bit in the serial transmission. 0b1..The parity bit is the tenth bit in the serial transmission.

UART_C4_M10 [4/5]

#define UART_C4_M10

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)

M10 - 10-bit Mode select 0b0..The parity bit is the ninth bit in the serial transmission. 0b1..The parity bit is the tenth bit in the serial transmission.

UART_C4_M10 [5/5]

#define UART_C4_M10

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_M10_SHIFT)) & UART_C4_M10_MASK)

M10 - 10-bit Mode select 0b0..The parity bit is the ninth bit in the serial transmission. 0b1..The parity bit is the tenth bit in the serial transmission.

UART_C4_MAEN1 [1/5]

#define UART_C4_MAEN1

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)

MAEN1 - Match Address Mode Enable 1 0b0..All data received is transferred to the data buffer if MAEN2 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA1 register. If no match occurs, the data is discarded. If match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN1 [2/5]

#define UART_C4_MAEN1

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)

MAEN1 - Match Address Mode Enable 1 0b0..All data received is transferred to the data buffer if MAEN2 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA1 register. If no match occurs, the data is discarded. If match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN1 [3/5]

#define UART_C4_MAEN1

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)

MAEN1 - Match Address Mode Enable 1 0b0..All data received is transferred to the data buffer if MAEN2 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA1 register. If no match occurs, the data is discarded. If match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN1 [4/5]

#define UART_C4_MAEN1

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)

MAEN1 - Match Address Mode Enable 1 0b0..All data received is transferred to the data buffer if MAEN2 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA1 register. If no match occurs, the data is discarded. If match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN1 [5/5]

#define UART_C4_MAEN1

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN1_SHIFT)) & UART_C4_MAEN1_MASK)

MAEN1 - Match Address Mode Enable 1 0b0..All data received is transferred to the data buffer if MAEN2 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA1 register. If no match occurs, the data is discarded. If match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN2 [1/5]

#define UART_C4_MAEN2

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)

MAEN2 - Match Address Mode Enable 2 0b0..All data received is transferred to the data buffer if MAEN1 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA2 register. If no match occurs, the data is discarded. If a match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN2 [2/5]

#define UART_C4_MAEN2

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)

MAEN2 - Match Address Mode Enable 2 0b0..All data received is transferred to the data buffer if MAEN1 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA2 register. If no match occurs, the data is discarded. If a match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN2 [3/5]

#define UART_C4_MAEN2

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)

MAEN2 - Match Address Mode Enable 2 0b0..All data received is transferred to the data buffer if MAEN1 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA2 register. If no match occurs, the data is discarded. If a match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN2 [4/5]

#define UART_C4_MAEN2

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)

MAEN2 - Match Address Mode Enable 2 0b0..All data received is transferred to the data buffer if MAEN1 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA2 register. If no match occurs, the data is discarded. If a match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C4_MAEN2 [5/5]

#define UART_C4_MAEN2

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C4_MAEN2_SHIFT)) & UART_C4_MAEN2_MASK)

MAEN2 - Match Address Mode Enable 2 0b0..All data received is transferred to the data buffer if MAEN1 is cleared. 0b1..All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA2 register. If no match occurs, the data is discarded. If a match occurs, data is transferred to the data buffer. This field must be cleared when C7816[ISO7816E] is set/enabled.

UART_C5_ILDMAS

#define UART_C5_ILDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_ILDMAS_SHIFT)) & UART_C5_ILDMAS_MASK)

ILDMAS - Idle Line DMA Select 0b0..If C2[ILIE] and S1[IDLE] are set, the IDLE interrupt request signal is asserted to request an interrupt service. 0b1..If C2[ILIE] and S1[IDLE] are set, the IDLE DMA request signal is asserted to request a DMA transfer.

UART_C5_LBKDDMAS [1/2]

#define UART_C5_LBKDDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_LBKDDMAS_SHIFT)) & UART_C5_LBKDDMAS_MASK)

LBKDDMAS - LIN Break Detect DMA Select Bit 0b0..If BDH[LBKDIE] and S2[LBKDIF] are set, the LBKDIF interrupt signal is asserted to request an interrupt service. 0b1..If BDH[LBKDIE] and S2[LBKDIF] are set, the LBKDIF DMA request signal is asserted to request a DMA transfer.

UART_C5_LBKDDMAS [2/2]

#define UART_C5_LBKDDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_LBKDDMAS_SHIFT)) & UART_C5_LBKDDMAS_MASK)

LBKDDMAS - LIN Break Detect DMA Select Bit 0b0..If BDH[LBKDIE] and S2[LBKDIF] are set, the LBKDIF interrupt signal is asserted to request an interrupt service. 0b1..If BDH[LBKDIE] and S2[LBKDIF] are set, the LBKDIF DMA request signal is asserted to request a DMA transfer.

UART_C5_RDMAS [1/5]

#define UART_C5_RDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)

RDMAS - Receiver Full DMA Select 0b0..If C2[RIE] and S1[RDRF] are set, the RDFR interrupt request signal is asserted to request an interrupt service. 0b1..If C2[RIE] and S1[RDRF] are set, the RDRF DMA request signal is asserted to request a DMA transfer.

UART_C5_RDMAS [2/5]

#define UART_C5_RDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)

RDMAS - Receiver Full DMA Select 0b0..If C2[RIE] and S1[RDRF] are set, the RDFR interrupt request signal is asserted to request an interrupt service. 0b1..If C2[RIE] and S1[RDRF] are set, the RDRF DMA request signal is asserted to request a DMA transfer.

UART_C5_RDMAS [3/5]

#define UART_C5_RDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)

RDMAS - Receiver Full DMA Select 0b0..If C2[RIE] and S1[RDRF] are set, the RDFR interrupt request signal is asserted to request an interrupt service. 0b1..If C2[RIE] and S1[RDRF] are set, the RDRF DMA request signal is asserted to request a DMA transfer.

UART_C5_RDMAS [4/5]

#define UART_C5_RDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)

RDMAS - Receiver Full DMA Select 0b0..If C2[RIE] and S1[RDRF] are set, the RDFR interrupt request signal is asserted to request an interrupt service. 0b1..If C2[RIE] and S1[RDRF] are set, the RDRF DMA request signal is asserted to request a DMA transfer.

UART_C5_RDMAS [5/5]

#define UART_C5_RDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_RDMAS_SHIFT)) & UART_C5_RDMAS_MASK)

RDMAS - Receiver Full DMA Select 0b0..If C2[RIE] and S1[RDRF] are set, the RDFR interrupt request signal is asserted to request an interrupt service. 0b1..If C2[RIE] and S1[RDRF] are set, the RDRF DMA request signal is asserted to request a DMA transfer.

UART_C5_TCDMAS

#define UART_C5_TCDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_TCDMAS_SHIFT)) & UART_C5_TCDMAS_MASK)

TCDMAS - Transmission Complete DMA Select 0b0..If C2[TCIE] is set and the S1[TC] flag is set, the TC interrupt request signal is asserted to request an interrupt service. 0b1..If C2[TCIE] is set and the S1[TC] flag is set, the TC DMA request signal is asserted to request a DMA transfer.

UART_C5_TDMAS [1/5]

#define UART_C5_TDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)

TDMAS - Transmitter DMA Select 0b0..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE interrupt request signal is asserted to request interrupt service. 0b1..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer.

UART_C5_TDMAS [2/5]

#define UART_C5_TDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)

TDMAS - Transmitter DMA Select 0b0..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE interrupt request signal is asserted to request interrupt service. 0b1..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer.

UART_C5_TDMAS [3/5]

#define UART_C5_TDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)

TDMAS - Transmitter DMA Select 0b0..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE interrupt request signal is asserted to request interrupt service. 0b1..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer.

UART_C5_TDMAS [4/5]

#define UART_C5_TDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)

TDMAS - Transmitter DMA Select 0b0..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE interrupt request signal is asserted to request interrupt service. 0b1..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer.

UART_C5_TDMAS [5/5]

#define UART_C5_TDMAS

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C5_TDMAS_SHIFT)) & UART_C5_TDMAS_MASK)

TDMAS - Transmitter DMA Select 0b0..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE interrupt request signal is asserted to request interrupt service. 0b1..If C2[TIE] is set and the S1[TDRE] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer.

UART_C7816_ANACK [1/5]

#define UART_C7816_ANACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)

ANACK - Generate NACK on Error 0b0..No NACK is automatically generated. 0b1..A NACK is automatically generated if a parity error is detected or if an invalid initial character is detected.

UART_C7816_ANACK [2/5]

#define UART_C7816_ANACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)

ANACK - Generate NACK on Error 0b0..No NACK is automatically generated. 0b1..A NACK is automatically generated if a parity error is detected or if an invalid initial character is detected.

UART_C7816_ANACK [3/5]

#define UART_C7816_ANACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)

ANACK - Generate NACK on Error 0b0..No NACK is automatically generated. 0b1..A NACK is automatically generated if a parity error is detected or if an invalid initial character is detected.

UART_C7816_ANACK [4/5]

#define UART_C7816_ANACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)

ANACK - Generate NACK on Error 0b0..No NACK is automatically generated. 0b1..A NACK is automatically generated if a parity error is detected or if an invalid initial character is detected.

UART_C7816_ANACK [5/5]

#define UART_C7816_ANACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ANACK_SHIFT)) & UART_C7816_ANACK_MASK)

ANACK - Generate NACK on Error 0b0..No NACK is automatically generated. 0b1..A NACK is automatically generated if a parity error is detected or if an invalid initial character is detected.

UART_C7816_INIT [1/5]

#define UART_C7816_INIT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)

INIT - Detect Initial Character 0b0..Normal operating mode. Receiver does not seek to identify initial character. 0b1..Receiver searches for initial character.

UART_C7816_INIT [2/5]

#define UART_C7816_INIT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)

INIT - Detect Initial Character 0b0..Normal operating mode. Receiver does not seek to identify initial character. 0b1..Receiver searches for initial character.

UART_C7816_INIT [3/5]

#define UART_C7816_INIT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)

INIT - Detect Initial Character 0b0..Normal operating mode. Receiver does not seek to identify initial character. 0b1..Receiver searches for initial character.

UART_C7816_INIT [4/5]

#define UART_C7816_INIT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)

INIT - Detect Initial Character 0b0..Normal operating mode. Receiver does not seek to identify initial character. 0b1..Receiver searches for initial character.

UART_C7816_INIT [5/5]

#define UART_C7816_INIT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_INIT_SHIFT)) & UART_C7816_INIT_MASK)

INIT - Detect Initial Character 0b0..Normal operating mode. Receiver does not seek to identify initial character. 0b1..Receiver searches for initial character.

UART_C7816_ISO_7816E [1/5]

#define UART_C7816_ISO_7816E

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)

ISO_7816E - ISO-7816 Functionality Enabled 0b0..ISO-7816 functionality is turned off/not enabled. 0b1..ISO-7816 functionality is turned on/enabled.

UART_C7816_ISO_7816E [2/5]

#define UART_C7816_ISO_7816E

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)

ISO_7816E - ISO-7816 Functionality Enabled 0b0..ISO-7816 functionality is turned off/not enabled. 0b1..ISO-7816 functionality is turned on/enabled.

UART_C7816_ISO_7816E [3/5]

#define UART_C7816_ISO_7816E

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)

ISO_7816E - ISO-7816 Functionality Enabled 0b0..ISO-7816 functionality is turned off/not enabled. 0b1..ISO-7816 functionality is turned on/enabled.

UART_C7816_ISO_7816E [4/5]

#define UART_C7816_ISO_7816E

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)

ISO_7816E - ISO-7816 Functionality Enabled 0b0..ISO-7816 functionality is turned off/not enabled. 0b1..ISO-7816 functionality is turned on/enabled.

UART_C7816_ISO_7816E [5/5]

#define UART_C7816_ISO_7816E

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ISO_7816E_SHIFT)) & UART_C7816_ISO_7816E_MASK)

ISO_7816E - ISO-7816 Functionality Enabled 0b0..ISO-7816 functionality is turned off/not enabled. 0b1..ISO-7816 functionality is turned on/enabled.

UART_C7816_ONACK [1/5]

#define UART_C7816_ONACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)

ONACK - Generate NACK on Overflow 0b0..The received data does not generate a NACK when the receipt of the data results in an overflow event. 0b1..If the receiver buffer overflows, a NACK is automatically sent on a received character.

UART_C7816_ONACK [2/5]

#define UART_C7816_ONACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)

ONACK - Generate NACK on Overflow 0b0..The received data does not generate a NACK when the receipt of the data results in an overflow event. 0b1..If the receiver buffer overflows, a NACK is automatically sent on a received character.

UART_C7816_ONACK [3/5]

#define UART_C7816_ONACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)

ONACK - Generate NACK on Overflow 0b0..The received data does not generate a NACK when the receipt of the data results in an overflow event. 0b1..If the receiver buffer overflows, a NACK is automatically sent on a received character.

UART_C7816_ONACK [4/5]

#define UART_C7816_ONACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)

ONACK - Generate NACK on Overflow 0b0..The received data does not generate a NACK when the receipt of the data results in an overflow event. 0b1..If the receiver buffer overflows, a NACK is automatically sent on a received character.

UART_C7816_ONACK [5/5]

#define UART_C7816_ONACK

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_ONACK_SHIFT)) & UART_C7816_ONACK_MASK)

ONACK - Generate NACK on Overflow 0b0..The received data does not generate a NACK when the receipt of the data results in an overflow event. 0b1..If the receiver buffer overflows, a NACK is automatically sent on a received character.

UART_C7816_TTYPE [1/5]

#define UART_C7816_TTYPE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)

TTYPE - Transfer Type 0b0..T = 0 per the ISO-7816 specification. 0b1..T = 1 per the ISO-7816 specification.

UART_C7816_TTYPE [2/5]

#define UART_C7816_TTYPE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)

TTYPE - Transfer Type 0b0..T = 0 per the ISO-7816 specification. 0b1..T = 1 per the ISO-7816 specification.

UART_C7816_TTYPE [3/5]

#define UART_C7816_TTYPE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)

TTYPE - Transfer Type 0b0..T = 0 per the ISO-7816 specification. 0b1..T = 1 per the ISO-7816 specification.

UART_C7816_TTYPE [4/5]

#define UART_C7816_TTYPE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)

TTYPE - Transfer Type 0b0..T = 0 per the ISO-7816 specification. 0b1..T = 1 per the ISO-7816 specification.

UART_C7816_TTYPE [5/5]

#define UART_C7816_TTYPE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_C7816_TTYPE_SHIFT)) & UART_C7816_TTYPE_MASK)

TTYPE - Transfer Type 0b0..T = 0 per the ISO-7816 specification. 0b1..T = 1 per the ISO-7816 specification.

UART_CFIFO_RXFLUSH [1/5]

#define UART_CFIFO_RXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)

RXFLUSH - Receive FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the receive FIFO/buffer is cleared out.

UART_CFIFO_RXFLUSH [2/5]

#define UART_CFIFO_RXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)

RXFLUSH - Receive FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the receive FIFO/buffer is cleared out.

UART_CFIFO_RXFLUSH [3/5]

#define UART_CFIFO_RXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)

RXFLUSH - Receive FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the receive FIFO/buffer is cleared out.

UART_CFIFO_RXFLUSH [4/5]

#define UART_CFIFO_RXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)

RXFLUSH - Receive FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the receive FIFO/buffer is cleared out.

UART_CFIFO_RXFLUSH [5/5]

#define UART_CFIFO_RXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXFLUSH_SHIFT)) & UART_CFIFO_RXFLUSH_MASK)

RXFLUSH - Receive FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the receive FIFO/buffer is cleared out.

UART_CFIFO_RXOFE [1/5]

#define UART_CFIFO_RXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)

RXOFE - Receive FIFO Overflow Interrupt Enable 0b0..RXOF flag does not generate an interrupt to the host. 0b1..RXOF flag generates an interrupt to the host.

UART_CFIFO_RXOFE [2/5]

#define UART_CFIFO_RXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)

RXOFE - Receive FIFO Overflow Interrupt Enable 0b0..RXOF flag does not generate an interrupt to the host. 0b1..RXOF flag generates an interrupt to the host.

UART_CFIFO_RXOFE [3/5]

#define UART_CFIFO_RXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)

RXOFE - Receive FIFO Overflow Interrupt Enable 0b0..RXOF flag does not generate an interrupt to the host. 0b1..RXOF flag generates an interrupt to the host.

UART_CFIFO_RXOFE [4/5]

#define UART_CFIFO_RXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)

RXOFE - Receive FIFO Overflow Interrupt Enable 0b0..RXOF flag does not generate an interrupt to the host. 0b1..RXOF flag generates an interrupt to the host.

UART_CFIFO_RXOFE [5/5]

#define UART_CFIFO_RXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXOFE_SHIFT)) & UART_CFIFO_RXOFE_MASK)

RXOFE - Receive FIFO Overflow Interrupt Enable 0b0..RXOF flag does not generate an interrupt to the host. 0b1..RXOF flag generates an interrupt to the host.

UART_CFIFO_RXUFE [1/5]

#define UART_CFIFO_RXUFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)

RXUFE - Receive FIFO Underflow Interrupt Enable 0b0..RXUF flag does not generate an interrupt to the host. 0b1..RXUF flag generates an interrupt to the host.

UART_CFIFO_RXUFE [2/5]

#define UART_CFIFO_RXUFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)

RXUFE - Receive FIFO Underflow Interrupt Enable 0b0..RXUF flag does not generate an interrupt to the host. 0b1..RXUF flag generates an interrupt to the host.

UART_CFIFO_RXUFE [3/5]

#define UART_CFIFO_RXUFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)

RXUFE - Receive FIFO Underflow Interrupt Enable 0b0..RXUF flag does not generate an interrupt to the host. 0b1..RXUF flag generates an interrupt to the host.

UART_CFIFO_RXUFE [4/5]

#define UART_CFIFO_RXUFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)

RXUFE - Receive FIFO Underflow Interrupt Enable 0b0..RXUF flag does not generate an interrupt to the host. 0b1..RXUF flag generates an interrupt to the host.

UART_CFIFO_RXUFE [5/5]

#define UART_CFIFO_RXUFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_RXUFE_SHIFT)) & UART_CFIFO_RXUFE_MASK)

RXUFE - Receive FIFO Underflow Interrupt Enable 0b0..RXUF flag does not generate an interrupt to the host. 0b1..RXUF flag generates an interrupt to the host.

UART_CFIFO_TXFLUSH [1/5]

#define UART_CFIFO_TXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)

TXFLUSH - Transmit FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the transmit FIFO/Buffer is cleared out.

UART_CFIFO_TXFLUSH [2/5]

#define UART_CFIFO_TXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)

TXFLUSH - Transmit FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the transmit FIFO/Buffer is cleared out.

UART_CFIFO_TXFLUSH [3/5]

#define UART_CFIFO_TXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)

TXFLUSH - Transmit FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the transmit FIFO/Buffer is cleared out.

UART_CFIFO_TXFLUSH [4/5]

#define UART_CFIFO_TXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)

TXFLUSH - Transmit FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the transmit FIFO/Buffer is cleared out.

UART_CFIFO_TXFLUSH [5/5]

#define UART_CFIFO_TXFLUSH

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXFLUSH_SHIFT)) & UART_CFIFO_TXFLUSH_MASK)

TXFLUSH - Transmit FIFO/Buffer Flush 0b0..No flush operation occurs. 0b1..All data in the transmit FIFO/Buffer is cleared out.

UART_CFIFO_TXOFE [1/5]

#define UART_CFIFO_TXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)

TXOFE - Transmit FIFO Overflow Interrupt Enable 0b0..TXOF flag does not generate an interrupt to the host. 0b1..TXOF flag generates an interrupt to the host.

UART_CFIFO_TXOFE [2/5]

#define UART_CFIFO_TXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)

TXOFE - Transmit FIFO Overflow Interrupt Enable 0b0..TXOF flag does not generate an interrupt to the host. 0b1..TXOF flag generates an interrupt to the host.

UART_CFIFO_TXOFE [3/5]

#define UART_CFIFO_TXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)

TXOFE - Transmit FIFO Overflow Interrupt Enable 0b0..TXOF flag does not generate an interrupt to the host. 0b1..TXOF flag generates an interrupt to the host.

UART_CFIFO_TXOFE [4/5]

#define UART_CFIFO_TXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)

TXOFE - Transmit FIFO Overflow Interrupt Enable 0b0..TXOF flag does not generate an interrupt to the host. 0b1..TXOF flag generates an interrupt to the host.

UART_CFIFO_TXOFE [5/5]

#define UART_CFIFO_TXOFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_CFIFO_TXOFE_SHIFT)) & UART_CFIFO_TXOFE_MASK)

TXOFE - Transmit FIFO Overflow Interrupt Enable 0b0..TXOF flag does not generate an interrupt to the host. 0b1..TXOF flag generates an interrupt to the host.

UART_ED_NOISY [1/5]

#define UART_ED_NOISY

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)

NOISY 0b0..The dataword was received without noise. 0b1..The data was received with noise.

UART_ED_NOISY [2/5]

#define UART_ED_NOISY

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)

NOISY 0b0..The dataword was received without noise. 0b1..The data was received with noise.

UART_ED_NOISY [3/5]

#define UART_ED_NOISY

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)

NOISY 0b0..The dataword was received without noise. 0b1..The data was received with noise.

UART_ED_NOISY [4/5]

#define UART_ED_NOISY

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)

NOISY 0b0..The dataword was received without noise. 0b1..The data was received with noise.

UART_ED_NOISY [5/5]

#define UART_ED_NOISY

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_NOISY_SHIFT)) & UART_ED_NOISY_MASK)

NOISY 0b0..The dataword was received without noise. 0b1..The data was received with noise.

UART_ED_PARITYE [1/5]

#define UART_ED_PARITYE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)

PARITYE 0b0..The dataword was received without a parity error. 0b1..The dataword was received with a parity error.

UART_ED_PARITYE [2/5]

#define UART_ED_PARITYE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)

PARITYE 0b0..The dataword was received without a parity error. 0b1..The dataword was received with a parity error.

UART_ED_PARITYE [3/5]

#define UART_ED_PARITYE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)

PARITYE 0b0..The dataword was received without a parity error. 0b1..The dataword was received with a parity error.

UART_ED_PARITYE [4/5]

#define UART_ED_PARITYE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)

PARITYE 0b0..The dataword was received without a parity error. 0b1..The dataword was received with a parity error.

UART_ED_PARITYE [5/5]

#define UART_ED_PARITYE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ED_PARITYE_SHIFT)) & UART_ED_PARITYE_MASK)

PARITYE 0b0..The dataword was received without a parity error. 0b1..The dataword was received with a parity error.

UART_ET7816_TXTHRESHOLD [1/6]

#define UART_ET7816_TXTHRESHOLD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)

TXTHRESHOLD - Transmit NACK Threshold 0b0000..TXT asserts on the first NACK that is received. 0b0001..TXT asserts on the second NACK that is received.

UART_ET7816_TXTHRESHOLD [2/6]

#define UART_ET7816_TXTHRESHOLD

(

x

)

(((uint8_t)(((uint8_t)(x))<<UART_ET7816_TXTHRESHOLD_SHIFT))&UART_ET7816_TXTHRESHOLD_MASK)

TXTHRESHOLD - Transmit NACK Threshold 0b0000..TXT asserts on the first NACK that is received. 0b0001..TXT asserts on the second NACK that is received.

UART_ET7816_TXTHRESHOLD [3/6]

#define UART_ET7816_TXTHRESHOLD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)

TXTHRESHOLD - Transmit NACK Threshold 0b0000..TXT asserts on the first NACK that is received. 0b0001..TXT asserts on the second NACK that is received.

UART_ET7816_TXTHRESHOLD [4/6]

#define UART_ET7816_TXTHRESHOLD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)

TXTHRESHOLD - Transmit NACK Threshold 0b0000..TXT asserts on the first NACK that is received. 0b0001..TXT asserts on the second NACK that is received.

UART_ET7816_TXTHRESHOLD [5/6]

#define UART_ET7816_TXTHRESHOLD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)

TXTHRESHOLD - Transmit NACK Threshold 0b0000..TXT asserts on the first NACK that is received. 0b0001..TXT asserts on the second NACK that is received.

UART_ET7816_TXTHRESHOLD [6/6]

#define UART_ET7816_TXTHRESHOLD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_ET7816_TXTHRESHOLD_SHIFT)) & UART_ET7816_TXTHRESHOLD_MASK)

TXTHRESHOLD - Transmit NACK Threshold 0b0000..TXT asserts on the first NACK that is received. 0b0001..TXT asserts on the second NACK that is received.

UART_IE7816_ADTE [1/3]

#define UART_IE7816_ADTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_ADTE_SHIFT)) & UART_IE7816_ADTE_MASK)

ADTE - ATR Duration Timer Interrupt Enable 0b0..The assertion of IS7816[ADT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[ADT] results in the generation of an interrupt.

UART_IE7816_ADTE [2/3]

#define UART_IE7816_ADTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_ADTE_SHIFT)) & UART_IE7816_ADTE_MASK)

ADTE - ATR Duration Timer Interrupt Enable 0b0..The assertion of IS7816[ADT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[ADT] results in the generation of an interrupt.

UART_IE7816_ADTE [3/3]

#define UART_IE7816_ADTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_ADTE_SHIFT)) & UART_IE7816_ADTE_MASK)

ADTE - ATR Duration Timer Interrupt Enable 0b0..The assertion of IS7816[ADT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[ADT] results in the generation of an interrupt.

UART_IE7816_BWTE [1/5]

#define UART_IE7816_BWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)

BWTE - Block Wait Timer Interrupt Enable 0b0..The assertion of IS7816[BWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[BWT] results in the generation of an interrupt.

UART_IE7816_BWTE [2/5]

#define UART_IE7816_BWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)

BWTE - Block Wait Timer Interrupt Enable 0b0..The assertion of IS7816[BWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[BWT] results in the generation of an interrupt.

UART_IE7816_BWTE [3/5]

#define UART_IE7816_BWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)

BWTE - Block Wait Timer Interrupt Enable 0b0..The assertion of IS7816[BWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[BWT] results in the generation of an interrupt.

UART_IE7816_BWTE [4/5]

#define UART_IE7816_BWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)

BWTE - Block Wait Timer Interrupt Enable 0b0..The assertion of IS7816[BWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[BWT] results in the generation of an interrupt.

UART_IE7816_BWTE [5/5]

#define UART_IE7816_BWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_BWTE_SHIFT)) & UART_IE7816_BWTE_MASK)

BWTE - Block Wait Timer Interrupt Enable 0b0..The assertion of IS7816[BWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[BWT] results in the generation of an interrupt.

UART_IE7816_CWTE [1/5]

#define UART_IE7816_CWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)

CWTE - Character Wait Timer Interrupt Enable 0b0..The assertion of IS7816[CWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[CWT] results in the generation of an interrupt.

UART_IE7816_CWTE [2/5]

#define UART_IE7816_CWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)

CWTE - Character Wait Timer Interrupt Enable 0b0..The assertion of IS7816[CWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[CWT] results in the generation of an interrupt.

UART_IE7816_CWTE [3/5]

#define UART_IE7816_CWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)

CWTE - Character Wait Timer Interrupt Enable 0b0..The assertion of IS7816[CWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[CWT] results in the generation of an interrupt.

UART_IE7816_CWTE [4/5]

#define UART_IE7816_CWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)

CWTE - Character Wait Timer Interrupt Enable 0b0..The assertion of IS7816[CWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[CWT] results in the generation of an interrupt.

UART_IE7816_CWTE [5/5]

#define UART_IE7816_CWTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_CWTE_SHIFT)) & UART_IE7816_CWTE_MASK)

CWTE - Character Wait Timer Interrupt Enable 0b0..The assertion of IS7816[CWT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[CWT] results in the generation of an interrupt.

UART_IE7816_GTVE [1/5]

#define UART_IE7816_GTVE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)

GTVE - Guard Timer Violated Interrupt Enable 0b0..The assertion of IS7816[GTV] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[GTV] results in the generation of an interrupt.

UART_IE7816_GTVE [2/5]

#define UART_IE7816_GTVE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)

GTVE - Guard Timer Violated Interrupt Enable 0b0..The assertion of IS7816[GTV] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[GTV] results in the generation of an interrupt.

UART_IE7816_GTVE [3/5]

#define UART_IE7816_GTVE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)

GTVE - Guard Timer Violated Interrupt Enable 0b0..The assertion of IS7816[GTV] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[GTV] results in the generation of an interrupt.

UART_IE7816_GTVE [4/5]

#define UART_IE7816_GTVE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)

GTVE - Guard Timer Violated Interrupt Enable 0b0..The assertion of IS7816[GTV] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[GTV] results in the generation of an interrupt.

UART_IE7816_GTVE [5/5]

#define UART_IE7816_GTVE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_GTVE_SHIFT)) & UART_IE7816_GTVE_MASK)

GTVE - Guard Timer Violated Interrupt Enable 0b0..The assertion of IS7816[GTV] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[GTV] results in the generation of an interrupt.

UART_IE7816_INITDE [1/5]

#define UART_IE7816_INITDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)

INITDE - Initial Character Detected Interrupt Enable 0b0..The assertion of IS7816[INITD] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[INITD] results in the generation of an interrupt.

UART_IE7816_INITDE [2/5]

#define UART_IE7816_INITDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)

INITDE - Initial Character Detected Interrupt Enable 0b0..The assertion of IS7816[INITD] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[INITD] results in the generation of an interrupt.

UART_IE7816_INITDE [3/5]

#define UART_IE7816_INITDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)

INITDE - Initial Character Detected Interrupt Enable 0b0..The assertion of IS7816[INITD] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[INITD] results in the generation of an interrupt.

UART_IE7816_INITDE [4/5]

#define UART_IE7816_INITDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)

INITDE - Initial Character Detected Interrupt Enable 0b0..The assertion of IS7816[INITD] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[INITD] results in the generation of an interrupt.

UART_IE7816_INITDE [5/5]

#define UART_IE7816_INITDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_INITDE_SHIFT)) & UART_IE7816_INITDE_MASK)

INITDE - Initial Character Detected Interrupt Enable 0b0..The assertion of IS7816[INITD] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[INITD] results in the generation of an interrupt.

UART_IE7816_RXTE [1/5]

#define UART_IE7816_RXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)

RXTE - Receive Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[RXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[RXT] results in the generation of an interrupt.

UART_IE7816_RXTE [2/5]

#define UART_IE7816_RXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)

RXTE - Receive Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[RXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[RXT] results in the generation of an interrupt.

UART_IE7816_RXTE [3/5]

#define UART_IE7816_RXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)

RXTE - Receive Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[RXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[RXT] results in the generation of an interrupt.

UART_IE7816_RXTE [4/5]

#define UART_IE7816_RXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)

RXTE - Receive Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[RXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[RXT] results in the generation of an interrupt.

UART_IE7816_RXTE [5/5]

#define UART_IE7816_RXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_RXTE_SHIFT)) & UART_IE7816_RXTE_MASK)

RXTE - Receive Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[RXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[RXT] results in the generation of an interrupt.

UART_IE7816_TXTE [1/5]

#define UART_IE7816_TXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)

TXTE - Transmit Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[TXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[TXT] results in the generation of an interrupt.

UART_IE7816_TXTE [2/5]

#define UART_IE7816_TXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)

TXTE - Transmit Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[TXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[TXT] results in the generation of an interrupt.

UART_IE7816_TXTE [3/5]

#define UART_IE7816_TXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)

TXTE - Transmit Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[TXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[TXT] results in the generation of an interrupt.

UART_IE7816_TXTE [4/5]

#define UART_IE7816_TXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)

TXTE - Transmit Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[TXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[TXT] results in the generation of an interrupt.

UART_IE7816_TXTE [5/5]

#define UART_IE7816_TXTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_TXTE_SHIFT)) & UART_IE7816_TXTE_MASK)

TXTE - Transmit Threshold Exceeded Interrupt Enable 0b0..The assertion of IS7816[TXT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[TXT] results in the generation of an interrupt.

UART_IE7816_WTE [1/5]

#define UART_IE7816_WTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)

WTE - Wait Timer Interrupt Enable 0b0..The assertion of IS7816[WT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[WT] results in the generation of an interrupt.

UART_IE7816_WTE [2/5]

#define UART_IE7816_WTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)

WTE - Wait Timer Interrupt Enable 0b0..The assertion of IS7816[WT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[WT] results in the generation of an interrupt.

UART_IE7816_WTE [3/5]

#define UART_IE7816_WTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)

WTE - Wait Timer Interrupt Enable 0b0..The assertion of IS7816[WT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[WT] results in the generation of an interrupt.

UART_IE7816_WTE [4/5]

#define UART_IE7816_WTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)

WTE - Wait Timer Interrupt Enable 0b0..The assertion of IS7816[WT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[WT] results in the generation of an interrupt.

UART_IE7816_WTE [5/5]

#define UART_IE7816_WTE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IE7816_WTE_SHIFT)) & UART_IE7816_WTE_MASK)

WTE - Wait Timer Interrupt Enable 0b0..The assertion of IS7816[WT] does not result in the generation of an interrupt. 0b1..The assertion of IS7816[WT] results in the generation of an interrupt.

UART_IR_IREN [1/5]

#define UART_IR_IREN

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)

IREN - Infrared enable 0b0..IR disabled. 0b1..IR enabled.

UART_IR_IREN [2/5]

#define UART_IR_IREN

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)

IREN - Infrared enable 0b0..IR disabled. 0b1..IR enabled.

UART_IR_IREN [3/5]

#define UART_IR_IREN

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)

IREN - Infrared enable 0b0..IR disabled. 0b1..IR enabled.

UART_IR_IREN [4/5]

#define UART_IR_IREN

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)

IREN - Infrared enable 0b0..IR disabled. 0b1..IR enabled.

UART_IR_IREN [5/5]

#define UART_IR_IREN

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_IREN_SHIFT)) & UART_IR_IREN_MASK)

IREN - Infrared enable 0b0..IR disabled. 0b1..IR enabled.

UART_IR_TNP [1/6]

#define UART_IR_TNP

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)

TNP - Transmitter narrow pulse 0b00..3/16. 0b01..1/16. 0b10..1/32. 0b11..1/4.

UART_IR_TNP [2/6]

#define UART_IR_TNP

(

x

)

(((uint8_t)(((uint8_t)(x))<<UART_IR_TNP_SHIFT))&UART_IR_TNP_MASK)

TNP - Transmitter narrow pulse 0b00..3/16. 0b01..1/16. 0b10..1/32. 0b11..1/4.

UART_IR_TNP [3/6]

#define UART_IR_TNP

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)

TNP - Transmitter narrow pulse 0b00..3/16. 0b01..1/16. 0b10..1/32. 0b11..1/4.

UART_IR_TNP [4/6]

#define UART_IR_TNP

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)

TNP - Transmitter narrow pulse 0b00..3/16. 0b01..1/16. 0b10..1/32. 0b11..1/4.

UART_IR_TNP [5/6]

#define UART_IR_TNP

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)

TNP - Transmitter narrow pulse 0b00..3/16. 0b01..1/16. 0b10..1/32. 0b11..1/4.

UART_IR_TNP [6/6]

#define UART_IR_TNP

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IR_TNP_SHIFT)) & UART_IR_TNP_MASK)

TNP - Transmitter narrow pulse 0b00..3/16. 0b01..1/16. 0b10..1/32. 0b11..1/4.

UART_IS7816_ADT [1/3]

#define UART_IS7816_ADT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_ADT_SHIFT)) & UART_IS7816_ADT_MASK)

ADT - ATR Duration Time Interrupt 0b0..ATR Duration time (ADT) has not been violated. 0b1..ATR Duration time (ADT) has been violated.

UART_IS7816_ADT [2/3]

#define UART_IS7816_ADT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_ADT_SHIFT)) & UART_IS7816_ADT_MASK)

ADT - ATR Duration Time Interrupt 0b0..ATR Duration time (ADT) has not been violated. 0b1..ATR Duration time (ADT) has been violated.

UART_IS7816_ADT [3/3]

#define UART_IS7816_ADT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_ADT_SHIFT)) & UART_IS7816_ADT_MASK)

ADT - ATR Duration Time Interrupt 0b0..ATR Duration time (ADT) has not been violated. 0b1..ATR Duration time (ADT) has been violated.

UART_IS7816_BWT [1/5]

#define UART_IS7816_BWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)

BWT - Block Wait Timer Interrupt 0b0..Block wait time (BWT) has not been violated. 0b1..Block wait time (BWT) has been violated.

UART_IS7816_BWT [2/5]

#define UART_IS7816_BWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)

BWT - Block Wait Timer Interrupt 0b0..Block wait time (BWT) has not been violated. 0b1..Block wait time (BWT) has been violated.

UART_IS7816_BWT [3/5]

#define UART_IS7816_BWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)

BWT - Block Wait Timer Interrupt 0b0..Block wait time (BWT) has not been violated. 0b1..Block wait time (BWT) has been violated.

UART_IS7816_BWT [4/5]

#define UART_IS7816_BWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)

BWT - Block Wait Timer Interrupt 0b0..Block wait time (BWT) has not been violated. 0b1..Block wait time (BWT) has been violated.

UART_IS7816_BWT [5/5]

#define UART_IS7816_BWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_BWT_SHIFT)) & UART_IS7816_BWT_MASK)

BWT - Block Wait Timer Interrupt 0b0..Block wait time (BWT) has not been violated. 0b1..Block wait time (BWT) has been violated.

UART_IS7816_CWT [1/5]

#define UART_IS7816_CWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)

CWT - Character Wait Timer Interrupt 0b0..Character wait time (CWT) has not been violated. 0b1..Character wait time (CWT) has been violated.

UART_IS7816_CWT [2/5]

#define UART_IS7816_CWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)

CWT - Character Wait Timer Interrupt 0b0..Character wait time (CWT) has not been violated. 0b1..Character wait time (CWT) has been violated.

UART_IS7816_CWT [3/5]

#define UART_IS7816_CWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)

CWT - Character Wait Timer Interrupt 0b0..Character wait time (CWT) has not been violated. 0b1..Character wait time (CWT) has been violated.

UART_IS7816_CWT [4/5]

#define UART_IS7816_CWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)

CWT - Character Wait Timer Interrupt 0b0..Character wait time (CWT) has not been violated. 0b1..Character wait time (CWT) has been violated.

UART_IS7816_CWT [5/5]

#define UART_IS7816_CWT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_CWT_SHIFT)) & UART_IS7816_CWT_MASK)

CWT - Character Wait Timer Interrupt 0b0..Character wait time (CWT) has not been violated. 0b1..Character wait time (CWT) has been violated.

UART_IS7816_GTV [1/5]

#define UART_IS7816_GTV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)

GTV - Guard Timer Violated Interrupt 0b0..A guard time (GT, CGT, or BGT) has not been violated. 0b1..A guard time (GT, CGT, or BGT) has been violated.

UART_IS7816_GTV [2/5]

#define UART_IS7816_GTV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)

GTV - Guard Timer Violated Interrupt 0b0..A guard time (GT, CGT, or BGT) has not been violated. 0b1..A guard time (GT, CGT, or BGT) has been violated.

UART_IS7816_GTV [3/5]

#define UART_IS7816_GTV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)

GTV - Guard Timer Violated Interrupt 0b0..A guard time (GT, CGT, or BGT) has not been violated. 0b1..A guard time (GT, CGT, or BGT) has been violated.

UART_IS7816_GTV [4/5]

#define UART_IS7816_GTV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)

GTV - Guard Timer Violated Interrupt 0b0..A guard time (GT, CGT, or BGT) has not been violated. 0b1..A guard time (GT, CGT, or BGT) has been violated.

UART_IS7816_GTV [5/5]

#define UART_IS7816_GTV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_GTV_SHIFT)) & UART_IS7816_GTV_MASK)

GTV - Guard Timer Violated Interrupt 0b0..A guard time (GT, CGT, or BGT) has not been violated. 0b1..A guard time (GT, CGT, or BGT) has been violated.

UART_IS7816_INITD [1/5]

#define UART_IS7816_INITD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)

INITD - Initial Character Detected Interrupt 0b0..A valid initial character has not been received. 0b1..A valid initial character has been received.

UART_IS7816_INITD [2/5]

#define UART_IS7816_INITD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)

INITD - Initial Character Detected Interrupt 0b0..A valid initial character has not been received. 0b1..A valid initial character has been received.

UART_IS7816_INITD [3/5]

#define UART_IS7816_INITD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)

INITD - Initial Character Detected Interrupt 0b0..A valid initial character has not been received. 0b1..A valid initial character has been received.

UART_IS7816_INITD [4/5]

#define UART_IS7816_INITD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)

INITD - Initial Character Detected Interrupt 0b0..A valid initial character has not been received. 0b1..A valid initial character has been received.

UART_IS7816_INITD [5/5]

#define UART_IS7816_INITD

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_INITD_SHIFT)) & UART_IS7816_INITD_MASK)

INITD - Initial Character Detected Interrupt 0b0..A valid initial character has not been received. 0b1..A valid initial character has been received.

UART_IS7816_RXT [1/5]

#define UART_IS7816_RXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)

RXT - Receive Threshold Exceeded Interrupt 0b0..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is less than or equal to the value in ET7816[RXTHRESHOLD]. 0b1..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is greater than the value in ET7816[RXTHRESHOLD].

UART_IS7816_RXT [2/5]

#define UART_IS7816_RXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)

RXT - Receive Threshold Exceeded Interrupt 0b0..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is less than or equal to the value in ET7816[RXTHRESHOLD]. 0b1..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is greater than the value in ET7816[RXTHRESHOLD].

UART_IS7816_RXT [3/5]

#define UART_IS7816_RXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)

RXT - Receive Threshold Exceeded Interrupt 0b0..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is less than or equal to the value in ET7816[RXTHRESHOLD]. 0b1..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is greater than the value in ET7816[RXTHRESHOLD].

UART_IS7816_RXT [4/5]

#define UART_IS7816_RXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)

RXT - Receive Threshold Exceeded Interrupt 0b0..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is less than or equal to the value in ET7816[RXTHRESHOLD]. 0b1..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is greater than the value in ET7816[RXTHRESHOLD].

UART_IS7816_RXT [5/5]

#define UART_IS7816_RXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_RXT_SHIFT)) & UART_IS7816_RXT_MASK)

RXT - Receive Threshold Exceeded Interrupt 0b0..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is less than or equal to the value in ET7816[RXTHRESHOLD]. 0b1..The number of consecutive NACKS generated as a result of parity errors and buffer overruns is greater than the value in ET7816[RXTHRESHOLD].

UART_IS7816_TXT [1/5]

#define UART_IS7816_TXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)

TXT - Transmit Threshold Exceeded Interrupt 0b0..The number of retries and corresponding NACKS does not exceed the value in ET7816[TXTHRESHOLD]. 0b1..The number of retries and corresponding NACKS exceeds the value in ET7816[TXTHRESHOLD].

UART_IS7816_TXT [2/5]

#define UART_IS7816_TXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)

TXT - Transmit Threshold Exceeded Interrupt 0b0..The number of retries and corresponding NACKS does not exceed the value in ET7816[TXTHRESHOLD]. 0b1..The number of retries and corresponding NACKS exceeds the value in ET7816[TXTHRESHOLD].

UART_IS7816_TXT [3/5]

#define UART_IS7816_TXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)

TXT - Transmit Threshold Exceeded Interrupt 0b0..The number of retries and corresponding NACKS does not exceed the value in ET7816[TXTHRESHOLD]. 0b1..The number of retries and corresponding NACKS exceeds the value in ET7816[TXTHRESHOLD].

UART_IS7816_TXT [4/5]

#define UART_IS7816_TXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)

TXT - Transmit Threshold Exceeded Interrupt 0b0..The number of retries and corresponding NACKS does not exceed the value in ET7816[TXTHRESHOLD]. 0b1..The number of retries and corresponding NACKS exceeds the value in ET7816[TXTHRESHOLD].

UART_IS7816_TXT [5/5]

#define UART_IS7816_TXT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_TXT_SHIFT)) & UART_IS7816_TXT_MASK)

TXT - Transmit Threshold Exceeded Interrupt 0b0..The number of retries and corresponding NACKS does not exceed the value in ET7816[TXTHRESHOLD]. 0b1..The number of retries and corresponding NACKS exceeds the value in ET7816[TXTHRESHOLD].

UART_IS7816_WT [1/5]

#define UART_IS7816_WT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)

WT - Wait Timer Interrupt 0b0..Wait time (WT) has not been violated. 0b1..Wait time (WT) has been violated.

UART_IS7816_WT [2/5]

#define UART_IS7816_WT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)

WT - Wait Timer Interrupt 0b0..Wait time (WT) has not been violated. 0b1..Wait time (WT) has been violated.

UART_IS7816_WT [3/5]

#define UART_IS7816_WT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)

WT - Wait Timer Interrupt 0b0..Wait time (WT) has not been violated. 0b1..Wait time (WT) has been violated.

UART_IS7816_WT [4/5]

#define UART_IS7816_WT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)

WT - Wait Timer Interrupt 0b0..Wait time (WT) has not been violated. 0b1..Wait time (WT) has been violated.

UART_IS7816_WT [5/5]

#define UART_IS7816_WT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_IS7816_WT_SHIFT)) & UART_IS7816_WT_MASK)

WT - Wait Timer Interrupt 0b0..Wait time (WT) has not been violated. 0b1..Wait time (WT) has been violated.

UART_MODEM_RXRTSE [1/5]

#define UART_MODEM_RXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the number of characters in the receiver data register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER].

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the number of characters in the receiver data register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER]. See Hardware flow control

UART_MODEM_RXRTSE [2/5]

#define UART_MODEM_RXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the number of characters in the receiver data register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER].

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the number of characters in the receiver data register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER]. See Hardware flow control

UART_MODEM_RXRTSE [3/5]

#define UART_MODEM_RXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the number of characters in the receiver data register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER]. See Hardware flow control

UART_MODEM_RXRTSE [4/5]

#define UART_MODEM_RXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the number of characters in the receiver data register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER]. See Hardware flow control

UART_MODEM_RXRTSE [5/5]

#define UART_MODEM_RXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_RXRTSE_SHIFT)) & UART_MODEM_RXRTSE_MASK)

RXRTSE - Receiver request-to-send enable 0b0..The receiver has no effect on RTS. 0b1..RTS is deasserted if the number of characters in the receiver data register (FIFO) is equal to or greater than RWFIFO[RXWATER]. RTS is asserted when the number of characters in the receiver data register (FIFO) is less than RWFIFO[RXWATER]. See Hardware flow control

UART_MODEM_TXCTSE [1/5]

#define UART_MODEM_TXCTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)

TXCTSE - Transmitter clear-to-send enable 0b0..CTS has no effect on the transmitter. 0b1..Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.

UART_MODEM_TXCTSE [2/5]

#define UART_MODEM_TXCTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)

TXCTSE - Transmitter clear-to-send enable 0b0..CTS has no effect on the transmitter. 0b1..Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.

UART_MODEM_TXCTSE [3/5]

#define UART_MODEM_TXCTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)

TXCTSE - Transmitter clear-to-send enable 0b0..CTS has no effect on the transmitter. 0b1..Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.

UART_MODEM_TXCTSE [4/5]

#define UART_MODEM_TXCTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)

TXCTSE - Transmitter clear-to-send enable 0b0..CTS has no effect on the transmitter. 0b1..Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.

UART_MODEM_TXCTSE [5/5]

#define UART_MODEM_TXCTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXCTSE_SHIFT)) & UART_MODEM_TXCTSE_MASK)

TXCTSE - Transmitter clear-to-send enable 0b0..CTS has no effect on the transmitter. 0b1..Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission.

UART_MODEM_TXRTSE [1/5]

#define UART_MODEM_TXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) (FIFO)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) Ensure that C2[TE] is asserted before assertion of this bit.

UART_MODEM_TXRTSE [2/5]

#define UART_MODEM_TXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) (FIFO)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) Ensure that C2[TE] is asserted before assertion of this bit.

UART_MODEM_TXRTSE [3/5]

#define UART_MODEM_TXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) (FIFO)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) Ensure that C2[TE] is asserted before assertion of this bit.

UART_MODEM_TXRTSE [4/5]

#define UART_MODEM_TXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) (FIFO)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) Ensure that C2[TE] is asserted before assertion of this bit.

UART_MODEM_TXRTSE [5/5]

#define UART_MODEM_TXRTSE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSE_SHIFT)) & UART_MODEM_TXRTSE_MASK)

TXRTSE - Transmitter request-to-send enable 0b0..The transmitter has no effect on RTS. 0b1..When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. (FIFO) Ensure that C2[TE] is asserted before assertion of this bit.

UART_MODEM_TXRTSPOL [1/5]

#define UART_MODEM_TXRTSPOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)

TXRTSPOL - Transmitter request-to-send polarity 0b0..Transmitter RTS is active low. 0b1..Transmitter RTS is active high.

UART_MODEM_TXRTSPOL [2/5]

#define UART_MODEM_TXRTSPOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)

TXRTSPOL - Transmitter request-to-send polarity 0b0..Transmitter RTS is active low. 0b1..Transmitter RTS is active high.

UART_MODEM_TXRTSPOL [3/5]

#define UART_MODEM_TXRTSPOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)

TXRTSPOL - Transmitter request-to-send polarity 0b0..Transmitter RTS is active low. 0b1..Transmitter RTS is active high.

UART_MODEM_TXRTSPOL [4/5]

#define UART_MODEM_TXRTSPOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)

TXRTSPOL - Transmitter request-to-send polarity 0b0..Transmitter RTS is active low. 0b1..Transmitter RTS is active high.

UART_MODEM_TXRTSPOL [5/5]

#define UART_MODEM_TXRTSPOL

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_MODEM_TXRTSPOL_SHIFT)) & UART_MODEM_TXRTSPOL_MASK)

TXRTSPOL - Transmitter request-to-send polarity 0b0..Transmitter RTS is active low. 0b1..Transmitter RTS is active high.

UART_PFIFO_RXFE [1/5]

#define UART_PFIFO_RXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)

RXFE - Receive FIFO Enable 0b0..Receive FIFO is not enabled. Buffer is depth 1. (Legacy support) 0b1..Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.

UART_PFIFO_RXFE [2/5]

#define UART_PFIFO_RXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)

RXFE - Receive FIFO Enable 0b0..Receive FIFO is not enabled. Buffer is depth 1. (Legacy support) 0b1..Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.

UART_PFIFO_RXFE [3/5]

#define UART_PFIFO_RXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)

RXFE - Receive FIFO Enable 0b0..Receive FIFO is not enabled. Buffer is depth 1. (Legacy support) 0b1..Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.

UART_PFIFO_RXFE [4/5]

#define UART_PFIFO_RXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)

RXFE - Receive FIFO Enable 0b0..Receive FIFO is not enabled. Buffer is depth 1. (Legacy support) 0b1..Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.

UART_PFIFO_RXFE [5/5]

#define UART_PFIFO_RXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFE_SHIFT)) & UART_PFIFO_RXFE_MASK)

RXFE - Receive FIFO Enable 0b0..Receive FIFO is not enabled. Buffer is depth 1. (Legacy support) 0b1..Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE.

UART_PFIFO_RXFIFOSIZE [1/6]

#define UART_PFIFO_RXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)

RXFIFOSIZE - Receive FIFO. Buffer Depth 0b000..Receive FIFO/Buffer depth = 1 dataword. 0b001..Receive FIFO/Buffer depth = 4 datawords. 0b010..Receive FIFO/Buffer depth = 8 datawords. 0b011..Receive FIFO/Buffer depth = 16 datawords. 0b100..Receive FIFO/Buffer depth = 32 datawords. 0b101..Receive FIFO/Buffer depth = 64 datawords. 0b110..Receive FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_RXFIFOSIZE [2/6]

#define UART_PFIFO_RXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x))<<UART_PFIFO_RXFIFOSIZE_SHIFT))&UART_PFIFO_RXFIFOSIZE_MASK)

RXFIFOSIZE - Receive FIFO. Buffer Depth 0b000..Receive FIFO/Buffer depth = 1 dataword. 0b001..Receive FIFO/Buffer depth = 4 datawords. 0b010..Receive FIFO/Buffer depth = 8 datawords. 0b011..Receive FIFO/Buffer depth = 16 datawords. 0b100..Receive FIFO/Buffer depth = 32 datawords. 0b101..Receive FIFO/Buffer depth = 64 datawords. 0b110..Receive FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_RXFIFOSIZE [3/6]

#define UART_PFIFO_RXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)

RXFIFOSIZE - Receive FIFO. Buffer Depth 0b000..Receive FIFO/Buffer depth = 1 dataword. 0b001..Receive FIFO/Buffer depth = 4 datawords. 0b010..Receive FIFO/Buffer depth = 8 datawords. 0b011..Receive FIFO/Buffer depth = 16 datawords. 0b100..Receive FIFO/Buffer depth = 32 datawords. 0b101..Receive FIFO/Buffer depth = 64 datawords. 0b110..Receive FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_RXFIFOSIZE [4/6]

#define UART_PFIFO_RXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)

RXFIFOSIZE - Receive FIFO. Buffer Depth 0b000..Receive FIFO/Buffer depth = 1 dataword. 0b001..Receive FIFO/Buffer depth = 4 datawords. 0b010..Receive FIFO/Buffer depth = 8 datawords. 0b011..Receive FIFO/Buffer depth = 16 datawords. 0b100..Receive FIFO/Buffer depth = 32 datawords. 0b101..Receive FIFO/Buffer depth = 64 datawords. 0b110..Receive FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_RXFIFOSIZE [5/6]

#define UART_PFIFO_RXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)

RXFIFOSIZE - Receive FIFO. Buffer Depth 0b000..Receive FIFO/Buffer depth = 1 dataword. 0b001..Receive FIFO/Buffer depth = 4 datawords. 0b010..Receive FIFO/Buffer depth = 8 datawords. 0b011..Receive FIFO/Buffer depth = 16 datawords. 0b100..Receive FIFO/Buffer depth = 32 datawords. 0b101..Receive FIFO/Buffer depth = 64 datawords. 0b110..Receive FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_RXFIFOSIZE [6/6]

#define UART_PFIFO_RXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_RXFIFOSIZE_SHIFT)) & UART_PFIFO_RXFIFOSIZE_MASK)

RXFIFOSIZE - Receive FIFO. Buffer Depth 0b000..Receive FIFO/Buffer depth = 1 dataword. 0b001..Receive FIFO/Buffer depth = 4 datawords. 0b010..Receive FIFO/Buffer depth = 8 datawords. 0b011..Receive FIFO/Buffer depth = 16 datawords. 0b100..Receive FIFO/Buffer depth = 32 datawords. 0b101..Receive FIFO/Buffer depth = 64 datawords. 0b110..Receive FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_TXFE [1/5]

#define UART_PFIFO_TXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)

TXFE - Transmit FIFO Enable 0b0..Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support). 0b1..Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.

UART_PFIFO_TXFE [2/5]

#define UART_PFIFO_TXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)

TXFE - Transmit FIFO Enable 0b0..Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support). 0b1..Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.

UART_PFIFO_TXFE [3/5]

#define UART_PFIFO_TXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)

TXFE - Transmit FIFO Enable 0b0..Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support). 0b1..Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.

UART_PFIFO_TXFE [4/5]

#define UART_PFIFO_TXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)

TXFE - Transmit FIFO Enable 0b0..Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support). 0b1..Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.

UART_PFIFO_TXFE [5/5]

#define UART_PFIFO_TXFE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFE_SHIFT)) & UART_PFIFO_TXFE_MASK)

TXFE - Transmit FIFO Enable 0b0..Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support). 0b1..Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE.

UART_PFIFO_TXFIFOSIZE [1/6]

#define UART_PFIFO_TXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)

TXFIFOSIZE - Transmit FIFO. Buffer Depth 0b000..Transmit FIFO/Buffer depth = 1 dataword. 0b001..Transmit FIFO/Buffer depth = 4 datawords. 0b010..Transmit FIFO/Buffer depth = 8 datawords. 0b011..Transmit FIFO/Buffer depth = 16 datawords. 0b100..Transmit FIFO/Buffer depth = 32 datawords. 0b101..Transmit FIFO/Buffer depth = 64 datawords. 0b110..Transmit FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_TXFIFOSIZE [2/6]

#define UART_PFIFO_TXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x))<<UART_PFIFO_TXFIFOSIZE_SHIFT))&UART_PFIFO_TXFIFOSIZE_MASK)

TXFIFOSIZE - Transmit FIFO. Buffer Depth 0b000..Transmit FIFO/Buffer depth = 1 dataword. 0b001..Transmit FIFO/Buffer depth = 4 datawords. 0b010..Transmit FIFO/Buffer depth = 8 datawords. 0b011..Transmit FIFO/Buffer depth = 16 datawords. 0b100..Transmit FIFO/Buffer depth = 32 datawords. 0b101..Transmit FIFO/Buffer depth = 64 datawords. 0b110..Transmit FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_TXFIFOSIZE [3/6]

#define UART_PFIFO_TXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)

TXFIFOSIZE - Transmit FIFO. Buffer Depth 0b000..Transmit FIFO/Buffer depth = 1 dataword. 0b001..Transmit FIFO/Buffer depth = 4 datawords. 0b010..Transmit FIFO/Buffer depth = 8 datawords. 0b011..Transmit FIFO/Buffer depth = 16 datawords. 0b100..Transmit FIFO/Buffer depth = 32 datawords. 0b101..Transmit FIFO/Buffer depth = 64 datawords. 0b110..Transmit FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_TXFIFOSIZE [4/6]

#define UART_PFIFO_TXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)

TXFIFOSIZE - Transmit FIFO. Buffer Depth 0b000..Transmit FIFO/Buffer depth = 1 dataword. 0b001..Transmit FIFO/Buffer depth = 4 datawords. 0b010..Transmit FIFO/Buffer depth = 8 datawords. 0b011..Transmit FIFO/Buffer depth = 16 datawords. 0b100..Transmit FIFO/Buffer depth = 32 datawords. 0b101..Transmit FIFO/Buffer depth = 64 datawords. 0b110..Transmit FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_TXFIFOSIZE [5/6]

#define UART_PFIFO_TXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)

TXFIFOSIZE - Transmit FIFO. Buffer Depth 0b000..Transmit FIFO/Buffer depth = 1 dataword. 0b001..Transmit FIFO/Buffer depth = 4 datawords. 0b010..Transmit FIFO/Buffer depth = 8 datawords. 0b011..Transmit FIFO/Buffer depth = 16 datawords. 0b100..Transmit FIFO/Buffer depth = 32 datawords. 0b101..Transmit FIFO/Buffer depth = 64 datawords. 0b110..Transmit FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_PFIFO_TXFIFOSIZE [6/6]

#define UART_PFIFO_TXFIFOSIZE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_PFIFO_TXFIFOSIZE_SHIFT)) & UART_PFIFO_TXFIFOSIZE_MASK)

TXFIFOSIZE - Transmit FIFO. Buffer Depth 0b000..Transmit FIFO/Buffer depth = 1 dataword. 0b001..Transmit FIFO/Buffer depth = 4 datawords. 0b010..Transmit FIFO/Buffer depth = 8 datawords. 0b011..Transmit FIFO/Buffer depth = 16 datawords. 0b100..Transmit FIFO/Buffer depth = 32 datawords. 0b101..Transmit FIFO/Buffer depth = 64 datawords. 0b110..Transmit FIFO/Buffer depth = 128 datawords. 0b111..Reserved.

UART_RX_TX_IRQS

#define UART_RX_TX_IRQS   { UART0_RX_TX_IRQn, UART1_RX_TX_IRQn, UART2_RX_TX_IRQn, UART3_RX_TX_IRQn, UART4_RX_TX_IRQn, UART5_RX_TX_IRQn }

Interrupt vectors for the UART peripheral type

UART_S1_FE [1/5]

#define UART_S1_FE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)

FE - Framing Error Flag 0b0..No framing error detected. 0b1..Framing error.

UART_S1_FE [2/5]

#define UART_S1_FE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)

FE - Framing Error Flag 0b0..No framing error detected. 0b1..Framing error.

UART_S1_FE [3/5]

#define UART_S1_FE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)

FE - Framing Error Flag 0b0..No framing error detected. 0b1..Framing error.

UART_S1_FE [4/5]

#define UART_S1_FE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)

FE - Framing Error Flag 0b0..No framing error detected. 0b1..Framing error.

UART_S1_FE [5/5]

#define UART_S1_FE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_FE_SHIFT)) & UART_S1_FE_MASK)

FE - Framing Error Flag 0b0..No framing error detected. 0b1..Framing error.

UART_S1_IDLE [1/5]

#define UART_S1_IDLE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)

IDLE - Idle Line Flag 0b0..Receiver input is either active now or has never become active since the IDLE flag was last cleared. 0b1..Receiver input has become idle or the flag has not been cleared since it last asserted.

UART_S1_IDLE [2/5]

#define UART_S1_IDLE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)

IDLE - Idle Line Flag 0b0..Receiver input is either active now or has never become active since the IDLE flag was last cleared. 0b1..Receiver input has become idle or the flag has not been cleared since it last asserted.

UART_S1_IDLE [3/5]

#define UART_S1_IDLE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)

IDLE - Idle Line Flag 0b0..Receiver input is either active now or has never become active since the IDLE flag was last cleared. 0b1..Receiver input has become idle or the flag has not been cleared since it last asserted.

UART_S1_IDLE [4/5]

#define UART_S1_IDLE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)

IDLE - Idle Line Flag 0b0..Receiver input is either active now or has never become active since the IDLE flag was last cleared. 0b1..Receiver input has become idle or the flag has not been cleared since it last asserted.

UART_S1_IDLE [5/5]

#define UART_S1_IDLE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_IDLE_SHIFT)) & UART_S1_IDLE_MASK)

IDLE - Idle Line Flag 0b0..Receiver input is either active now or has never become active since the IDLE flag was last cleared. 0b1..Receiver input has become idle or the flag has not been cleared since it last asserted.

UART_S1_NF [1/5]

#define UART_S1_NF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)

NF - Noise Flag 0b0..No noise detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1 then there may be data in the receiver buffer that was received with noise. 0b1..At least one dataword was received with noise detected since the last time the flag was cleared.

UART_S1_NF [2/5]

#define UART_S1_NF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)

NF - Noise Flag 0b0..No noise detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1 then there may be data in the receiver buffer that was received with noise. 0b1..At least one dataword was received with noise detected since the last time the flag was cleared.

UART_S1_NF [3/5]

#define UART_S1_NF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)

NF - Noise Flag 0b0..No noise detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1 then there may be data in the receiver buffer that was received with noise. 0b1..At least one dataword was received with noise detected since the last time the flag was cleared.

UART_S1_NF [4/5]

#define UART_S1_NF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)

NF - Noise Flag 0b0..No noise detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1 then there may be data in the receiver buffer that was received with noise. 0b1..At least one dataword was received with noise detected since the last time the flag was cleared.

UART_S1_NF [5/5]

#define UART_S1_NF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_NF_SHIFT)) & UART_S1_NF_MASK)

NF - Noise Flag 0b0..No noise detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1 then there may be data in the receiver buffer that was received with noise. 0b1..At least one dataword was received with noise detected since the last time the flag was cleared.

UART_S1_OR [1/5]

#define UART_S1_OR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)

OR - Receiver Overrun Flag 0b0..No overrun has occurred since the last time the flag was cleared. 0b1..Overrun has occurred or the overrun flag has not been cleared since the last overrun occured.

UART_S1_OR [2/5]

#define UART_S1_OR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)

OR - Receiver Overrun Flag 0b0..No overrun has occurred since the last time the flag was cleared. 0b1..Overrun has occurred or the overrun flag has not been cleared since the last overrun occured.

UART_S1_OR [3/5]

#define UART_S1_OR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)

OR - Receiver Overrun Flag 0b0..No overrun has occurred since the last time the flag was cleared. 0b1..Overrun has occurred or the overrun flag has not been cleared since the last overrun occured.

UART_S1_OR [4/5]

#define UART_S1_OR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)

OR - Receiver Overrun Flag 0b0..No overrun has occurred since the last time the flag was cleared. 0b1..Overrun has occurred or the overrun flag has not been cleared since the last overrun occured.

UART_S1_OR [5/5]

#define UART_S1_OR

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_OR_SHIFT)) & UART_S1_OR_MASK)

OR - Receiver Overrun Flag 0b0..No overrun has occurred since the last time the flag was cleared. 0b1..Overrun has occurred or the overrun flag has not been cleared since the last overrun occured.

UART_S1_PF [1/5]

#define UART_S1_PF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)

PF - Parity Error Flag 0b0..No parity error detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1, then there may be data in the receive buffer what was received with a parity error. 0b1..At least one dataword was received with a parity error since the last time this flag was cleared.

UART_S1_PF [2/5]

#define UART_S1_PF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)

PF - Parity Error Flag 0b0..No parity error detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1, then there may be data in the receive buffer what was received with a parity error. 0b1..At least one dataword was received with a parity error since the last time this flag was cleared.

UART_S1_PF [3/5]

#define UART_S1_PF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)

PF - Parity Error Flag 0b0..No parity error detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1, then there may be data in the receive buffer what was received with a parity error. 0b1..At least one dataword was received with a parity error since the last time this flag was cleared.

UART_S1_PF [4/5]

#define UART_S1_PF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)

PF - Parity Error Flag 0b0..No parity error detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1, then there may be data in the receive buffer what was received with a parity error. 0b1..At least one dataword was received with a parity error since the last time this flag was cleared.

UART_S1_PF [5/5]

#define UART_S1_PF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_PF_SHIFT)) & UART_S1_PF_MASK)

PF - Parity Error Flag 0b0..No parity error detected since the last time this flag was cleared. If the receive buffer has a depth greater than 1, then there may be data in the receive buffer what was received with a parity error. 0b1..At least one dataword was received with a parity error since the last time this flag was cleared.

UART_S1_RDRF [1/5]

#define UART_S1_RDRF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)

RDRF - Receive Data Register Full Flag 0b0..The number of datawords in the receive buffer is less than the number indicated by RXWATER. 0b1..The number of datawords in the receive buffer is equal to or greater than the number indicated by RXWATER at some point in time since this flag was last cleared.

UART_S1_RDRF [2/5]

#define UART_S1_RDRF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)

RDRF - Receive Data Register Full Flag 0b0..The number of datawords in the receive buffer is less than the number indicated by RXWATER. 0b1..The number of datawords in the receive buffer is equal to or greater than the number indicated by RXWATER at some point in time since this flag was last cleared.

UART_S1_RDRF [3/5]

#define UART_S1_RDRF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)

RDRF - Receive Data Register Full Flag 0b0..The number of datawords in the receive buffer is less than the number indicated by RXWATER. 0b1..The number of datawords in the receive buffer is equal to or greater than the number indicated by RXWATER at some point in time since this flag was last cleared.

UART_S1_RDRF [4/5]

#define UART_S1_RDRF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)

RDRF - Receive Data Register Full Flag 0b0..The number of datawords in the receive buffer is less than the number indicated by RXWATER. 0b1..The number of datawords in the receive buffer is equal to or greater than the number indicated by RXWATER at some point in time since this flag was last cleared.

UART_S1_RDRF [5/5]

#define UART_S1_RDRF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_RDRF_SHIFT)) & UART_S1_RDRF_MASK)

RDRF - Receive Data Register Full Flag 0b0..The number of datawords in the receive buffer is less than the number indicated by RXWATER. 0b1..The number of datawords in the receive buffer is equal to or greater than the number indicated by RXWATER at some point in time since this flag was last cleared.

UART_S1_TC [1/5]

#define UART_S1_TC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)

TC - Transmit Complete Flag 0b0..Transmitter active (sending data, a preamble, or a break). 0b1..Transmitter idle (transmission activity complete).

UART_S1_TC [2/5]

#define UART_S1_TC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)

TC - Transmit Complete Flag 0b0..Transmitter active (sending data, a preamble, or a break). 0b1..Transmitter idle (transmission activity complete).

UART_S1_TC [3/5]

#define UART_S1_TC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)

TC - Transmit Complete Flag 0b0..Transmitter active (sending data, a preamble, or a break). 0b1..Transmitter idle (transmission activity complete).

UART_S1_TC [4/5]

#define UART_S1_TC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)

TC - Transmit Complete Flag 0b0..Transmitter active (sending data, a preamble, or a break). 0b1..Transmitter idle (transmission activity complete).

UART_S1_TC [5/5]

#define UART_S1_TC

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TC_SHIFT)) & UART_S1_TC_MASK)

TC - Transmit Complete Flag 0b0..Transmitter active (sending data, a preamble, or a break). 0b1..Transmitter idle (transmission activity complete).

UART_S1_TDRE [1/5]

#define UART_S1_TDRE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)

TDRE - Transmit Data Register Empty Flag 0b0..The amount of data in the transmit buffer is greater than the value indicated by TWFIFO[TXWATER]. 0b1..The amount of data in the transmit buffer is less than or equal to the value indicated by TWFIFO[TXWATER] at some point in time since the flag has been cleared.

UART_S1_TDRE [2/5]

#define UART_S1_TDRE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)

TDRE - Transmit Data Register Empty Flag 0b0..The amount of data in the transmit buffer is greater than the value indicated by TWFIFO[TXWATER]. 0b1..The amount of data in the transmit buffer is less than or equal to the value indicated by TWFIFO[TXWATER] at some point in time since the flag has been cleared.

UART_S1_TDRE [3/5]

#define UART_S1_TDRE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)

TDRE - Transmit Data Register Empty Flag 0b0..The amount of data in the transmit buffer is greater than the value indicated by TWFIFO[TXWATER]. 0b1..The amount of data in the transmit buffer is less than or equal to the value indicated by TWFIFO[TXWATER] at some point in time since the flag has been cleared.

UART_S1_TDRE [4/5]

#define UART_S1_TDRE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)

TDRE - Transmit Data Register Empty Flag 0b0..The amount of data in the transmit buffer is greater than the value indicated by TWFIFO[TXWATER]. 0b1..The amount of data in the transmit buffer is less than or equal to the value indicated by TWFIFO[TXWATER] at some point in time since the flag has been cleared.

UART_S1_TDRE [5/5]

#define UART_S1_TDRE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S1_TDRE_SHIFT)) & UART_S1_TDRE_MASK)

TDRE - Transmit Data Register Empty Flag 0b0..The amount of data in the transmit buffer is greater than the value indicated by TWFIFO[TXWATER]. 0b1..The amount of data in the transmit buffer is less than or equal to the value indicated by TWFIFO[TXWATER] at some point in time since the flag has been cleared.

UART_S2_BRK13 [1/5]

#define UART_S2_BRK13

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)

BRK13 - Break Transmit Character Length 0b0..Break character is 10, 11, or 12 bits long. 0b1..Break character is 13 or 14 bits long.

UART_S2_BRK13 [2/5]

#define UART_S2_BRK13

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)

BRK13 - Break Transmit Character Length 0b0..Break character is 10, 11, or 12 bits long. 0b1..Break character is 13 or 14 bits long.

UART_S2_BRK13 [3/5]

#define UART_S2_BRK13

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)

BRK13 - Break Transmit Character Length 0b0..Break character is 10, 11, or 12 bits long. 0b1..Break character is 13 or 14 bits long.

UART_S2_BRK13 [4/5]

#define UART_S2_BRK13

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)

BRK13 - Break Transmit Character Length 0b0..Break character is 10, 11, or 12 bits long. 0b1..Break character is 13 or 14 bits long.

UART_S2_BRK13 [5/5]

#define UART_S2_BRK13

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_BRK13_SHIFT)) & UART_S2_BRK13_MASK)

BRK13 - Break Transmit Character Length 0b0..Break character is 10, 11, or 12 bits long. 0b1..Break character is 13 or 14 bits long.

UART_S2_LBKDE [1/5]

#define UART_S2_LBKDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)

LBKDE - LIN Break Detection Enable 0b0..Break character detection is disabled. 0b1..Break character is detected at length of 11 bit times if C1[M] = 0 or 12 bits time if C1[M] = 1.

UART_S2_LBKDE [2/5]

#define UART_S2_LBKDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)

LBKDE - LIN Break Detection Enable 0b0..Break character detection is disabled. 0b1..Break character is detected at length of 11 bit times if C1[M] = 0 or 12 bits time if C1[M] = 1.

UART_S2_LBKDE [3/5]

#define UART_S2_LBKDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)

LBKDE - LIN Break Detection Enable 0b0..Break character detection is disabled. 0b1..Break character is detected at length of 11 bit times if C1[M] = 0 or 12 bits time if C1[M] = 1.

UART_S2_LBKDE [4/5]

#define UART_S2_LBKDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)

LBKDE - LIN Break Detection Enable 0b0..Break character detection is disabled. 0b1..Break character is detected at length of 11 bit times if C1[M] = 0 or 12 bits time if C1[M] = 1.

UART_S2_LBKDE [5/5]

#define UART_S2_LBKDE

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDE_SHIFT)) & UART_S2_LBKDE_MASK)

LBKDE - LIN Break Detection Enable 0b0..Break character detection is disabled. 0b1..Break character is detected at length of 11 bit times if C1[M] = 0 or 12 bits time if C1[M] = 1.

UART_S2_LBKDIF [1/5]

#define UART_S2_LBKDIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)

LBKDIF - LIN Break Detect Interrupt Flag 0b0..No LIN break character detected. 0b1..LIN break character detected.

UART_S2_LBKDIF [2/5]

#define UART_S2_LBKDIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)

LBKDIF - LIN Break Detect Interrupt Flag 0b0..No LIN break character detected. 0b1..LIN break character detected.

UART_S2_LBKDIF [3/5]

#define UART_S2_LBKDIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)

LBKDIF - LIN Break Detect Interrupt Flag 0b0..No LIN break character detected. 0b1..LIN break character detected.

UART_S2_LBKDIF [4/5]

#define UART_S2_LBKDIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)

LBKDIF - LIN Break Detect Interrupt Flag 0b0..No LIN break character detected. 0b1..LIN break character detected.

UART_S2_LBKDIF [5/5]

#define UART_S2_LBKDIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_LBKDIF_SHIFT)) & UART_S2_LBKDIF_MASK)

LBKDIF - LIN Break Detect Interrupt Flag 0b0..No LIN break character detected. 0b1..LIN break character detected.

UART_S2_MSBF [1/5]

#define UART_S2_MSBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)

MSBF - Most Significant Bit First 0b0..LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. 0b1..MSB (bit8, bit7 or bit6) is the first bit that is transmitted following the start bit, depending on the setting of C1[M] and C1[PE]. Further, the first bit received after the start bit is identified as bit8, bit7, or bit6, depending on the setting of C1[M] and C1[PE].

UART_S2_MSBF [2/5]

#define UART_S2_MSBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)

MSBF - Most Significant Bit First 0b0..LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. 0b1..MSB (bit8, bit7 or bit6) is the first bit that is transmitted following the start bit, depending on the setting of C1[M] and C1[PE]. Further, the first bit received after the start bit is identified as bit8, bit7, or bit6, depending on the setting of C1[M] and C1[PE].

UART_S2_MSBF [3/5]

#define UART_S2_MSBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)

MSBF - Most Significant Bit First 0b0..LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. 0b1..MSB (bit8, bit7 or bit6) is the first bit that is transmitted following the start bit, depending on the setting of C1[M] and C1[PE]. Further, the first bit received after the start bit is identified as bit8, bit7, or bit6, depending on the setting of C1[M] and C1[PE].

UART_S2_MSBF [4/5]

#define UART_S2_MSBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)

MSBF - Most Significant Bit First 0b0..LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. 0b1..MSB (bit8, bit7 or bit6) is the first bit that is transmitted following the start bit, depending on the setting of C1[M] and C1[PE]. Further, the first bit received after the start bit is identified as bit8, bit7, or bit6, depending on the setting of C1[M] and C1[PE].

UART_S2_MSBF [5/5]

#define UART_S2_MSBF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_MSBF_SHIFT)) & UART_S2_MSBF_MASK)

MSBF - Most Significant Bit First 0b0..LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. 0b1..MSB (bit8, bit7 or bit6) is the first bit that is transmitted following the start bit, depending on the setting of C1[M] and C1[PE]. Further, the first bit received after the start bit is identified as bit8, bit7, or bit6, depending on the setting of C1[M] and C1[PE].

UART_S2_RAF [1/5]

#define UART_S2_RAF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)

RAF - Receiver Active Flag 0b0..UART receiver idle/inactive waiting for a start bit. 0b1..UART receiver active, RxD input not idle.

UART_S2_RAF [2/5]

#define UART_S2_RAF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)

RAF - Receiver Active Flag 0b0..UART receiver idle/inactive waiting for a start bit. 0b1..UART receiver active, RxD input not idle.

UART_S2_RAF [3/5]

#define UART_S2_RAF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)

RAF - Receiver Active Flag 0b0..UART receiver idle/inactive waiting for a start bit. 0b1..UART receiver active, RxD input not idle.

UART_S2_RAF [4/5]

#define UART_S2_RAF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)

RAF - Receiver Active Flag 0b0..UART receiver idle/inactive waiting for a start bit. 0b1..UART receiver active, RxD input not idle.

UART_S2_RAF [5/5]

#define UART_S2_RAF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RAF_SHIFT)) & UART_S2_RAF_MASK)

RAF - Receiver Active Flag 0b0..UART receiver idle/inactive waiting for a start bit. 0b1..UART receiver active, RxD input not idle.

UART_S2_RWUID [1/5]

#define UART_S2_RWUID

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)

RWUID - Receive Wakeup Idle Detect 0b0..S1[IDLE] is not set upon detection of an idle character. 0b1..S1[IDLE] is set upon detection of an idle character.

UART_S2_RWUID [2/5]

#define UART_S2_RWUID

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)

RWUID - Receive Wakeup Idle Detect 0b0..S1[IDLE] is not set upon detection of an idle character. 0b1..S1[IDLE] is set upon detection of an idle character.

UART_S2_RWUID [3/5]

#define UART_S2_RWUID

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)

RWUID - Receive Wakeup Idle Detect 0b0..S1[IDLE] is not set upon detection of an idle character. 0b1..S1[IDLE] is set upon detection of an idle character.

UART_S2_RWUID [4/5]

#define UART_S2_RWUID

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)

RWUID - Receive Wakeup Idle Detect 0b0..S1[IDLE] is not set upon detection of an idle character. 0b1..S1[IDLE] is set upon detection of an idle character.

UART_S2_RWUID [5/5]

#define UART_S2_RWUID

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RWUID_SHIFT)) & UART_S2_RWUID_MASK)

RWUID - Receive Wakeup Idle Detect 0b0..S1[IDLE] is not set upon detection of an idle character. 0b1..S1[IDLE] is set upon detection of an idle character.

UART_S2_RXEDGIF [1/5]

#define UART_S2_RXEDGIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)

RXEDGIF - RxD Pin Active Edge Interrupt Flag 0b0..No active edge on the receive pin has occurred. 0b1..An active edge on the receive pin has occurred.

UART_S2_RXEDGIF [2/5]

#define UART_S2_RXEDGIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)

RXEDGIF - RxD Pin Active Edge Interrupt Flag 0b0..No active edge on the receive pin has occurred. 0b1..An active edge on the receive pin has occurred.

UART_S2_RXEDGIF [3/5]

#define UART_S2_RXEDGIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)

RXEDGIF - RxD Pin Active Edge Interrupt Flag 0b0..No active edge on the receive pin has occurred. 0b1..An active edge on the receive pin has occurred.

UART_S2_RXEDGIF [4/5]

#define UART_S2_RXEDGIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)

RXEDGIF - RxD Pin Active Edge Interrupt Flag 0b0..No active edge on the receive pin has occurred. 0b1..An active edge on the receive pin has occurred.

UART_S2_RXEDGIF [5/5]

#define UART_S2_RXEDGIF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXEDGIF_SHIFT)) & UART_S2_RXEDGIF_MASK)

RXEDGIF - RxD Pin Active Edge Interrupt Flag 0b0..No active edge on the receive pin has occurred. 0b1..An active edge on the receive pin has occurred.

UART_S2_RXINV [1/5]

#define UART_S2_RXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)

RXINV - Receive Data Inversion 0b0..Receive data is not inverted. 0b1..Receive data is inverted.

UART_S2_RXINV [2/5]

#define UART_S2_RXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)

RXINV - Receive Data Inversion 0b0..Receive data is not inverted. 0b1..Receive data is inverted.

UART_S2_RXINV [3/5]

#define UART_S2_RXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)

RXINV - Receive Data Inversion 0b0..Receive data is not inverted. 0b1..Receive data is inverted.

UART_S2_RXINV [4/5]

#define UART_S2_RXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)

RXINV - Receive Data Inversion 0b0..Receive data is not inverted. 0b1..Receive data is inverted.

UART_S2_RXINV [5/5]

#define UART_S2_RXINV

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_S2_RXINV_SHIFT)) & UART_S2_RXINV_MASK)

RXINV - Receive Data Inversion 0b0..Receive data is not inverted. 0b1..Receive data is inverted.

UART_SFIFO_RXEMPT [1/5]

#define UART_SFIFO_RXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)

RXEMPT - Receive Buffer/FIFO Empty 0b0..Receive buffer is not empty. 0b1..Receive buffer is empty.

UART_SFIFO_RXEMPT [2/5]

#define UART_SFIFO_RXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)

RXEMPT - Receive Buffer/FIFO Empty 0b0..Receive buffer is not empty. 0b1..Receive buffer is empty.

UART_SFIFO_RXEMPT [3/5]

#define UART_SFIFO_RXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)

RXEMPT - Receive Buffer/FIFO Empty 0b0..Receive buffer is not empty. 0b1..Receive buffer is empty.

UART_SFIFO_RXEMPT [4/5]

#define UART_SFIFO_RXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)

RXEMPT - Receive Buffer/FIFO Empty 0b0..Receive buffer is not empty. 0b1..Receive buffer is empty.

UART_SFIFO_RXEMPT [5/5]

#define UART_SFIFO_RXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXEMPT_SHIFT)) & UART_SFIFO_RXEMPT_MASK)

RXEMPT - Receive Buffer/FIFO Empty 0b0..Receive buffer is not empty. 0b1..Receive buffer is empty.

UART_SFIFO_RXOF [1/5]

#define UART_SFIFO_RXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)

RXOF - Receiver Buffer Overflow Flag 0b0..No receive buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXOF [2/5]

#define UART_SFIFO_RXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)

RXOF - Receiver Buffer Overflow Flag 0b0..No receive buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXOF [3/5]

#define UART_SFIFO_RXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)

RXOF - Receiver Buffer Overflow Flag 0b0..No receive buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXOF [4/5]

#define UART_SFIFO_RXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)

RXOF - Receiver Buffer Overflow Flag 0b0..No receive buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXOF [5/5]

#define UART_SFIFO_RXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXOF_SHIFT)) & UART_SFIFO_RXOF_MASK)

RXOF - Receiver Buffer Overflow Flag 0b0..No receive buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXUF [1/5]

#define UART_SFIFO_RXUF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)

RXUF - Receiver Buffer Underflow Flag 0b0..No receive buffer underflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer underflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXUF [2/5]

#define UART_SFIFO_RXUF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)

RXUF - Receiver Buffer Underflow Flag 0b0..No receive buffer underflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer underflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXUF [3/5]

#define UART_SFIFO_RXUF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)

RXUF - Receiver Buffer Underflow Flag 0b0..No receive buffer underflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer underflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXUF [4/5]

#define UART_SFIFO_RXUF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)

RXUF - Receiver Buffer Underflow Flag 0b0..No receive buffer underflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer underflow has occurred since the last time the flag was cleared.

UART_SFIFO_RXUF [5/5]

#define UART_SFIFO_RXUF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_RXUF_SHIFT)) & UART_SFIFO_RXUF_MASK)

RXUF - Receiver Buffer Underflow Flag 0b0..No receive buffer underflow has occurred since the last time the flag was cleared. 0b1..At least one receive buffer underflow has occurred since the last time the flag was cleared.

UART_SFIFO_TXEMPT [1/5]

#define UART_SFIFO_TXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)

TXEMPT - Transmit Buffer/FIFO Empty 0b0..Transmit buffer is not empty. 0b1..Transmit buffer is empty.

UART_SFIFO_TXEMPT [2/5]

#define UART_SFIFO_TXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)

TXEMPT - Transmit Buffer/FIFO Empty 0b0..Transmit buffer is not empty. 0b1..Transmit buffer is empty.

UART_SFIFO_TXEMPT [3/5]

#define UART_SFIFO_TXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)

TXEMPT - Transmit Buffer/FIFO Empty 0b0..Transmit buffer is not empty. 0b1..Transmit buffer is empty.

UART_SFIFO_TXEMPT [4/5]

#define UART_SFIFO_TXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)

TXEMPT - Transmit Buffer/FIFO Empty 0b0..Transmit buffer is not empty. 0b1..Transmit buffer is empty.

UART_SFIFO_TXEMPT [5/5]

#define UART_SFIFO_TXEMPT

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXEMPT_SHIFT)) & UART_SFIFO_TXEMPT_MASK)

TXEMPT - Transmit Buffer/FIFO Empty 0b0..Transmit buffer is not empty. 0b1..Transmit buffer is empty.

UART_SFIFO_TXOF [1/5]

#define UART_SFIFO_TXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)

TXOF - Transmitter Buffer Overflow Flag 0b0..No transmit buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one transmit buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_TXOF [2/5]

#define UART_SFIFO_TXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)

TXOF - Transmitter Buffer Overflow Flag 0b0..No transmit buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one transmit buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_TXOF [3/5]

#define UART_SFIFO_TXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)

TXOF - Transmitter Buffer Overflow Flag 0b0..No transmit buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one transmit buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_TXOF [4/5]

#define UART_SFIFO_TXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)

TXOF - Transmitter Buffer Overflow Flag 0b0..No transmit buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one transmit buffer overflow has occurred since the last time the flag was cleared.

UART_SFIFO_TXOF [5/5]

#define UART_SFIFO_TXOF

(

x

)

(((uint8_t)(((uint8_t)(x)) << UART_SFIFO_TXOF_SHIFT)) & UART_SFIFO_TXOF_MASK)

TXOF - Transmitter Buffer Overflow Flag 0b0..No transmit buffer overflow has occurred since the last time the flag was cleared. 0b1..At least one transmit buffer overflow has occurred since the last time the flag was cleared.